SCD5581A - OSRAM Opto Semiconductors

Lead (Pb) Free Product - RoHS Compliant

Standard Red SCD5580A

Yellow SCD5581A

High Efficiency Red SCD5582A

Green SCD5583A

High Efficiency Green SCD5584A

S

limline

0.145’’ 8-Character 5x 5 Dot Matrix Serial Input

Dot Addressable Intelligent Display® Devices

2006-01-23 1

DESCRIPTION

The SCD5580A (Red), SCD5581A (Yellow), SCD5582A

(Super-red), SCD5583A (Green) and SCD5584 (HEG)

are eight digit dot addressable 5 x 5 matrix, Serial Input,

Intelligent Display devices. The eight 3.68 mm (0.145")

high digits are pac kaged in a transpare nt, 7,62 mm (0.3")

pin spacing plastic DIP.

The on-board CMOS has a 200 bit RAM (one bit associ-

ated with one LED) to gener ate User Defined Char acters.

Due to the reduced LED count, power requirement and

heat dissipation are reduced by 30%. Additionally in

Pow er Down Mode quiescent current is <50 µA.

The SCD558XA is designed to work with the Serial port of

most common microprocessors . The Cloc k I/O (CLK I/ O)

and Clock Select (CLKSEL) pins offer the user the

capability to supply a high speed external clock. This

feature can minimize audio in-band interference for

portable communication equipment or eliminate the visual

synchronization effects found in high vibration

envir onments such as avionics equipment.

FEATURES

• Low Profil e Pac kage: 60% Smaller than I ndustry Stan-

dard 8-Digit Display

• Eight 3.68 mm (0.145") 5 x 5 Dot Matrix Characters

in Red, Yellow, Super-red, Green, or

High Efficiency Green

• Optimum Display Surface Efficiency

(display area to package ratio)

• Low Power–30% Less Power Dissipation

than 5 x 7 Format

• High Speed Data Input Rate: 5.0 MHz

• ROMless Serial Input , Dot Addressable

Displa y—Ideal for User Defined Characters

• Built-in Decoders, Multiplexers and LED Drivers

• Readable from 1.8 meters (6 Feet)

• Wide Viewing Angle, X Axis ± 55°, Y Axis ± 65°

• Attributes:

– 200 bit RAM for User Defined Characters

– Eight Dimming Levels

– Power Down Mode (<250 µW)

– Hardware/Software Clear Function

– Lamp Test

• Internal or External Clock

• End-Stackable Dual-in-line Pla sti c Package

– 3.3 V Capability

2006-01-23 2

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

Package Outlines Dimensions in inch (mm)

Ordering Information

Type Color of Emission Character Height

mm (inch) Ordering Code

SCD5580A standard red

3.68 (0.145)

Q68000A0994

SCD5581A yellow Q68000A0996

SCD5582A super-red Q68000A0997

SCD5583A green Q68000A0998

SCD5584A high efficiency green Q68000A1000

IDOD5209

1234567891011121314

2328 27 26 25 24 22 21 20 19 18 17 1516

2.54 (0.100) 4.75 (0.187)

38.1 (1.500) max.

10 (0.394)

±0.15 (0.006)

33.32 (1.312) ref.

3.68 (0.145)

Indicator

5.08 (0.200)

1.27 (0.050) typ.

0.25 (0.010)

0.3 (0.012) typ.

±0.51 (0.020)

7.62 (0.300)

2

±0.51 (0.02)

4.06 (0.160)

33.02 (1.300) ref.

0.51 (0.020) typ.

-0.25 (0.010)

Tol. non cum.

2.54 (0.100) typ.

2

EIA Date Code

OSRAM YYWW

SCD 558XA Z YV

Hue Category

Intensity Code

Seating

Notes: Unless otherwise specified

3. Lead Dim. 0.018 wide x 0.012 thk.

2.

1. Tolerances: ±0.254 (0.010)

Dimension at Seating Plane

2.54 (0.100)

0.84 (0.033)

0.56 (0.022)

3.68 (0.145)

Plane

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 3

Maximum Ratings

Parameter Symbol Value Unit

Operating temperatur e range Top – 40 … + 85 °C

Storage temperature range Tstg – 40 … + 100 °C

DC Supply Voltage VCC -0.5 to + 7.0 V

Input Voltage Levels Relative to GND -0.5 to VCC to 0.5 V

Solder Temperature

1.59 mm (0.063“) below seating plane, t < 5.0 s TS260 °C

Relative Humidity 85 %

ESD (100 pF, 1.5 kΩ) VZ2.0 kV

Input Current ± 100 mA

Max. SDCLK Frequency 5.0 MHz

Maximum Number of LEDs on at 100% Brightness 128

IC Junction Temperature 125 °C

Optical Characteristics at 25°C

(VCC=5.0 V at 100% brightness level, viewing angle: X axis ± 55°, Y axis ± 65°)

Description Symbol Values Unit

Red

SCD5580A

Yellow

SCD5581A

Super-red

SCD5582A

Green

SCD5583A

High Efficiency Green

SCD5584A

Luminous Intensity (min.)

(typ.) IV36

90 124

213 124

265 124

221 124

505 µcd/dot

µcd/dot

Peak Wavelength (typ.) λpeak 660 583 630 565 568 nm

Dominant Wavelength (typ.) λdom 639 585 626 570 574 nm

Notes:

1. Dot to dot intensity matching at 100% brightness is 1.8:1.

2. Displays are binned for hue at 2.0 nm intervals.

3. Displays within a given intensity category have an intensity matc hing of 1.5:1 (max.).

2006-01-23 4

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

Data Write Cycle

Instruction Cycle

L

OAD

DATA

SDCLK

TSDCW

TSDCLK Period

TLDS

TDS TDH

TLDH

3.5

V

1.5

V

3.5

V

1.5

V

3.5

V

1.5

V

TSDCW

TWR

OR

LOAD

SDCLK

DATA

LOAD

SDCLK

DATA

TBL

D0D7D6D5D4D3D2D1D0

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 5

Top View

Input/Output Circuits

Figures „Inputs“ and „Clock I/O“ show the input and output resis-

tor/diode networks used for ESD protection and to eliminate sub-

strate latch-up caused by input voltage over/under shoot.

Inputs Clock I/O

114

28 15

Character 0 IDPA5115

Character 7

Electrical Charac teristics at 25°C

Parameter Min. Typ. Max. Units Conditions

VCC 4.5 5.0 5.5 V —

ICC (Pwr Dwn Mode) (1)(2) —5.0 —µAVCC=5.0 V, all inputs=0 V or VCC

ICC 8 digits(3)

16 dots/character —200 240 mA VCC=5.0 V, “#” displayed in all 8 digits

at 100% brightness at 25°C

IIL Input current — — –10 µAVCC=5.0 V, VIN=0 (all inputs)

IIH Input current — — 10 µAVCC=VIN=5.0 V (all inputs)

VIH 3.5 — — V VCC=4.5 V to 5.5 V

VIL — — 1.5 VVCC=4.5 V to 5.5 V

IOH (CLK I/O) —–8.9 —mA VCC=4.5 V, VOH=2.4 V

IOL (CLK I/O) —1.6 —mA VCC=4.5 V, VOL=0.4 V

θJ-pin —35 —°C/ W —

Fext External Clock Input Frequency 120 —347 kHz VCC=5.0 V, CLKSEL=0

Fosc Internal Clock Input Frequency 120 —347 kHz VCC=5.0 V, CLKSEL=1.0

Clock I/O Bus Loading — — 240 pF —

Clock Out Rise Time — — 500 ns VCC=4.5 V, VOH=2.4 V

Clock Out Fall Time — — 500 ns VCC=4.5 V, VOH=0.4 V

Digit Multiplex Frequency 375 768 1086 Hz —

Notes:

1) When an external clock is used it must be stopped.

2) Unused inputs must be tied high.

3) Peak current 5/3 x ICC.

IDCD5021

GND

1 kΩInput

CC

V

IDCD5026

GND

1 k

Ω

Input/Output

CC

V

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 6

Dot Matrix Format

Pin Assignment

Pin Function Pin Function

1SDCLK 28 GND

2LOAD 27 DATA

3NP 26 NP

4NP 25 NP

5NP 24 NP

6NP 23 NP

7NP 22 NP

8NP 21 NP

9NP 20 NP

10 NP 19 VCC

11 NP 18 NC

12 NP 17 NP

13 RST 16 CLKSEL

14 GND 15 CLK I/O

Switching Specifications

(over operating temperature range and VCC=4.5 V to 5.5 V)

Symbol Description Min. Units

TRC Reset Active Time 600 ns

TLDS Load Setup Time 40 ns

TDS Data Setup Time 40 ns

TSDCLK Clock Period 200 ns

TSDCW Clock Width 70 ns

TLDH Load Hold Time 0ns

TDH Data Hold Time 20 ns

TWR Total Write Time 2.2 µs

TBL Time Between Loads 600 ns

Note: SDCLK duty cycle = 30% Min. and 50% Max.

IDOD5210

0.84 (0.033) typ.

C2

2.54 (0.100)

C0 C1 C3 C4

R4

R0

R2

R3

R1

3.68 (0.145)

0.28 (0.011) typ.

0.56 (0.022) typ.

Tolerance: ±0.25 (0.010)

Pin Definitions

Pin Function Definitions

1SDCLK Loads data into the 8-bit serial data register

on a low to high transition.

2LOAD Low input enables data clocking into 8-bit

serial shift register. When LOAD goes hig h,

the contents of 8-bit serial Shift Register will

be decoded.

3NP No pin

4NP No pin

5NP No pin

6NP No pin

7NP No pin

8NP No pin

9NP No pin

10 NP No pin

11 NP No pin

12 NP No pin

13 RST Asynchronous input, when low will clear the

Multiplex Counter, User RAM and Data

Register. Control Word Register is set to

100% brightne ss and the Ad dress Regist er is

set to select Digit 0. The display is blanked.

14 GND Power supply ground

15 CLK I/O Outpu ts master clock or inpu ts external clock.

16 CLKSEL H=internal clock, L=external clock

17 NP No pin

18 NC No connection

19 VCC Power supply

20 NP No pin

21 NP No pin

22 NP No pin

23 NP No pin

24 NP No pin

25 NP No pin

26 NP No pin

27 DATA Serial data inpu t

28 GND Power supply ground

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 7

Operation of the SCD558X

The SCD558X display consists of 2 CMOS IC containin g contro l

logic and drivers for eight 5 x 5 characters. These components are

assembled in a compact (38 mm x 10 mm) plastic package.

Individual LED dot addressablity allows the user great freedom in

creating special characters or mini-ico ns. The User Definable

Character Se t Examp les il lustr ate 20 0 dif f er ent ch ar acter and sym -

bol possibilities.

The use of a serial data interface provi des a highl y effici en t in ter -

connection between the display and the mother board. The

SCD558X requires only 4 lines as compared to 15 for an equiva-

lent 8 character parallel input part.

The on-board CMOS IC is the electronic heart of the display. The

IC accepts decoded serial data, which is stored in the internal RAM.

Asynchronously the RAM is read by the character multiplexer at a

strobe rate that results in a flicker free display. Figure „SCD558X

Block Diagram“ (page 7) shows the three functional areas of the IC .

These include: the input serial data register and control logic, a

200 bits two port RAM, and an internal multiplexer/display driver.

SCD558XA Block Diagram

Display Column and Row Format

C0 C1 C2 C3 C4

Row 0 11111

Row 1 00100

Row 2 00100

Row 3 00100

Row 4 00100

1= Display dot „ON“

0=Display dot „OFF“

Column Data Ranges

Row 0 00H to 1FH

Row 1 20H to 3FH

Row 2 40H to 5FH

Row 3 60H to 7FH

Row 4 80H to 9FH

IDBD5067

I.C. #2

User RAM

Memory

Y Address Decode

OSC

0123

Display

8-bit Serial Register

Column Drivers

X Adress Decode

LOAD

DATA

SDCLK

CLKSEL

CLK I/O

RST

4-bit Address Register

4-bit Control Word Reg.

Control Word Logic

for Digit 0 to 3

& Row Drivers

Row Control Logic

4 5 67

MUX

Rate Row 0-4

(Digit 0-3)

Col 0-19

I.C. #1

Col 0-19

(Digits 4-7)

Row 0-4

64

Counter Counter

5

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 8

The following explains how to format the serial data to be loaded

into the display. The user supplies a string of bit mapped decoded

characters. The content s of th is string i s sh own in Figure „ Lo ad ing

Serial Character Data a“ (page 8). Figure „Loading Serial Charac-

ter Data b“ (page 8) shows that each character consist of six 8 bit

words. The first word encodes the display character location and

the succeeding five bytes are row data. The row data represent s

the status (On, Off) of individual column LEDs. Figure „Loading

Serial Character Data c“ (page 8) shows that each 8 bit word is

formatted to include a three bit Operational Code (OPCODE)

defined by bits D7–D5 and five bits (D4–D0) representing Column

Data, Character Address, or Control Word Data.

Figure „Loading Serial Character Data d“ (page 8) shows the

sequence f or loa ding the b y tes of data. Bringing the LOAD line low

enables the serial register to accept data. The shift action occurs

on the low to high transition of the serial data clock (SDCLK). The

least significant bit (D0) is loaded first. After eight clock pulses the

LOAD line is brought high. With this transition the OPCODE is

decoded. The decoded OPC OD E di rects D4–D0 to be latched in

the Character Address register, stored in the RAM as Column

data, or latched in the Control Word register. The control IC

requires a min imum 600 ns delay between successive byte loads.

As indicated in Fi gure „Lo ading Serial C har act er Dat a a“ (page 8),

a total of 528 bits of data are require d to load all eight characters

into the display.

The Characte r Add ress Regi ster bits , D 4–D0 (Table „Load Char a c-

ter Address“ (page 9)) and Row Address Register bits, D7–D5

(Table „Load Column Data“ (page 9)) direct the Column Data bits,

D4–D0 (Table „Load Column Data“ (page 9)) to specific RAM loca-

tion. Table „Character ’D’“ (page 8) shows the Ro w Address f or th e

example character “D.” Column data is written and read asynchro-

nously from the 200 bit RAM. Once loaded the intern al oscillator

and character multiplexer reads the data from the RAM. These

characters are row strobed with column data as shown in Figures

„Row and Column Location“ (page 9) and „Row Strobing“

(page 10). The character strobe rate is determined by the internal

or user supp lied external MUX Clock and the IC’s ÷320 counter.

Loading Serial Character Data

Character “D”

Op code

D7 D6 D5 Column Data

D4 D3 D2 D1 D0

C0 C1 C2 C3 C4

Hex

Row 0 000 111 1 0 1E

Row 1 001 100 0 1 31

Row 2 010 100 0 1 51

Row 3 011 100 0 1 71

Row 4 100 111 1 0 9E

Character 0 Character 1 Character 2 Character 3 Character 4 Character 5 Character 6 Character 7

528 Clock Cycles, 105.6 µs

Example: Serial Clock = 5 MHz, Clock Period = 200 ns

Time between LOADS

LOAD

Serial

Clock

DATA

Clock

Period

t0

D0 D1 D2 D3 D4 D5 D6 D7

11 Clock Cycles, 2.2 µs

Time

Between

Loads

OPCODE

Character Address OPCODE

Column Data

D0

C4 D1

C3 D2

C2 D3

C1 D4

C0

Character 0

Address Row 0 Column

Data

66 Clock Cycles, 13.2 µs

Row 1 Column

Data Row 2 Column

Data Row 3 Column

Data Row 4 Column

Data

D0

0 D1

0 D2

0 D3

0 D4

0 D5

1 D6

0 D7

1 D5 D6 D7

a.

b.

c.

d.

11 Clock Cycles, 2.2 µs

600 ns(min.)

Time

Between

Loads

600 ns(min.)

D 5

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 9

The user can activate four Control functions. These include: LED

Brightness Level, Lamp Test, IC Power Down, or Display Clear.

OPCODEs and five bit words are used to initiate these functions.

The OPCODEs and Control Words for the Character Address and

Loading Column Data are shown in Tables „Load Character

Address“ (page 9) and „Load Column Data“ (page 9).

The user can select seven specific LED brightness levels, Table

„Display Brightness“ (page 9). These brightness levels (in percent-

ages of full brightness of the display) include: 100 % (F0 HEX), 53%

(F1HEX), 40% (F2HEX), 27% (F3HEX), 20% (F4HEX), 13% (F5HEX),

and 6.6% (F6HEX). The brightness levels are controlle d by cha ng-

ing the duty factor of the row strobe pulse.

Row and Column Location

The SCD558XA offers a unique Display Po wer Down feature which

reduces ICC to less than 50 µA. When FFHEX is loaded, as shown in

Table „Power Down“ (page 9), the display is set to 0% brightness

and the internal multiplex clock is stopped. When in the Power

Down mode data may still be written into the RAM. The display is

reactivated by loading a new Brightness Level Control Word into

the display.

The Lamp Test is enabled by loading F8 HEX, Table „Lamp Test“

(page 9), into the serial shift re gister. This Control Wor d se ts all of

the LEDs to a 53% brightness level. Operation of the Lamp Test

has no affect on the RAM and is cleared by loading a Brightness

Control Word .

The Software Clear (C0HEX), given in Table „Software Clear“

(page 9), clears the Address Register and the RAM. The display is

blanked and the Character Address Register will be set to Charac-

ter 0. The internal coun ter an d the Co ntrol Word Regi ster a re u naf-

fected. The Software Clear will remain active until the next data

input cycle is initiated.

Load Character Address

Op code

D7 D6 D5 Character Address

D4 D3 D2 D1 D0 Hex Operation

Load

101 00 0 0 0 A0 Character 0

101 00 0 0 1 A1 Character 1

101 00 0 1 0 A2 Character 2

101 00 0 1 1 A3 Character 3

101 00 1 0 0 A4 Character 4

101 00 1 0 1 A5 Character 5

101 00 1 1 0 A6 Character 6

101 00 1 1 1 A7 Character 7

Load Column Data

Op code

D7 D6 D5 Column Data

D4 D3 D2 D1 D0 Operation Load

000 C0 C1 C2 C3 C4 Row 0

001 C0 C1 C2 C3 C4 Row 1

010 C0 C1 C2 C3 C4 Row 2

011 C0 C1 C2 C3 C4 Row 3

100 C0 C1 C2 C3 C4 Row 4

IDXX5185

Row 0

Row 1

Row 2

Row 3

Row 4 01234

Previously "on" LED

On LED

Off LED

Columns

Display Brightness

Op code

D7 D6 D5 Control Word

D4 D3 D2 D1 D0 Hex Operation

Level

111 10 0 0 0 F0 100%

111 10 0 0 1 F1 53%

111 10 0 1 0 F2 40%

111 10 0 1 1 F3 27%

111 10 1 0 0 F4 20%

111 10 1 0 1 F5 13%

111 10 1 1 0 F6 6.6%

Power Down

Op code

D7 D6 D5 Control Word

D4 D3 D2 D1 D0 Hex Operation

Level

111 11 1 1 1 FF 0%

brightness

Lamp Test

Op code

D7 D6 D5 Control Word

D4 D3 D2 D1 D0 Hex Operation

Level

111 10 BB B Lamp Test

(OFF)

111 11 0 0 1 F8 Lamp Test

(OFF)

Software Clear

Op code

D7 D6 D5 Control Word

D4 D3 D2 D1 D0 Hex Operation

Level

110 00 0 0 0 C0 CLEAR

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 10

Row Strobing

Multiplexer and Displ ay Driver

The eight characters are row multiplexed with RAM resident col-

umn data. The stro be ra te is estab lish ed b y the in ternal or e xternal

MUX Clock rate. The MUX Clock frequency is divided by a 320

counter chain. This results in a typical strobe rate of 750 Hz. By

pulling the Cl ock SEL l ine low, the displa y can be operate d from an

external MUX Cloc k. The exte rnal cloc k is a tta che d to the CL K I /O

connection (pi n 15 ). The m aximum external MUX Cloc k fr eq ue ncy

should be limited to 1.0 MHz.

An asynchronous hardware Reset (pin 13) is also provided. Bring-

ing this pin low will clear the Character Address Register, Control

Wor d Register , RAM, and blanks t he displa y. This action lea ves t he

displa y set at Char acter Address 0, and the Bright ness Le v el set at

100%.

Thermal Considerations

The SCD558XA has been designed to provide lowest thermal

resistance from the CMOS to the ground pin.

The heat is then conducted through the traces on the users circuit

board to free air. The max. IC operating temperature is 125°C.

Maximum. IC jun ction temperat ure is calculated usi ng the follo wing

equation:

TJ (IC) Max.=TA+(PD Max.) (RθJ-PIN+RθPIN-A)

where RθJ-PIN=35°C/W.

PD Max. =VCC Max.x ICC Max

=5.5 Vx0.240=1.32 W.

RθPIN-A will depend on ground trace thickness, whether parts are

soldered to the pcb or socketed and on air circulation.

Electrical & Mechanical Considerations

Interconnect Considerations

Optimum product performa nce can be had when the following

electrical and mechanical recommendations are adopted. The

SCD558XA’s IC is constructed in a high speed CMOS process,

consequently high speed noise on the SERIAL DATA, SERIAL

DATA CLOCK, LOAD and RESET lines may cause incorrect data

to be written into the serial shift register. Adhere to transmission

line terminatio n procedures when using fast line drivers and long

cables (>10 cm).

Good digital g rounds (pins 14, 28) and power supply decoupling

(pins 6, 9, 20, 23) will insure that ICC (<400 mA peak) switching

currents do not generate localized ground bounce. Therefore it is

recommend ed that each display package use a 0.1 µF and 20 µF

capacitor betwe en VCC and ground.

When the internal MUX Clock is being used connect the CLKSEL

pin to VCC. In those applications where RESET will not be con-

nected to the system’s reset control, it is recommended that this

pin be connected t o the cent er node of a series 0.1 µ F and 1 00 kΩ

RC network. Thus upon initial power up the RESET will be held

low for 10 ms allowing adequate time for the system power sup ply

to stabilize.

ESD Protection

The input protecti on structure of the SCD558XA provides signifi-

cant protection against ESD damage. It is capable of withstanding

discharges greater than 2.0 kV. Take all th e stan da rd pr eca u ti o ns,

normal for CMOS components. These include properly grounding

personnel, tools, tables, and transport carriers that come in contact

with unshielded parts. If these condit ions are not, or cannot be

met, keep the leads of the device shorted together or the parts in

anti-static packaging.

Soldering Considerations

The SCD558XA can be hand soldered with SN63 solder using a

grounded iron set to 260°C.

Wave soldering is also possible following these conditions: Pre-

heat that does n ot e xceed 9 3°C on the so lder side o f the PC board

or a package surface temperature of 85°C. Water soluble organic

acid flux (except carboxylic acid) or rosin-based RMA flux without

alcohol can be used.

Wav e temperature of 245°C ± 5°C with a dw e ll between 1.5 sec. to

3.0 sec. Exposure to the wave shoul d no t exceed temperatur es

abov e 2 60°C for five seconds at 1.59 m m (0.063") below the sea t -

ing plane. Th e packages should not b e im m ersed in th e wave.

Post Solder Cleaning Procedures

The least offensive cleaning solution is hot D.I. water (60 °C) for

less than 15 minutes. Addition of mild saponifiers is acceptable. Do

not use commercial dishwasher detergents.

For faster clea ni ng , so lvents may be used. Exercise car e in cho os-

ing solvents as so me may chemically attack the nylon pa ckage.

Maximum exposure should not exceed two minutes at elevated tem-

peratures. Acceptable solvents are TF (trichlorotrifluorethane), TA,

111 Trichloroethan e, and unhea ted ace t o ne.(1)

Note:

1) Acceptable commercial solvents are: Basic TF, Arklone, P.

Genesolv, D . Gen eso lv DA, Bla co- Tron TF and Blaco-Tron TA.

IDXX5186

Row 0

Row 1

Row 2

Row 3

Row 4 01234

Columns

Load Row 0

Load

4

Row 4

Columns

10 2 3

Row 3

Row 1

Row 0

Row 2

Load Row 1

Columns

Row 4 1

0 2 43

Load Row 2

Row 2

Row 1

Row 3

Row 0

Row 4 0Columns

213

4

Load Row 3

Row 0

Row 3

Row 1

Row 2

Row 4

Columns

012 43

Row 2

Row 1

Row 3

Row 0

Load Row 4Row

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 11

Unacceptable solvents contain alc ohol, meth an ol, methylene

chloride, ethan ol, TP35, TCM, TM C, TMS+, TE, or TES. Since

many commercial mixtures exist, contact a solvent vendor for

chemical composition information. Some major solvent manufac-

turers are: Allied Chemical Corporation, Specialty Chemical Divi-

sion, Morristown, NJ; Baron-Blakeslee, Chicago, IL; Dow

Chemical, Midland, MI; E.I. DuPont de Nemours & Co., Wilming-

ton, DE.

For further informat ion refer to Appnote s 18 and 19 at

www.osram-os.com

An alternative to sold ering and cleaning the display modules is to

use sockets. Naturally, 28 pin DIP sockets 7.62 mm (0.300") wide

with 2.54 mm (0.100") centers work well for single displays. Multi-

ple display assemblies are best handled by longer SIP sockets or

DIP sock ets wh en av aila ble f or unif orm packag e alignmen t. Soc ket

manufacturers are Aries Electronics, Inc., Frenchtown, NJ; Garry

Manufacturing, New Brunswick, NJ; Robinson-Nugent, New

Albany, IN; and Samtec Electronic Hardward, New Albany, IN.

For further information refer to Appnote 22 at www .osram-os.com

Optical Considerations

The 3.68 mm (0.145") high character of the SCD558XA gives

readability up to eight feet. Proper filter selection enhances read-

ability over this distance.

Using filters emphasizes the contrast ratio between a lit LED and

the character background. This will increase the discriminati on of

different characters. The only limitation is cost. Take into consider-

ation the ambient lighting environment for the best cost/benefit

ratio for filters .

Incandescent (with almost no green) or fluorescent (with almost no

red) lights do not have the flat spectral response of sunlight. Plas-

tic band-pass filters are an inexpensive and effective way to

strengthe n c ontrast ratios. The SCD558XA are re d/super-red dis-

plays and should be matched with long wavelength pass filter in

the 570 nm to 590 nm range. The SCD558XA shoul d be matched

with a yellow-green band-pass filter that peaks at 565 nm. For dis-

plays of multiple colors, neutral density grey filters offer the best

compromise.

Additional contrast enhancement is gained by shading the dis-

plays. Plastic band-pass filters with built-in louvers offer the next

step up in contrast improvement. Plastic filters can be improved

further with anti-refle ctive coatings to re duce glare . The trad e-off is

fuzzy characters. Mounting the filters close to the display reduces

this effect. Tak e care not to overhe at the plastic filter by allowing f or

proper air flow.

Optimal filter enhancements are gained by using circular polarized,

anti-reflective, band-pass filters. The circular polarizing further

enhances contrast by reducing the light that travels through the fil-

ter and reflects back off the display to less than 1%.

Several filter manufacturers supply quality filter materials. Some of

them are: Panelgraphic Corporation, W. Caldwell, NJ; SGL Homa-

lite, Wilmington, DE; 3M Company, Visual Products Division, St.

Paul, MN; Polaroid Corporation, Polarizer Division, Cambridge,

MA; Marks Polarized Corporation, Deer Park, NY, Hoya Optics,

Inc., Fremont, CA.

One last note on mounting filters: recessing displays and bezel

assemblies is an inexpensive way to provide a shading effect in

overhead lighting situations. Several Bezel manufacturers are:

R.M.F. Products, Batavia, IL; Nobex Components, Griffith Plastic

Corp., Burlingame, CA; Photo Chemical Prod ucts of Califor nia,

Santa Monica, CA; I.E.E.–Atlas, Van Nuys, CA.

Microprocessor Interface

The microp rocessor interf a ce is t hrough the serial port, SPI port or

one out of ei ght d ata bits on th e ei ght bi t pa ra llel po rt and also con -

trol lines SDCLK and LOAD.

Power Up Sequence

Upon power up display will come on at random. Thus the display

should be reset at power-up. The reset will set the Address Regis-

ter to Digit 0, User RAM is set to 0 (display blank) the Control Word

is set to 0 (100% brightness with Lamp Test off) and t he internal

counters are reset.

SCD Interface with Siemens/Intel 8031 Microprocessor (using serial port in mode 0)

IDCD5221

XTAL2 RxD

18 10

19 XTAL1

RST

9 17

P3.7 13

P3.3

P3.4 14

8031

U1

TxD 11

CLK LOAD

DATA

CC

V

40 SCD

CC

V

CC

1

Master

CC

V

SD

2691314

28 27 23 20 19 16 15 15

DATA

LOAD

2

CLK

1

SD

6 9 13 14

Slave

SCD

27

28 23 20 19 16

TAN

0.01 µF

+

22 µF

2006-01-23 12

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

Interface with Siemens/ Intel 8031 Microprocessor (using one bit of parallel port as serial input)

Interface with Motorola 68HC05C4 Microprocessor (using SPI port)

CC

V

40

39

16

11

10

P0.0

P3.6

P3.1

P3.0

P1.0

RST

8031

XTAL1

U1

XTAL2

CC

V

20

9

1

19

18

CC

V

20

Slave

CC

23

LOAD

CLK

SD

1 2

28 DATA

27

V

15

Master

1369 14

19

SCD

20 16

CLK

1

SD LOAD

26

2728 DATA

23

14139

16

SCD

19 15

22 µF

+

TAN

0.01 µF

IDCD5222

IDCD5223

CC

V

40

32

33

10

11

MOSI

SCLK

PA1

PA0

PA2

RST

68HC05C4

OSC2

U1

OSC1

CC

V

20

9

1

39

38

CC

V

16

14

SD

CLK LOAD

126 139

DATA

SCD

Master

28 27 23 1920

CC

V

TAN

22 µF

SCD

Slave

SD

CLK

1LOAD

26

DATA

91314

+

2015 28 27 23 19 16 15

0.01 µF

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 13

Cascading Multiple Displays

Multiple displays can be cascaded using the CLKSEL and CLK I/O pins as shown below. The display designated as the Mas ter Clock

source should have its CLKSEL pin tied high and the slaves should have their CLKSEL pins tied low. All CLK I/O pins should be tied

together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters.

Cascading Multiple Displays

Loading Data Into the Display

Use following procedure to load data into the display:

1. Power up the display.

2. Bring RST low (600 ns duration minimum) to clear the Multiplex Counter, Address Register, Control Word Register,

User Ram and Data Register. The display will be blank. Display brightness is set to 100%.

3. If a different brightness is desired, load the proper brightness opcode into the Control Word Register.

4. Load the Digit Address into the display.

5. Load display row and column data for the selected digit.

6. Repeat steps 4 and 5 for all digits.

IDCD5030

RST CLK SEL

Intelligent Display

CC

V

DATA SDCLK LOAD

14 more displays

in between

DATA

SDCLK

Decoder

Address Address Decode 1-14

A0

A1

A3

RST

CLK I/O

Intelligent Display

DATA

RST

SDCLK

CLK I/O

LOAD

CLK SEL

Chip

0

15

A2

LD CE

2006-01-23 14

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

Data Contents for the Word “Displays”

Step D7 D6 D5 D4 D3 D2 D1 D0 Function

A

B (optional) 11 0

11 1

0000 0

10BB B

CLEAR

BRIGHTNESS SELECT

1

2

3

4

5

6

10 1

000

00 1

01 0

01 1

10 0

10000

11110

10001

11110

DIGIT D0 SELECT

ROW 0 D0 (D)

ROW 1 D0 (D)

ROW 2 D0 (D)

ROW 3 D0 (D)

ROW 4 D0 (D)

7

8

9

10

11

12

101

000

001

010

011

100

10001

01110

00100

01110

DIGIT D1 SELECT

ROW 0 D1 (I)

ROW 1 D1 (I)

ROW 2 D1 (I)

ROW 3 D1 (I)

ROW 4 D1 (I)

13

14

15

16

17

18

101

000

001

010

011

100

10010

01111

10000

01110

00001

11110

DIGIT D2 SELECT

ROW 0 D2 (S)

ROW 1 D2 (S)

ROW 2 D2 (S)

ROW 3 D2 (S)

ROW 4 D2 (S)

19

20

21

22

23

24

101

000

001

010

011

100

10011

11110

10001

11110

10000

DIGIT D3 SELECT

ROW 0 D3 (P)

ROW 1 D3 (P)

ROW 2 D3 (P)

ROW 3 D3 (P)

ROW 4 D3 (P)

25

26

27

28

29

30

101

000

001

010

011

100

10100

10000

11111

DIGIT D4 SELECT

ROW 0 D4 (L)

ROW 1 D4 (L)

ROW 2 D4 (L)

ROW 3 D4 (L)

ROW 4 D4 (L)

31

32

33

34

35

36

101

000

001

010

011

100

10101

00100

01010

11111

10001

DIGIT D5 SELECT

ROW 0 D5 (A)

ROW 1 D5 (A)

ROW 2 D5 (A)

ROW 3 D5 (A)

ROW 4 D5 (A)

37

38

39

40

41

42

101

000

001

010

011

100

10110

10001

01010

00100

DIGIT D6 SELECT

ROW 0 D6 (Y)

ROW 1 D6 (Y)

ROW 2 D6 (Y)

ROW 3 D6 (Y)

ROW 4 D6 (Y)

43

44

45

46

47

48

101

000

001

010

011

100

10111

01111

10000

01110

00001

11110

DIGIT D7 SELECT

ROW 0 D7 (S)

ROW 1 D7 (S)

ROW 2 D7 (S)

ROW 3 D7 (S)

ROW 4 D7 (S)

Note:

If the display is already reset at Power Up, there is no need for Software Clear.

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 15

User Definable Character Set Examples*

Upper and Lower Case Alphabets

Numerals and Punctuation

*CAUTION: No more than 128 LEDs “on” at one time at 100% brightness.

IDCS5089

HEX

CODE CODE

HEX CODE

HEX

91

71

2A

5F

04 1E

29

4E

69

9E

0F

30

50

70

8F

1F

30

5E

70

9F

0F

30

53

71

8F

11

31

5F

71

91

0E

24

44

64

8E

01

21

41

71

8E

13

34

58

74

93

10

30

50

70

9F

11

3B

55

71

91

11

39

55

73

91

0E

31

51

71

8E

1E

31

5E

70

90

0C

32

56

72

8D

1E

31

5E

74

92

0F

30

4E

61

9E

1F

24

44

64

84

11

31

51

71

8E

11

31

51

6A

84

11

31

55

7B

91

11

2A

44

6A

91

11

2A

44

64

84

1F

22

44

68

9F

00

2E

52

72

8D

00

26

42

72

8C

00

23

44

62

8C

10

30

5E

71

9E

10

30

56

78

96

08

3C

48

6A

84

00

2F

50

70

8F

0C

24

44

64

8E

00

32

52

72

8D

01

21

4F

71

8F

00

2A

55

71

91

00

31

51

6A

84

00

2E

5F

70

8E

00

36

59

71

91

00

31

55

7B

91

04

2A

48

7C

88

00

2E

51

71

8E

00

32

4C

6C

92

00

2F

50

73

8F

00

3E

51

7E

90

00

31

4A

64

98

10

30

56

79

91

00

2F

51

6F

81

00

3E

44

68

9E

04

20

4C

64

8E

00

33

54

78

90

9E

29

49

69

1E 30

5E

70

1F

90

IDCS5090

HEX

CODE CODE

HEX CODE

HEX

8E

79

33

55

0E 04

2C

44

64

8E

1E

21

46

68

9F

06

2A

5F

62

82

06

28

5E

71

8E

1F

22

44

68

88

0E

31

4E

71

8E

0E

31

4F

62

8C

0A

3F

4A

7F

8A

0F

34

4E

65

9E

06

29

5C

68

9F

19

3A

44

6B

93

08

34

4D

72

8D

0C

2C

44

68

80

02

24

44

64

82

08

24

44

64

88

0C

2C

48

64

80

04

24

5F

64

84

00

2C

4C

64

88

00

20

5F

60

80

00

20

40

6C

8C

01

22

44

68

90

04

24

44

60

84

0A

2A

40

60

80

10

28

44

62

81

0E

31

42

64

88

1C

24

44

64

9C

06

24

48

64

86

0E

35

57

70

8E

0C

24

42

64

8C

00

20

40

60

9F

04

24

40

64

84

0C

2C

40

6C

8C

11

2A

44

6E

84

0C

20

4C

64

88

15

2E

5F

6E

95

02

24

48

64

82

04

2A

51

60

80

00

3F

40

7F

80

08

35

42

60

80

08

24

42

64

88

9E

21

4E

61

1E 30

5E

61

1F

9E

07

87

64

44

24

2006-01-23 16

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

User Definable Character Set Examples* (continued)

Scientific Notations, etc.

Foreign Characters

*CAUTION: No more than 128 LEDs “on” at one time at 100% brightness.

IDCS5091

HEX

CODE CODE

HEX CODE

HEX

86

6E

2E

5E

06 04

24

48

71

8E

1F

20

59

75

93

0E

20

4A

64

8A

0C

32

56

71

96

0E

24

4E

71

8E

00

24

4A

71

9F

10

3C

52

72

81

0E

31

5F

71

8E

10

28

44

6A

91

09

29

49

6E

90

01

2E

54

64

84

04

2E

55

6E

84

0E

31

51

6A

9B

01

2E

5A

6A

8A

0F

32

52

72

8C

1F

28

44

68

9F

18

24

48

7C

80

1C

28

44

78

80

12

36

5A

67

80

06

21

5A

67

80

07

22

59

66

80

1C

34

5C

60

80

0F

28

48

78

88

00

24

4E

7F

8E

04

22

5F

62

84

00

27

4F

78

9C

00

2E

5F

6E

84

04

28

5F

68

84

00

3C

5F

63

87

0E

3F

4E

64

80

1F

31

51

71

9F

00

20

40

60

83

04

3E

5F

7E

84

08

2C

4A

78

98

00

20

40

67

9F

04

2F

5F

6F

84

0A

35

4A

75

8A

00

23

5F

7F

9F

0E

2E

4E

6E

8E

15

2A

55

6A

95

0C

3C

5C

7C

9C

00

3F

5F

7F

80

1F

35

5F

75

9F

15

2E

44

64

84

04

2E

55

64

84

00

3F

5F

7C

80

04

24

55

6E

84

0E

3F

5B

7F

8E

91

20

56

79

1F 32

52

72

0D

8D

80

6E

04

5F

2E

IDCS5092

HEX

CODE CODE

HEX CODE

HEX

84

62

21

5F

1F 1F

21

46

64

88

01

22

46

6A

82

00

3F

44

64

9F

08

3F

49

6A

88

1F

21

45

67

8C

02

3F

51

62

8C

08

3F

49

69

92

04

3F

44

7F

84

0F

29

51

62

8C

08

2F

52

62

82

0F

21

41

61

9F

0A

3F

4A

62

8C

19

21

59

62

9C

0F

29

55

63

8C

01

3E

42

7F

86

15

35

55

62

8C

0E

20

5F

64

98

08

28

4C

6A

90

04

3F

44

64

98

0E

20

40

60

9F

1F

21

4A

64

9A

04

3E

44

6E

95

04

24

44

68

90

10

3F

50

70

8F

12

32

52

64

88

0A

2E

51

7F

91

1F

21

41

62

8C

04

34

54

75

96

02

24

4C

64

8E

0E

20

4E

60

8F

1E

25

4F

74

8F

04

2A

4E

71

8E

04

28

51

7F

81

0F

34

5F

74

97

0A

34

52

7A

96

01

21

4A

64

8A

0F

30

4F

64

98

08

24

51

71

8E

1F

28

5F

68

87

0F

33

55

79

9E

02

24

51

71

8E

1E

22

42

62

9F

0F

34

57

74

8F

04

2A

51

71

8E

1F

21

5F

61

9F

00

2A

5F

74

8B

0E

20

5F

61

8E

08

24

4E

72

8F

86

3F

51

61

04 3F

46

6A

02

92

91

71

04

51

22

SCD5580A, SCD5581A, SCD5582A, SCD5583A, SCD5584A

2006-01-23 17

Published by

OSRAM Opto Semiconductors GmbH

Wernerwerkstrasse 2, D-93049 Regensburg

www.osram-os.com

Attention please!

The information describes the type of component and shall not be considered as assured characteristics.

Terms of delivery and rights to change design reserved. Due to technical requirements components may contain

dangerous substances. For information on the types in question plea se contact our Sales Organization.

If printed or downloaded, please find the latest version in the Internet .

Packing

Please use the recycling operators known to you. We can also help you – get in touch with your nearest sales office.

By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing

material that is retu rned to us unsorted or which we are not obliged to a ccept, we shall have t o invoice you for any costs

incurred.

Components used in life-support devices or systems must be expressly authorized for such purpose! Critical

components1) may only be used in life-support devices or systems2) with the express written approval of OSRAM OS.

1) A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the

failure of that life-support device or system, or to affect its safety or the effectiveness of that device or system.

2) Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain

human life. If they fail, it is reasonable to assume that the health and the life of the user may be endangered.

Revision History: 2006-01-23

Previous Version: 2005-01-10

Page Subjects (major changes since last revision) Date of change

all Lead free device 2006-01-23