ANALOG DEVICES 10-Bit 60 MSPS A/D Converter AD9020 FEATURES Monolithic 10-Bit/60 MSPS Converter TTL Outputs Bipolar (+1.75 V) Analog Input 56 dB SNR @ 2.3 MHz Input Low (45 pF) Input Capacitance MIL-STD-883 Compliant Versions Available APPLICATIONS Digital Oscilloscopes Medical Imaging Professional Video Radar Warning/Guidance Systems Infrared Systems GENERAL DESCRIPTION The AD9020 A/D converter is a 10-bit monolithic converter capable of word rates of 60 MSPS and above. Innovative archi- tecture using 512 input comparators instead of the traditional 1024 required by other flash converters reduces input capaci- tance and improves linearity. Encode and outputs are TTL-compatible, making the AD9020 an ideal candidate for use in low power systems. An overflow bit is provided to indicate analog input signals greater than + Vepwsp- Voltage sense lines are provided to insure accurate driving of the + Vegp voltages applied to the units. Quarter-point taps on the resistor ladder help optimize the integral linearity of the unit. Either 68-pin ceramic leaded (gull wing) packages or ceramic LCCs are available and are specifically designed for low thermal impedances. Two performance grades for temperatures of both 0 to +70C and 5SC to + 125C ranges are offered to allow the user to select the linearity best suited for each application. Dy- namic performance is fully characterized and production tested at +25C. MIL-STD-883 units are available. The AD9020 A/D Converter is available in versions compliant with MIL-STD-883. Refer to the Analog Devices Military Prod- ucts Databook or current AD9020/883B data sheet for detailed specifications. This is an abridged data sheet. To obtain the most recent version or complete data sheet, call our fax retrieval system at 1-800-446-6212. 2-410 ANALOG-TO-DIGITAL CONVERTERS FUNCTIONAL BLOCK DIAGRAM use LSBs INVERT INVERT AMALOG IN OVERFLOW AD9020 oan OVERFLOW D, (M38) De OVERFLOW Tne Oy SB} VVApae Meena Yner REV. ASPECIFICATIONS AD9020 ABSOLUTE MAXIMUM RATINGS V4purs V/2pep, V4gnp Current ............000. +10 mA AVG ee eee +6V Digital Output Current ..............-...000- 20 mA Vg ee eee -6V Operating Temperature ANALOGIN.................-52-05-5 -2Vwit2Vv AD9020JE/KE/JZ/KZ 2... eee 0 to +70C +Veeps Vrer 3/4eee Veer, V4eer .---- -2Vt0+2V Storage Temperature ................ 65C ta +150C +Veper tO Vppp i ee eee 4.0V Maximum Junction Temperature? .............. +175C DIGITAL INPUTS ..........00 00005. -0.5 V to +Vs Lead Soldering Temp (10 sec) .............4.. +300C ELECTRICAL CHARACTERISTICS (1, = +5 ; =Vseyse = 1.75 V; ENCODE = 40 MSPS unless otherwise noted)? Test ADM20JE/JJZ AD9020KE/KZ Parameter (Conditions) Temp Level Min Typ Max Min Typ Max Units RESOLUTION 10 10 Bits DC ACCURACY? Differential Nonlinearity + 25C I 1.0 1.25 0.75 1.0 LSB Full VI 1.5 1.25 LSB Integral Nonlinearity +25C I 1.25 2.0 1.0 1.5 LSB Full VI 2.5 2.0 LSB No Missing Codes Full VI Guaranteed ANALOG INPUT Input Bias Current* +25C I 0.4 1.0 0.4 1.0 mA Full VI 2.0 2.0 mA Input Resistance +25C I 2.0 7.0 2.0 7.0 kQ Input Capacitance* + 25C v 45 45 pF Analog Bandwidth +25C v 175 175 MHz REFERENCE INPUT Reference Ladder Resistance +28C I 22 37 56 22 37 56 0) Full VI 14 66 14 66 2 Ladder Tempco Full Vv 0.1 0.1 Q/C Reference Ladder Offset Top of Ladder +25C I 45 90 45 90 mV Full VI 90 90 mV Bottom of Ladder +25C I 45 90 45 90 mV Full VI 90 90 mV Offset Drift Coefficient Full v 50 50 pVPC SWITCHING PERFORMANCE Conversion Rate +25C I 60 60 MSPS Aperture Delay (t,) + 25C Vv ] 1 ns Aperture Uncertainty (Jitter) +25C Vv ps, rms Output Delay (top)? +28C I 6 10 13 6 10 13 ns Output Time Skew? +25C I ns DYNAMIC PERFORMANCE Transient Response +25C Vv 10 10 ns Overvoltage Recovery Time +25C Vv 10 10 ns Effective Number of Bits (ENOB) | fin = 2.3 MHz ) +25C I 8.6 9.0 ' 8.6 9.0 Bits fry = 10.3 MHz +25C IV 8.0 8.4 8.0 8.4 Bits fy = 15.3 MHz +25C IV 7.5 8.0 7.5 8.0 Bits Signal-to-Noise Ratio fin = 2.3 MHz + 25C I 54 56 54 56 dB fin = 10.3 MHz +25C I 50 53 50 53 dB fry = 15.3 MHz +25C I 47 50 47 50 dB Signal-co-Noise Ratio (Without Harmonics) fin = 2.3 MHz +25C I 54 56 54 56 dB fy = 10.3 MHz +25C I 51 54 51 54 dB fin = 15.3 MHz +25C I 48 52 48 52 dB REV. A ANALOG-TO-DIGITAL CONVERTERS 2-471ADS020 Test AD20JE/JZ AD9020KE/KZ Parameter (Conditions) Temp Level Min Typ Max Min Typ Max Units DYNAMIC PERFORMANCE (CONTINUED) Harmonic Distortion fy = 2.3 MHz +25C I 61 67 61 67 dBc fix = 10.3 MHz +25C I 55 59 55 59 dBc fin = 15.3 MHz +25C I 49 53 49 53 dBc Two-Tone Intermodulation Distortion Rejection +25C Vv 70 70 dBc Differential Phase +25C v 0.5 0.5 Degree Differential Gain +25C v 1 1 % ENCODE INPUT Logic '1 Voltage Full VI 2.0 2.0 v Logic 0 Voltage Full VI 0.8 0.8 Vv Logic 11 Current Full VI 20 20 pA Logic 0 Current Full VI 800 800 pA Input Capacitance +25C Vv 5 5 pF Pulse Width (High) +25C I 6 6 ns Pulse Width (Low} +25C I 6 6 ns DIGITAL OUTPUTS Logic 1 Voltage (Igy, = 2 mA) Full VI 2.4 2.4 Vv Logic 0 Voltage (Io, = 10 mA) Full VI 0.4 Vv POWER SUPPLY +V, Supply Current +25C I 440 530 440 530 mA Full VI 542 542 mA ~V, Supply Current +25C I 140 170 140 170 mA Full VI 177 177 mA Power Dissipation +25C I 2.8 3.3 2.8 3.3 WwW Full VI 3.4 3.4 Ww Power Supply Rejection Ratio (PSRR) Full VI 6 10 6 10 mvV/V NOTES Absolute maximum ratings are limiting values to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability. Typical thermal impedances (part soldered onto board): 68-pin leaded ceramic chip carrier: Oy = PCA; 6), = 17CW (no air flow); 8, = ISC/Ww (air flow = 500 LFM). 68-pin ceramic LCC: 6). = 2.6C/W; 0, = 15C/AW (no air flow); 6;, = 13C/W (air flow = 500 LFM). "Wger, U/2per, and V/4ggp reference ladder taps are driven from de sources at +0.875 V, 0 V, and 0.875 V, respectively. Accuracy of the overflow compara- tor is not tested and not included in linearity specifications. Measured with ANALOG IN = +Veewce- *Output delay measured as worst-case time from 50% point of the rising edge of ENCODE to 50% point of the slowest rising or falling edge of D,~D,. Output skew measured as worst-case difference in output delay among D,-D,. RMS signal to rms noise with analog input signal 1 dB below fuil scale at specified frequency. *Intermodulation measured with analog input frequencies of 2.3 MHz and 3.0 MHz at 7 dB below full scale. Measured as the ratio of the worst-case change in transition voltage of a single comparator for a 5% change in +V, or -V.. Specifications subject to change without notice. ORDERING GUIDE EXPLANATION OF TEST LEVELS Test Level Temperature Package I~ 100% production tested. Device Range Description Option* Ii - 100% production tested at + 25C, and sample tested at AD9020JZ 0 to +70C 68-Pin Leaded Ceramic | Z-68 specified temperatures. AD9020JE 0 to +70C 68-Pin Ceramic LCC |E-68A If ~ Sample tested only. AD9020KZ 0 to +70C 68-Pin Leaded Ceramic |Z-68 IV - Parameter is guaranteed by design and characterization AD9020KE 0 to +70C 68-Pin Ceramic LCC |E-68A testing. AD9020SZ/883 | 55C to + 125C | 68-Pin Leaded Ceramic | Z-68 V_- Parameter is a typical value only. AD9020SE/883 | -55C to +125C/68-Pin Ceramic LCC | E-68A VI - All devices are 100% production tested at +25C. 100% AD9020TZ/883| 55C to +125C| 68-Pin Leaded Ceramic |Z-68 production tested at temperature extremes for extended AD9020TE/883) 55C to +125C|68-Pin Ceramic LCC |E-68A temperature devices; sample tested at temperature ex- AD9020/PCB [0 to +70C Evaluation Board tremes for commercial/industrial devices. *E = Ceramic Leadless Chip Carrier; Z = Ceramic Leaded Chip Carrier, For outline information see Package Information section. 2-412 ANALOG-TO-DIGITAL CONVERTERS REV. AREV. A ADS020 b Zz c Qo S 2 2 S oa % aa u = PLS SMM GF ZYME OH RZS TESST STSSIT ESE mel | 61 nc F310 60 C4 ne +Vsense [& TC LSBs INVERT y) Vier F3 ca nc GNO F Cc -Vsense ENCOvE F Co ~Vner +,5 Fea cS 4, -V; Fa Cc 4, exp ADS8020 c Gnp +V, FF3 TOP VIEW cy 4a, (se), F5 (Not to scale) co overrLow 1-2 0, (MSB) 0, Fo co, DB; Fo co op, Do, F- cD, nc F9 cp, +, Fo cay +, Nc F226 44 NC 27 | 43 OY YO OQOAYWLYYAYVOOwWHyo Z7 72 Zert zt Zzt Iz AD39020 Pin Designations AD9020 PIN DESCRIPTIONS Pin No. Name Function 1 V/2per Midpoint of internal reference ladder. 2, 16, 28, 29, 35, -Vs Negative supply voltage; nominally 5.0 V +5%. 41, 42, 54, 64 3, 6, 15, 18, 25, 30, +V5 Positive supply voltage; nominally +5 V +5%. 33, 34, 37, 40, 45, 52, 55, 65, 68 4, 5, 13, 17, 27, 31, 32 GROUND All ground pins should be connected together and to low- 36, 38, 39, 43, 53, 66, 67 impedance ground plane. 7 3/4pEF Three-quarter point of internal reference ladder. 8,9 ANALOG IN Analog input; nominally between +1.75 V. 1] + VoensE Voltage sense line to most positive point on internal resistor ladder. Normally +1.75 V. 12 + Veer Voltage force connection for top of internal reference ladder. Normally driven to provide +1.75 V at +Vsense- 14 ENCODE TTL-compatible convert command used to begin digitizing process. 19-23, 46-50 D,-D, TTL-compatible digital output data. 51 OVERFLOW TTL-compatible output indicating ANALOG IN > +Vsense: 56 Veer Voltage force connection for bottom of internal reference ladder. Normally driven to provide 1.75 V at -Vogense- 57 Vesense Voltage sense line to most negative point on internal resistor ladder. Normally 1.75 V. 59 LSBs INVERT | Normally grounded. When connected to + Vs, lower order bits (Do-D,) are inverted. 61 MSB INVERT | Normally grounded. When connected to +V., most significant bit (MSB; D,) is inverted. 63 V4prr One-quarter point of internal reference ladder. ANALOG-TO-DIGITAL CONVERTERS 2-413