_______________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
General Description
The MAX15058 high-efficiency, current-mode, synchro-
nous step-down switching regulator with integrated
power switches delivers up to 3A of output current.
The device operates from 2.7V to 5.5V and provides an
output voltage from 0.6V up to 94% of the input voltage,
making the device ideal for distributed power systems,
portable devices, and preregulation applications.
The MAX15058 utilizes a current-mode control archi-
tecture with a high-gain transconductance error ampli-
fier. The current-mode control architecture facilitates
easy compensation design and ensures cycle-by-cycle
current limit with fast response to line and load transients.
The MAX15058 offers selectable skip-mode functional-
ity to reduce current consumption and achieve a higher
efficiency at light output load. The low RDS(ON) inte-
grated switches ensure high efficiency at heavy loads
while minimizing critical inductances, making the layout
design a much simpler task with respect to discrete
solutions. Utilizing a simple layout and footprint assures
first-pass success in new designs.
The MAX15058 features a 1MHz, factory-trimmed, fixed-
frequency PWM mode operation. The high switching fre-
quency, along with the PWM current-mode architecture,
allows for a compact, all-ceramic capacitor design.
The MAX15058 offers a capacitor-programmable soft-
start reducing inrush current, startup into PREBIAS
operations, and a PGOOD open-drain output that can be
used as an interrupt and for power sequencing.
The MAX15058 is available in a 9-bump (3 x 3 array),
1.5mm x 1.5mm WLP package and is specified over the
-40NC to +85NC temperature range.
Applications
Distributed Power Systems
Preregulators for Linear Regulators
Portable Devices
Notebook Power
Server Power
IP Phones
Features
S Internal 30mI (typ) RDS(ON) High-Side and 18mI
(typ) Low-Side MOSFETs at 5V
S Continuous 3A Output Current Over Temperature
S 95% Efficiency with 3.3V Output at 3A
S 1% Output Voltage Accuracy Over Load, Line, and
Temperature
S Operates from 2.7V to 5.5V Supply
S Cycle-by-Cycle Overcurrent Protection
S Adjustable Output from 0.6V to Up to 0.94 x VIN
S Programmable Soft-Start
S Factory-Trimmed, 1MHz Switching Frequency
S Stable with Low-ESR Ceramic Output Capacitors
S Safe-Startup Into Prebiased Output
S External Reference Input
S Skip-Mode Functionality
S Enable Input/Power-Good Output
S Fully Protected Against Overcurrent and
Overtemperature
S Input Undervoltage Lockout
19-5478; Rev 2; 7/11
+Denotes a lead(Pb)-free/RoHS-compliant package.
Ordering Information
Typical Operating Circuit
EVALUATION KIT
AVAILABLE
PART TEMP RANGE PIN-PACKAGE
MAX15058EWL+ -40°C to +85°C 9 WLP
IN LX
OUTPUT
1.8V/3A
INPUT
2.8V TO 5.5V
GND
FB
COMP
PGOOD
EN
SKIP
SS/REFIN
ON
OFF
ENABLE
MAX15058
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
2 ______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS
(VIN = 5V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) (Note 3)
ABSOLUTE MAXIMUM RATINGS
Note 1: LX has internal clamp diodes to GND and IN. Applications that forward bias these diodes should not exceed the IC’s pack-
age power dissipation limits.
IN, PGOOD to GND ................................................-0.3V to +6V
LX to GND ..................................................-0.3V to (VIN + 0.3V)
LX to GND .......................................-1V to (VIN + 0.3V) for 50ns
EN, COMP, FB, SS/REFIN, SKIP to GND ...-0.3V to (VIN + 0.3V)
LX Current (Note 1) ................................................... -6A to +6A
Output Short-Circuit Duration ....................................Continuous
Continuous Power Dissipation (TA = +70NC)
9-Bump WLP Multilayer Board
(derate 14.1mW/NC above TA = +70NC) ....................1127mW
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range ............................ -65NC to +150NC
Soldering Temperature (reflow) ......................................+260NC
WLP
Junction-to-Case Thermal Resistance (BJC) ...................26NC/W
Junction-to-Ambient Thermal Resistance (BJA) ..............71NC/W
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
PACKAGE THERMAL CHARACTERISTICS (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
IN Voltage Range VIN 2.7 5.5 V
IN Shutdown Supply Current VEN = 0V 0.2 2 FA
IN Supply Current IIN VEN = 5V, VFB = 0.65V, no switching 1.56 2.3 mA
VIN Undervoltage Lockout
Threshold LX starts switching, VIN rising 2.6 2.7 V
VIN Undervoltage Lockout
Hysteresis LX stops switching, VIN falling 200 mV
ERROR AMPLIFIER
Transconductance gMV 1.5 mS
Voltage Gain AVEA 90 dB
FB Set-Point Accuracy VFB Over line, load, and temperature 594 600 606 mV
FB Input Bias Current IFB VFB = 0.6V -500 +500 nA
COMP to Current-Sense
Transconductance gMC 18 A/V
COMP Clamp Low VFB = 0.65V, VSS = 0.6V 0.94 V
POWER SWITCHES
LX On-Resistance, High-Side
pMOS 30 mI
LX On-Resistance, Low-Side
nMOS 18 mI
High-Side Switch Current-Limit
Threshold IHSCL 5 A
Low-Side Switch Sink Current-
Limit Threshold 4 A
Low-Side Switch Source Current-
Limit Threshold 5 A
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 5V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) (Note 3)
Note 3: Specifications are 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by
design and characterization.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LX Leakage Current VEN = 0V 10 FA
RMS LX Output current 3 A
OSCILLATOR
Switching Frequency fSW 850 1000 1150 kHz
Maximum Duty Cycle DMAX 94 %
Minimum Controllable On-Time 70 ns
Slope Compensation Ramp
Valley 1.15 V
Slope Compensation Ramp
Amplitude VSLOPE Extrapolated to 100% duty cycle 320 mV
ENABLE
EN Input High Threshold Voltage VEN rising 1.45 V
EN Input Low Threshold Voltage VEN falling 0.4 V
EN Input Leakage Current VEN = 5V 0.025 FA
SKIP Input Leakage Current VSKIP = VEN = 5V 25 FA
SOFT-START, PREBIAS, REFIN
Soft-Start Current ISS VSS/REFIN = 0.45V, sourcing 10 FA
SS/REFIN Discharge Resistance RSS ISS/REFIN = 10mA, sinking 8.3 I
SS/REFIN Prebias Mode Stop
Voltage VSS/REFIN rising 0.58 V
External Reference Input Range 0 IN - 1.8 V
HICCUP
Number of Consecutive Current-
Limit Events to Hiccup 8 Events
Timeout 1024 Clock
Cycles
POWER-GOOD OUTPUT
PGOOD Threshold VFB rising 0.535 0.555 0.575 V
PGOOD Threshold Hysteresis VFB falling 28 mV
PGOOD VOL IPGOOD = 5mA, VFB = 0.5V 20 60 mV
PGOOD Leakage VPGOOD = 5V, VFB = 0.65V 0.013 FA
THERMAL SHUTDOWN
Thermal Shutdown Threshold 150 NC
Thermal Shutdown Hysteresis Temperature falling 20 NC
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
4 ______________________________________________________________________________________
Typical Operating Characteristics
(VIN = 5V, VOUT = 1.8V, ILOAD = 3A, Circuit of Figure 5, TA = +25NC, unless otherwise noted.)
OUTPUT VOLTAGE
vs. OUTPUT CURRENT
MAX15058 toc07
OUTPUT VOLTAGE (V)
1.89
1.87
1.85
1.83
1.81
1.79
1.77
1.75
OUTPUT CURRENT (A)
0 0.5 1.0 2.01.5 2.5 3.0
VOUT = 5V
VOUT = 3.3V
OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
MAX15058 toc06
OUTPUT VOLTAGE (V)
1.89
1.87
1.85
1.83
1.81
1.79
1.77
1.75
SUPPLY VOLTAGE (V)
2.7 3.2 3.7 4.74.2 5.2
IOUT = 0.5A
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
MAX15058 toc05
INPUT VOLTAGE (V)
SWITCHING FREQUENCY (kHz)
920
940
960
980
1000
1020
1040
1060
1080
1100
900
2.7 3.2 3.7 4.74.2 5.2
EFFICIENCY vs. OUTPUT CURRENT
(SKIP MODE)
MAX15058 toc04
OUTPUT CURRENT (A)
EFFICIENCY (%)
2.52.01.51.00.5
80
85
90
95
100
75
0 3.0
VIN = 3.3V
VOUT = 1.8V VOUT = 1.5V
VOUT = 1.2V
VOUT = 2.5V
EFFICIENCY vs. LOAD CURRENT
(SKIP MODE)
MAX15058 toc03
OUTPUT CURRENT (A)
EFFICIENCY (%)
2.52.01.51.00.5
80
85
90
95
100
70
75
0 3.0
VIN = 5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 2.5V
VOUT = 3.3V
EFFICIENCY vs. OUTPUT CURRENT
(FORCED PWM)
MAX15058 toc02
OUTPUT CURRENT (A)
EFFICIENCY (%)
2.52.01.51.00.5
80
85
90
95
100
75
0 3.0
VIN = 3.3V
VOUT = 1.8V VOUT = 1.5V
VOUT = 1.2V
VOUT = 2.5V
EFFICIENCY vs. LOAD CURRENT
(PWM MODE)
MAX15058 toc01
OUTPUT CURRENT (A)
EFFICIENCY (%)
2.52.01.51.00.5
80
85
90
95
100
75
0 3.0
VOUT = 3.3V
VIN = 5V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V VOUT = 1.2V
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(VIN = 5V, VOUT = 1.8V, ILOAD = 3A, Circuit of Figure 5, TA = +25NC, unless otherwise noted.)
SHUTDOWN WAVEFORM
MAX15058 toc12
VOUT
1V/div
VENABLE
5V/div
VPGOOD
5V/div
ILX
1A/div
10µs/div
INPUT AND OUTPUT
WAVEFORMS (IOUT = 3A)
MAX15058 toc11
INPUT
20mV/div
AC-COUPLED
OUTPUT
100mV/div
AC-COUPLED
400ns/div
SWITCHING WAVEFORM IN SKIP MODE
(IOUT = 10mA)
MAX15058 toc10
VOUT
50mV/div
AC-COUPLED
VLX
5V/div
ILX
1A/div
10µs/div
SWITCHING WAVEFORMS (IOUT = 3A)
MAX15058 toc09b
VOUT
20mV/div
AC-COUPLED
ILX
1AV/div
VLX
5V/div
0A
VIN = 3.3V
400ns/div
SWITCHING WAVEFORMS (IOUT = 3A)
MAX15058 toc09a
VOUT
20mV/div
AC-COUPLED
ILX
1AV/div
VLX
5V/div
0A
400ns/div
LOAD-TRANSIENT RESPONSE
MAX15058 toc08
50mV/div
AC-COUPLED
1A/div
100µs/div
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
6 ______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VIN = 5V, VOUT = 1.8V, ILOAD = 3A, Circuit of Figure 5, TA = +25NC, unless otherwise noted.)
FB VOLTAGE vs. TEMPERATURE
MAX15058 toc17
AMBIENT TEMPERATURE (°C)
FEEDBACK VOLTAGE (V)
806040200-20
596
598
600
602
604
606
594
-40
NO LOAD
RMS INPUT CURRENT
vs. INPUT VOLTAGE
MAX15058 toc16
INPUT VOLTAGE (V)
RMS INPUT CURRENT (mA)
5.24.94.64.34.03.73.43.1
40
80
120
160
200
0
2.8 5.5
SHORT CIRCUIT ON OUTPUT
SHORT-CIRCUIT HICCUP MODE
MAX15058 toc15
IIN
500mA/div
VOUT
200mV/div
IOUT
5A/div
200µs/div
SHUTDOWN CURRENT
vs. INPUT VOLTAGE
MAX15058 toc14
INPUT VOLTAGE (V)
SHUTDOWN CURRENT (nA)
5.24.74.23.73.2
10
20
30
40
50
60
70
80
90
100
0
2.7
VEN = 0V
SOFT-START WAVEFORMS
(SKIP MODE) (IOUT = 3A)
MAX15058 toc13b
VENABLE
5V/div
VOUT
1V/div
ILX
1A/div
VPGOOD
5V/div
200µs/div
SOFT-START WAVEFORMS
(PWM MODE) (IOUT = 3A)
MAX15058 toc13a
VENABLE
5V/div
VOUT
1V/div
ILX
1A/div
VPGOOD
5V/div
200µs/div
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
_______________________________________________________________________________________ 7
Typical Operating Characteristics (continued)
(VIN = 5V, VOUT = 1.8V, ILOAD = 3A, Circuit of Figure 5, TA = +25NC, unless otherwise noted.)
STARTING INTO A PREBIASED OUTPUT
(IOUT = 2A)
MAX15058 toc19
VENABLE
5V/div
VOUT
1V/div
VPGOOD
5V/div
ILX
1A/div
200µs/div
PWM MODE
STARTING INTO A PREBIASED OUTPUT
HIGHER THAN SET OUTPUT
MAX15058 toc21
VOUT
500mV/div
VSS/REFIN
500mV/div
IL
1A/div
400µs/div
1.8V
10I LOAD AT OUT
STARTING INTO A PREBIASED OUTPUT
(NO LOAD)
MAX15058 toc20b
VENABLE
5V/div
VOUT
1V/div
VPGOOD
5V/div
ILX
1A/div
200µs/div
SKIP MODE
STARTING INTO A PREBIASED OUTPUT
(NO LOAD)
MAX15058 toc20a
VENABLE
5V/div
VOUT
1V/div
VPGOOD
5V/div
ILX
1A/div
200µs/div
PWM MODE
SOFT-START WAVEFORMS
(EXTERNAL REFIN) (SKIP MODE)
MAX15058 toc18b
VSS/REFIN
500mV/div
VOUT
1V/div
VPGOOD
5V/div
ILX
1A/div
200µs/div
NO LOAD
SOFT-START WAVEFORMS
(EXTERNAL REFIN) (PWM MODE)
MAX15058 toc18a
VSS/REFIN
500mV/div
VOUT
1V/div
VPGOOD
5V/div
ILX
1A/div
200µs/div
NO LOAD
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
8 ______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VIN = 5V, VOUT = 1.8V, ILOAD = 3A, Circuit of Figure 5, TA = +25NC, unless otherwise noted.)
INPUT CURRENT (mA)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
INPUT CURRENT IN SKIP MODE
vs. OUTPUT VOLTAGE
MAX15058 toc23
OUTPUT VOLTAGE (V)
1.2 1.7 2.2 2.7 3.2
NO LOAD
VCC = 3.3V
VCC = 5.0V
CASE TEMPERATURE
vs. AMBIENT TEMPERATURE
MAX15058 toc22
AMBIENT TEMPERATURE (°C)
CASE TEMPERATURE (°C)
6040200-20
-20
0
20
40
60
80
100
-40
-40 80
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
_______________________________________________________________________________________ 9
Pin Description
Pin Configuration
BUMP NAME FUNCTION
A1 GND Analog Ground/Low-Side Switch Source Terminal. Connect to the PCB copper plane at one point near
the input bypass capacitor return terminal.
A2 LX Inductor Connection. Connect LX to the switched side of the inductor. LX is high impedance when the
IC is in shutdown mode.
A3 IN Input Power Supply. Input supply range is from 2.7V to 5.5V. Bypass with a minimum 10FF ceramic
capacitor to GND. See Figures 5 and 6.
B1 COMP Voltage Error-Amplifier Output. Connect the necessary compensation network from COMP to GND. See
the Closing the Loop: Designing the Compensation Circuitry section.
B2 SKIP Skip-Mode Input. Connect to EN to select skip mode or leave unconnected for normal operation.
B3 EN Enable Input. EN is a digital input that turns the regulator on and off. Drive EN high to turn on the regula-
tor. Connect to IN for always-on operation.
C1 FB Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to
set the output voltage from 0.6V up to 94% of VIN.
C2 SS/REFIN
Soft-Start/External Voltage Reference Input. Connect a capacitor from SS/REFIN to GND to set the startup
time. See the Setting the Soft-Start Time section for details on setting the soft-start time. Apply a voltage
reference from 0V to VIN - 1.5V to drive soft-start externally.
C3 PGOOD Open-Drain Power-Good Output. PGOOD goes high when FB is above 555mV and pulls low if FB is
below 527mV.
WLP
TOP VIEW
(BUMPS ON BOTTOM)
SS/REFINFB PGOOD
SKIPCOMP EN
LXGND IN
MAX15058
A1
B1
C1 C2 C3
B2 B3
A3A2
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
10 _____________________________________________________________________________________
BIAS
GENERATOR
EN LOGIC, IN UVLO
THERMAL SHDN
SKIP-MODE
LOGIC
CONTROL
LOGIC
SKPM
0.58V
CK
GND
PGOOD
EN
SS/REFIN
FB
RAMP
CK
COMP
SKIP
LX
IN
SHDN
VOLTAGE
REFERENCE
OSCILLATOR
RAMP GEN
SKPM
LX
SKPM
LX
IN
IN
IN
SINK
SOURCE
ZX
LOW-SIDE SOURCE-SINK
CURRENT LIMIT AND ZERO-
CROSSING COMPARATOR
0.6V
HIGH-SIDE
CURRENT LIMIT
STRONG PREBIASED
FORCED START
SS/REFIN BUFFER
ERROR AMPLIFIER
10µA
PWM
COMPARATOR
POWER-GOOD
COMPARATOR
CURRENT-SENSE
AMPLIFIER
0.555V RISING,
0.527V FALLING
MAX15058
C
Block Diagram
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
______________________________________________________________________________________ 11
Detailed Description
The MAX15058 high-efficiency, current-mode switching
regulator can deliver up to 3A of output current. The
MAX15058 provides output voltages from 0.6V to 0.94 x
VIN from 2.7V to 5.5V input supplies, making the device
ideal for on-board point-of-load applications.
The MAX15058 delivers current-mode control archi-
tecture using a high-gain transconductance error
amplifier. The current-mode control architecture facilitates
easy compensation design and ensures cycle-by-cycle
current limit with fast response to line and load transients.
The MAX15058 features a 1MHz fixed switching fre-
quency, allowing for all-ceramic capacitor designs and
fast transient responses. The high operating frequency
minimizes the size of external components. The
MAX15058 is available in a 1.5mm x 1.5mm (3 x 3 array)
x 0.5mm pitch WLP package.
The MAX15058 offers a selectable skip-mode functional-
ity to reduce current consumption and achieve a higher
efficiency at light output loads. The low RDS(ON) integrat-
ed switches (30mI high-side and 18mI low-side, typ)
ensure high efficiency at heavy loads while minimizing
critical inductances, making the layout design a much
simpler task with respect to discrete solutions. Utilizing
a simple layout and footprint assures first-pass success
in new designs.
The MAX15058 features 1MHz Q15%, factory-trimmed,
fixed-frequency PWM mode operation. The MAX15058 also
offers capacitor-programmable, soft-start reducing inrush
current, startup into PREBIAS operation, and a PGOOD
open-drain output for sequencing with other devices.
Controller Function—PWM Logic
The controller logic block is the central processor that
determines the duty cycle of the high-side MOSFET
under different line, load, and temperature conditions.
Under normal operation, where the current-limit and
temperature protection are not triggered, the controller
logic block takes the output from the PWM comparator
and generates the driver signals for both high-side and
low-side MOSFETs. The control logic block controls the
break-before-make logic and all the necessary timing.
The high-side MOSFET turns on at the beginning of
the oscillator cycle and turns off when the COMP volt-
age crosses the internal current-mode ramp waveform,
which is the sum of the slope compensation ramp and
the current-mode ramp derived from inductor current
(current-sense block). The high-side MOSFET also turns
off if the maximum duty cycle is 94%, or when the current
limit is reached. The low-side MOSFET turns on for the
remainder of the oscillation cycle.
Starting into a Prebiased Output
The MAX15058 can soft-start into a prebiased output
without discharging the output capacitor. In safe pre-
biased startup, both low-side and high-side MOSFETs
remain off to avoid discharging the prebiased output.
PWM operation starts when the voltage on SS/REFIN
crosses the voltage on FB.
The MAX15058 can start into a prebiased voltage higher
than the nominal set point without abruptly discharging
the output. Forced PWM operation starts when the SS/
REFIN voltage reaches 0.58V (typ), forcing the converter
to start. In case of prebiased output, below or above
the output nominal set point, if low-side sink current-limit
threshold (set to the reduced value of -0.4A (typ) for the
first 32 clock cycles and then set to -5A (typ)) is reached,
the low-side switch turns off before the end of the clock
period, and the high-side switch turns on until one of the
following conditions is satisfied:
• High-sidesourcecurrenthitsthereducedhigh-side
current limit (0.4A, typ); in this case, the high-side
switch is turned off for the remaining time of the clock
period.
• The clock period ends. Reduced high-side current
limit is activated to recirculate the current into the
high-side power switch rather than into the internal
high-side body diode, which could be damaged.
Low-side sink current limit is provided to protect the
low-side switch from excessive reverse current dur-
ing prebiased operation.
In skip mode operation, the prebias output needs to be
lower than the set point.
Enable Input
The MAX15058 features independent device enable
control and power-good signal that allow for flexible
power sequencing. Drive the enable input (EN) high to
enable the regulator, or connect EN to IN for always-on
operation. Power-good (PGOOD) is an open-drain out-
put that asserts when VFB is above 555mV (typ), and
deasserts low if VFB is below 527mV (typ).
Programmable Soft-Start (SS/REFIN)
The MAX15058 utilizes a soft-start feature to slowly ramp
up the regulated output voltage to reduce input inrush
current during startup. Connect a capacitor from SS/
REFIN to GND to set the startup time (see the Setting the
Soft-Start Time section for capacitor selection details).
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
12 _____________________________________________________________________________________
Error Amplifier
A high-gain error amplifier provides accuracy for the
voltage-feedback loop regulation. Connect the neces-
sary compensation network between COMP and GND
(see the Compensation Design Guidelines section). The
error-amplifier transconductance is 1.5mS (typ). COMP
clamp low is set to 0.94V (typ), just below the slope ramp
compensation valley, helping COMP to rapidly return to
the correct set point during load and line transients.
PWM Comparator
The PWM comparator compares COMP voltage to the
current-derived ramp waveform (LX current to COMP
voltage transconductance value is 18A/V typ). To avoid
instability due to subharmonic oscillations when the duty
cycle is around 50% or higher, a slope compensation
ramp is added to the current-derived ramp waveform.
Confirm the compensation ramp slope (0.3V x 1MHz
= 0.3V/Fs) is equivalent to half the inductor current
downslope in the worst case (load 3A, current ripple
30% and maximum duty-cycle operation of 94%). The
slope compensation ramp valley is set to 1.15V (typ).
Overcurrent Protection and Hiccup
When the converter output is shorted or the device is
overloaded, each high-side MOSFET current-limit event
(5A typ) turns off the high-side MOSFET and turns on the
low-side MOSFET. On each current-limit event a 3-bit
counter is incremented. The counter is reset after three
consecutive high-side MOSFETs turn on without reach-
ing current limit. If the current-limit condition persists,
the counter fills up reaching eight events. The control
logic then discharges SS/REFIN, stops both high-side
and low-side MOSFETs, and waits for a hiccup period
(1024 clock cycles typ) before attempting a new soft-
start sequence. The hiccup mode is also enabled during
soft-start time.
Thermal-Shutdown Protection
The MAX15058 contains an internal thermal sensor that
limits the total power dissipation to protect the device in
the event of an extended thermal fault condition. When
the die temperature exceeds +150NC (typ), the thermal
sensor shuts down the device, turning off the DC-DC
converter to allow the die to cool. After the die tempera-
ture falls by 20NC (typ), the device restarts, following the
soft-start sequence.
Skip Mode Operation
The MAX15058 operates in skip mode when SKIP is con-
nected to EN. When in skip mode, LX output becomes
high impedance when the inductor current falls below
200mA (typ). The inductor current does not become
negative. If during a clock cycle the inductor current falls
below the 200mA threshold (during off-time), the low side
turns off. At the next clock cycle, if the output voltage is
above set point, the PWM logic keeps both high-side
and low-side MOSFETs off. If instead the output voltage
is below the set point, the PWM logic drives the high-
side on for a minimum fixed on-time (300ns typ). In this
way the system can skip cycles, reducing frequency of
operations, and switches only as needed to service load
at the cost of an increase in output voltage ripple (see
the Skip Mode Frequency and Output Ripple section). In
skip mode, power dissipation is reduced and efficiency
is improved at light loads because power MOSFETs do
not switch at every clock cycle.
Applications Information
Setting the Output Voltage
The MAX15058 output voltage is adjustable from 0.6V
up to 94% of VIN by connecting FB to the center tap of a
resistor-divider between the output and GND (Figure 1).
Choose R1 and R2 so that the DC errors due to the FB
input bias current (Q500nA) do not affect the output volt-
age accuracy. With lower value resistors, the DC error
is reduced, but the amount of power consumed in the
resistor-divider increases. A typical value for R2 is 10kI,
but values between 5kI and 50kI are acceptable. Once
R2 is chosen, calculate R1 using:
OUT
FB
V
R1 = R2 1
V
× −
where the feedback threshold voltage, VFB = 0.6V (typ).
When regulating for an output of 0.6V in skip mode, short
FB to OUT and keep R2 connected from FB to GND.
Inductor Selection
A high-valued inductor results in reduced inductor ripple
current, leading to a reduced output ripple voltage.
However, a high-valued inductor results in either a larger
physical size or a high series resistance (DCR) and a
lower saturation current rating. Typically, choose an
inductor value to produce a current ripple equal to 30%
of load current. Choose the inductor with the following
formula:
OUT OUT
SW LOAD IN
V V
L 1
f LIR I V
= × −
× ×
where fSW is the internally fixed 1MHz switching frequen-
cy, and LIR is the desired inductor current ratio (typically
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
______________________________________________________________________________________ 13
set to 0.3). In addition, the peak inductor current, IL_PK,
must always be below the minimum high-side current-
limit value, IHSCL, and the inductor saturation current
rating, IL_SAT.
Ensure that the following relationship is satisfied:
( )
L_PK LOAD L HSCL_, L_SAT
1
I I I min I I
2
= + ∆ <
Input Capacitor Selection
The input capacitor reduces the peak current drawn from
the input power supply and reduces switching noise in
the device. The total input capacitance must be equal to
or greater than the value given by the following equation
to keep the input ripple voltage within the specification
and minimize the high-frequency ripple current being fed
back to the input source:
LOAD OUT
IN SW IN_RIPPLE IN
I V
Cf V V
= ×
× ∆
where DVIN_RIPPLE is the maximum-allowed input ripple
voltage across the input capacitors and is recommend-
ed to be less than 2% of the minimum input voltage,
fSW is the switching frequency (1MHz), and ILOAD is the
output load. The impedance of the input capacitor at
the switching frequency should be less than that of the
input source so high-frequency switching currents do not
pass through the input source, but are instead shunted
through the input capacitor.
The input capacitor must meet the ripple current require-
ment imposed by the switching currents. The RMS input
ripple current is given by:
( )
OUT IN OUT
RIPPLE LOAD
IN
V V V
I I
V
× −
=
where IRIPPLE is the input RMS ripple current.
Output Capacitor Selection
The key selection parameters for the output capacitor
are capacitance, ESR, ESL, and voltage rating. The
parameters affect the overall stability, output ripple volt-
age, and transient response of the DC-DC converter.
The output ripple occurs due to variations in the charge
stored in the output capacitor, the voltage drop due to
the capacitor’s ESR, and the voltage drop due to the
Figure 1. Peak Current-Mode Regulator Transfer Model
L
VCOMP IOUT
COMPARATOR
COMP
VCOMP
VFB
RC
ROUT
gMV
VIN
POWER MODULATOR OUTPUT FILTER
AND LOAD
NOTE: THE GMOD STAGE SHOWN ABOVE MODELS THE AVERAGE CURRENT OF
THE INDUCTOR, IL, INJECTED INTO THE OUTPUT LOAD, IOUT, e.g., IL = IOUT.
THIS CAN BE USED TO SIMPLIFY/MODEL THE MODULATION/CONTROL/POWER
STATE CIRCUITRY SHOWN WITHIN THE BOXED AREA.
*NOTE: CFF IS OPTIONAL AND DESIGNED TO EXTEND THE
REGULATOR’S GAIN BANDWIDTH AND INCREASED PHASE
MARGIN FOR SOME LOW-DUTY CYCLE APPLICATIONS.
ERROR AMPLIFIERFEEDBACK
DIVIDER
SLOPE
COMPENSATION
RAMP
gMC
DCR
IL
QLS
VOUT
VOUT
QHS IOUT
ESR
COUT
RLOAD
CC
REF
ROUT = 10AVEA(dB)/20/gMV
*CFF
FB
R1
R2
GMOD
PWM
CONTROL
LOGIC
C
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
14 _____________________________________________________________________________________
capacitor’s ESL. Estimate the output-voltage ripple due
to the output capacitance, ESR, and ESL as follows:
OUT OUT
OUT ESR_COUT
SW IN SW OUT
V V 1
V 1 R
f L V 8 f C
∆ = × − × +
× × ×
For ceramic capacitors, ESR contribution is negligible:
ESR_OUT SW OUT
1
R8 f C
<< × ×
For tantalum or electrolytic capacitors, ESR contribution
is dominant:
ESR_OUT SW OUT
1
R8 f C
>> × ×
Use these equations for initial output-capacitor selec-
tion. Determine final values by testing a prototype or an
evaluation circuit. A smaller ripple current results in less
output-voltage ripple. Since the inductor ripple current is
a factor of the inductor value, the output-voltage ripple
decreases with larger inductance. Use ceramic capaci-
tors for low ESR and low ESL at the switching frequency
of the converter. The ripple voltage due to ESL is negli-
gible when using ceramic capacitors.
Load-transient response also depends on the selected
output capacitance. During a load transient, the output
instantly changes by ESR x DILOAD. Before the controller
can respond, the output deviates further, depending on
the inductor and output capacitor values. After a short
time, the controller responds by regulating the output
voltage back to the predetermined value.
Use higher COUT values for applications that require
light load operation or transition between heavy load and
light load, triggering skip mode, causing output under-
shooting or overshooting. When applying the load, limit
the output undershoot by sizing COUT according to the
following formula:
LOAD
OUT CO OUT
I
C3f x V
∆
≅∆
where DILOAD is the total load change, fCO is the regula-
tor unity-gain bandwidth (or zero crossover frequency),
and DVOUT is the desired output undershooting. When
removing the load and entering skip mode, the device
cannot control output overshooting, since it has no sink
current capability; see the Skip Mode Frequency and
Output Ripple section to properly size COUT.
Skip Mode Frequency and Output Ripple
In skip mode, the switching frequency (fSKIP) and output
ripple voltage (VOUT-RIPPLE) shown in Figure 2 are cal-
culated as follows:
tON is a fixed time (300ns, typ); the peak inductor current
reached is:
IN OUT
SKIP LIMIT ON
V V
I t
L
−
−
= ×
Figure 2. Skip Mode Waveform
IL
VOUT
ISKIP-LIMIT
tON
ILOAD
VOUT-RIPPLE
tOFF1 tOFF2 = n × tCK
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
______________________________________________________________________________________ 15
tOFF1 is the time needed for inductor current to reach the
zero-current crossing limit (~0A):
SKIP LIMIT
OFF1 OUT
L I
tV
−
×
=
During tON and tOFF1, the output capacitor stores a
charge equal to (see Figure 2):
( )
2
SKIP LIMIT LOAD IN OUT OUT
OUT
1 1
L x I I x V V V
Q2
−
− +
−
∆ =
During tOFF2 (= n x tCK, number of clock cycles skipped),
output capacitor loses this charge:
( )
OUT
OFF2 LOAD
2
SKIP LIMIT LOAD IN OUT OUT
OFF2 LOAD
Q
tI
1 1
L x I I x V V V
t2 xI
−
∆
= ⇒
− +
−
=
Finally, frequency in skip mode is:
SKIP ON OFF1 OFF2
1
ft t t
=+ +
Output ripple in skip mode is:
( )
( )
( )
( )
OUT RIPPLE COUT RIPPLE ESR RIPPLE
SKIP LIMIT LOAD ON
OUT
ESR,COUT SKIP LIMIT LOAD
SKIP LIMIT
OUT RIPPLE ESR,COUT
OUT IN OUT
SKIP LIMIT LOAD
V V V
I I x t
C
R x I I
L x I
V R
C x V V
x I I
− − −
−
−
−
−
−
= +
−
=
+ −
= +
−
−
To limit output ripple in skip mode, size COUT based on
the above formula. All the above calculations are appli-
cable only in skip mode.
Compensation Design Guidelines
The MAX15058 uses a fixed-frequency, peak-current-mode
control scheme to provide easy compensation and fast
transient response. The inductor peak current is monitored
on a cycle-by-cycle basis and compared to the COMP
voltage (output of the voltage error amplifier). The regula-
tor’s duty cycle is modulated based on the inductor’s peak
current value. This cycle-by-cycle control of the inductor
current emulates a controlled current source. As a result,
the inductor’s pole frequency is shifted beyond the gain
bandwidth of the regulator. System stability is provided
with the addition of a simple series capacitor-resistor from
COMP to GND. This pole-zero combination serves to tailor
the desired response of the closed-loop system. The basic
regulator loop consists of a power modulator (comprising
the regulator’s pulse-width modulator, current sense and
slope compensation ramps, control circuitry, MOSFETs,
and inductor), the capacitive output filter and load, an
output feedback divider, and a voltage-loop error amplifier
with its associated compensation circuitry. See Figure 1.
The average current through the inductor is expressed as:
L MOD COMP
I G V= ×
where IL is the average inductor current and GMOD is the
power modulator’s transconductance.
For a buck converter:
OUT LOAD L
V R I= ×
where RLOAD is the equivalent load resistor value.
Combining the above two relationships, the power mod-
ulator’s transfer function in terms of VOUT with respect
to VCOMP is:
OUT LOAD L LOAD MOD
COMP L
MOD
V R I R G
V I
G
×
= = ×
The peak current-mode controller’s modulator gain
is attenuated by the equivalent divider ratio of the
load resistance and the current-loop gain’s impedance.
GMOD becomes:
( )
( )
MOD MC LOAD S
SW
1
G DC g R
1 K 1 D 0.5
f L
= ×
+ × × − −
×
where RLOAD = VOUT/IOUT(MAX), fSW is the switching
frequency, L is the output inductance, D is the duty cycle
(VOUT/VIN), and KS is a slope compensation factor cal-
culated from the following equation:
( )
SLOPE SLOPE SW MC
SN IN OUT
S V f L g
K 1 1
S V V
× × ×
= + = + −
where:
SLOPE
SLOPE SLOPE SW
SW
V
S V f
t
= = ×
( )
IN OUT
NMC
V V
SL g
−
=×
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
16 _____________________________________________________________________________________
As previously mentioned, the power modulator’s dominant
pole is a function of the parallel effects of the load resis-
tance and the current-loop gain’s equivalent impedance:
( )
PMOD 1
S
OUT LOAD SW
1
f
K 1 D 0.5
1
2 C ESR R f L
−
=
× − −
π × × + +
×
And knowing that the ESR is typically much smaller than
the parallel combination of the load and the current loop:
( )
1
S
LOAD SW
K 1 D 0.5
1
ESR R f L
−
× − −
<< +
×
( )
PMOD 1
S
OUT LOAD SW
1
f
K 1 D 0.5
1
2 C R f L
−
≈
× − −
π × × +
×
which can be expressed as:
( )
S
PMOD OUT LOAD SW OUT
K 1 D 0.5
1
f2 C R 2 f L C
× − −
≈ +
π × × π × × ×
Note: Depending on the application’s specifics, the
amplitude of the slope compensation ramp could have
a significant impact on the modulator’s dominate pole.
For low duty-cycle applications, it provides additional
damping (phase lag) at/near the crossover frequency
(see the Closing the Loop: Designing the Compensation
Circuitry section). There is no equivalent effect on the
power modulator zero, fZMOD.
ZMOD ZESR OUT
1
f f 2 C ESR
= = π × ×
Figure 3. Asymptotic Loop Response of Current-Mode Regulator
GAIN
1ST ASYMPTOTE
R2 × (R1 + R2)-1 × 10AVEA(dB)/20 × gMC × RLOAD × {1 + RLOAD × [KS × (1 - D) - 0.5] × (L × fSW)-1}-1
2ND ASYMPTOTE
R2 × (R1 + R2)-1 × gMV × (2GCC)-1 × gMC × RLOAD × {1 + RLOAD × [KS × (1 - D) - 0.5] × (L × fSW)-1}-1
3RD ASYMPTOTE
R2 × (R1 + R2)-1 × gMV × (2GCC)-1 × gMC × RLOAD × {1 + RLOAD × [KS × (1 - D) - 0.5] × (L × fSW)-1}-1 ×
(2GCOUT × {RLOAD-1 + [KS × (1 - D) - 0.5] × (L × fSW)-1}-1)-1
4TH ASYMPTOTE
R2 × (R1 + R2)-1 × gMV × RC × gMC × RLOAD × {1 + RLOAD × [KS × (1 - D) - 0.5] × (L × fSW)-1}-1 ×
(2GCOUT × {RLOAD-1 + [KS × (1 - D) - 0.5] × (L × fSW)-1}-1)-1
5TH ASYMPTOTE
R2 × (R1 + R2)-1 × gMV × RC × gMC × RLOAD × {1 + RLOAD × [KS × (1 - D) - 0.5] × (L × fSW)-1}-1 ×
(2GCOUT × {RLOAD-1 + [KS × (1 - D) - 0.5] × (L × fSW)-1}-1)-1 × (0.5 × fSW)2 × (2Gf)-2
6TH ASYMPTOTE
R2 × (R1 + R2)-1 × gMV × RC × gMC × RLOAD × {1 + RLOAD × [KS × (1 - D) - 0.5] × (L × fSW)-1}-1 ×
ESR × {RLOAD-1 + [KS × (1 - D) - 0.5] × (L × fSW)-1}-1 × (0.5 × fSW)2 × (2Gf)-2
UNITY
1ST POLE
[2GCC × (10AVEA(dB)/20 - gMV-1)]-1
2ND POLE
fPMOD*
3RD POLE (DBL)
0.5 × fSW
2ND ZERO
(2GCOUTESR)-1
FREQUENCY
fCO
1ST ZERO
(2GCCRC)-1
NOTE:
ROUT = 10AVEA(dB)/20 × gMV-1
fPMOD = [2GCOUT × (ESR + {RLOAD-1 + [KS × (1 - D) - 0.5] × (L × fSW)-1}-1)]-1
WHICH FOR
ESR << {RLOAD-1 + [KS × (1 - D) - 0.5] × (L × fSW)-1}-1
BECOMES
fPMOD = [2GCOUT × {RLOAD-1 + [KS × (1 - D) - 0.5] × (L × fSW)-1}-1]-1
fPMOD = (2GCOUT × RLOAD)-1 + [KS × (1 - D) - 0.5] × (2GCOUT × L × fSW)-1
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
______________________________________________________________________________________ 17
The effect of the inner current loop at higher frequen-
cies is modeled as a double-pole (complex conjugate)
frequency term, GSAMPLING(s), as shown:
( )
( )
SAMPLING 2
2SW C
SW
1
G s
s s 1
f Q
f
=
+ +
π × ×
π ×
where the sampling effect quality factor, QC, is:
( )
CS
1
QK 1 D 0.5
=
π × × − −
And the resonant frequency is:
ωSAMPLING(s) = π × fSW
or:
SW
SAMPLING
f
f2
=
Having defined the power modulator’s transfer function,
the total system transfer can be written as follows (see
Figure 3):
Gain(s) = GFF(s) × GEA(s) × GMOD(DC) × GFILTER(s) ×
GSAMPLING(s)
where:
( )
( )
( )
FF
FF FF
sC R1 1
R2
G s R1 R2 sC R1||R2 1
+
= ×
+
+
Leaving CFF empty, GFF(s) becomes:
( )
FF R2
G s R1 R2
=+
Also:
( )
( )
C C
AVEA(dB)/20
EA AVEA(dB)/20
C C MV
sC R 1
G s 10
10
sC R 1
g
+
= ×
+ +
which simplifies to:
( )
( )
C C
AVEA(dB)/20
EA AVEA(dB)/20
CMV
sC R 1
G s 10
10
sC 1
g
+
= ×
+
AVEA(dB)/20
CMV
10
when R g
<<
( )
( )
( )
OUT
FILTER LOAD 1
S
OUT LOAD SW
sC ESR 1
G s R
K 1 D 0.5
1
sC 1
R f L
−
+
= ×
× − −
+ +
×
The dominant poles and zeros of the transfer loop gain
are shown below:
( )
( )
MV
P1 AVEA(dB)/20 C
P2 S1
OUT LOAD SW
P3 SW
Z1 C C
Z2 OUT
g
f
2 10 C
1
fK 1 D 0.5
1
2 C R f L
1
f f
2
1
f2 C R
1
f2 C ESR
−
=π × ×
=
× − −
π × +
×
=
=π ×
=π ×
The order of pole-zero occurrence is:
P1 P2 Z1 CO P3 Z2
f f f f f f< ≤ < ≤ <
Under heavy load, fP2, approaches fZ1. Figure 3 shows
a graphical representation of the asymptotic system
closed-loop response, including dominant pole and zero
locations.
The loop response’s fourth asymptote (in bold, Figure 3)
is the one of interest in establishing the desired cross-
over frequency (and determining the compensation
component values). A lower crossover frequency pro-
vides for stable closed-loop operation at the expense of
a slower load- and line-transient response. Increasing
the crossover frequency improves the transient response
at the (potential) cost of system instability. A standard
rule of thumb sets the crossover frequency between
1/10 and 1/5 of the switching frequency. First, select
the passive power and decoupling components that
meet the application’s requirements. Then, choose the
small-signal compensation components to achieve the
desired closed-loop frequency response and phase
margin as outlined in the Closing the Loop: Designing
the Compensation Circuitry section.
Closing the Loop: Designing the
Compensation Circuitry
1) Select the desired crossover frequency. Choose fCO
approximately 1/10 to 1/5 of the switching frequency
(fSW).
2) Determine RC by setting the system transfer’s fourth
asymptote gain equal to unity (assuming fCO > fZ1,
fP2, and fP1) where:
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
18 _____________________________________________________________________________________
( )
( )
LOAD S
SW
C CO OUT
MV MC LOAD
S
LOAD SW
R K 1 D 0.5
1L f
R1 R2
R 2 f C
R2 g g R
1
ESR K 1 D 0.5
1
R L f
− −
+
×
+
= × × π ×
× ×
+
− −
+
×
and where the ESR is much smaller than the parallel
combination of the equivalent load resistance and the
current loop impedance, e.g.,:
( )
S
LOAD SW
1
ESR K 1 D 0.5
1
R L f
<<
− −
+
×
RC becomes:
CO OUT
CMV MC
2 f C
R1 R2
RR2 g g
π ×
+
= × ×
3) Determine CC by selecting the desired first sys-
tem zero, fZ1, based on the desired phase margin.
Typically, setting fZ1 below 1/5 of fCO provides suf-
ficient phase margin.
CO
Z1 C C
f
1
f2 C R 5
= ≤
π ×
therefore:
CCO C
5
C2 f R
≥π × ×
4) For low duty-cycle applications, the addition of a
phase-leading capacitor (CFF in Figure 1) helps
mitigate the phase lag of the damped half-frequency
double pole. Adding a second zero near to but below
the desired crossover frequency increases both the
closed-loop phase margin and the regulator’s unity-
gain bandwidth (crossover frequency). Select the
capacitor as follows:
( )
FF CO
1
C2 f R1|| R2
=π × ×
This guarantees the additional phase-leading zero
occurs at a frequency lower than fCO from:
PHASE_LEAD FF
1
f2 C R1
=π × ×
Using CFF the zero-pole order is adjusted as follows:
P1 P2 Z1 FF FF
CO P3 Z2
1 1
f f f 2 C R1 2 C (R1||R2)
f f f
< ≤ < < ≈
π π
< <
Confirm the desired operation of CFF empirically. The
phase lead of CFF diminishes as the output voltage
is a smaller multiple of the reference voltage, e.g.,
below about 1V. Do not use CFF when VOUT = VFB.
Setting the Soft-Start Time
The soft-start feature ramps up the output voltage slowly,
reducing input inrush current during startup. Size the
CSS capacitor to achieve the desired soft-start time, tSS,
using:
SS SS
SS FB
I t
CV
×
=
ISS, the soft-start current, is 10FA (typ) and VFB, the
output feedback voltage threshold, is 0.6V (typ). When
using large COUT capacitance values, the high-side
current limit can trigger during the soft-start period. To
ensure the correct soft-start time, tSS, choose CSS large
enough to satisfy:
OUT SS
SS OUT HSCL_ OUT FB
V I
C C (I I ) V
×
>> × − ×
IHSCL_ is the typical high-side MOSFET current-limit
value.
An external tracking reference with steady-state value
between 0V and VIN - 1.8V can be applied to SS/REFIN.
In this case, connect an RC network from external track-
ing reference and SS/REFIN, as shown in Figure 4. The
recommended value for RSS is approximately 1kI. RSS
is needed to ensure that, during hiccup period, SS/
REFIN can be internally pulled down.
When an external reference is connected to SS/REFIN,
the soft-start must be provided externally.
Figure 4. RC Network for External Reference at SS/REFIN
CSS
RSS
VREF_EXT SS/REFIN
MAX15058
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
______________________________________________________________________________________ 19
Power Dissipation
The MAX15058 is available in a 9-bump WLP package
and can dissipate up to 1127mW at TA = +70NC. When
the die temperature exceeds +150NC, the thermal-shut-
down protection is activated (see the Thermal-Shutdown
Protection section).
Layout Procedure
Careful PCB layout is critical to achieve clean and stable
operation. It is highly recommended to duplicate the
MAX15058 Evaluation Kit layout for optimum perfor-
mance. If deviation is necessary, follow these guidelines
for good PCB layout:
1) Connect the signal and ground planes at a single point
immediately adjacent to the GND bump of the IC.
2) Place capacitors on IN and SS/REFIN as close as
possible to the IC and the corresponding pad using
direct traces.
3) Keep the high-current paths as short and wide as
possible. Keep the path of switching current short
and minimize the loop area formed by LX, the output
capacitors, and the input capacitors.
4) Connect IN, LX, and GND separately to a large cop-
per area to help cool the IC to further improve effi-
ciency.
5) Ensure all feedback connections are short and
direct. Place the feedback resistors and compensa-
tion components as close as possible to the IC.
6) Route high-speed switching nodes (such as LX)
away from sensitive analog areas (such as FB and
COMP).
Figure 5. Application Circuit for PWM Mode Operation
LX
GND
FB
COMP
COUT
22µF x 2
OUTPUT
1.8V AT 3A
R2
4.02kI
R1
8.06kI
RC
5.36kI
CC
1nF
LOUT
1µH
CFF
100pF
1.2I
1nF
RPULL
20kI
CIN
22µF
IN
PGOOD
ENENABLE
SKIP
ON
OFF
CSS
22nF
SS/REFIN
MAX15058
INPUT
2.8V TO 5.5V (ICE IN06142)
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
20 _____________________________________________________________________________________
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Chip Information
PROCESS: BiCMOS
Figure 6. Application Circuit for Skip Mode Operation
LX
GND
FB
COMP
COUT
22µF x 2
OUTPUT
1.8V AT 3A
R2
4.02kI
R1
8.06kI
RC
5.36kI
CC
1nF
LOUT
1µH
CFF
100pF
1.2I
1nF
RPULL
20kI
CIN
22µF
IN
PGOOD
ENENABLE
SKIP
ON
OFF
CSS
22nF
SS/REFIN
MAX15058
INPUT
2.8V TO 5.5V (ICE IN06142)
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
9 WLP W91E1Z+1 21-0508
Refer to
Application
Note 1891
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
MAX15058
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Maxim reserves the right to change the circuitry and specifications without notice at any time.
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© 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 12/10 Initial release —
1 3/11 Revised Package Information section. 20
2 7/11 Changed the 1.65mm x 1.65mm, 9-bump package information to 1.5mm x 1.5mm,
9-bump package information. Inserted Typical Operating Circuit on page one. 1, 11
