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FEATURES
APPLICATIONS
1 16 15 14 13
5 6 7 8 9
2
3
4
12
11
10
GND
GND
VCC
GND
GND
LO
GND
QREF
IREF
RFOUT
GND IVIN
QVIN
GND
VCC
PWD
RHC PACKAGE
(TOP VIEW)
P0003-01
DESCRIPTION
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
1.5-GHz to 2.5-GHz QUADRATURE MODULATOR
71-dBc Single-Carrier WCDMA ACPR at–14-dBm Channel PowerP1dB of 7 dBmTypical Unadjusted Carrier Suppression35 dBc at 2 GHzTypical Unadjusted Sideband Suppression35 dBc at 2 GHzVery Low Noise FloorDifferential or Single-Ended I, Q InputsConvenient Single-Ended LO InputSilicon Germanium Technology
Cellular Base Transceiver Station TransmitChannel
IF Sampling ApplicationsTDMA: GSM, IS-136, EDGE/UWC-136CDMA: IS-95, UMTS, CDMA2000Wireless Local LoopWireless LAN IEEE 802.11LMDS, MMDSWideband Transceivers
The TRF3702 is an ultralow-noise direct quadrature modulator that is capable of converting complex inputsignals from baseband or IF directly up to RF. An internal analog combiner sums the real and imaginarycomponents of the RF outputs. This combined output can feed the RF preamp at frequencies of up to 2.5 GHz.The modulator is implemented as a double-balanced mixer. An internal local oscillator (LO) phase splitteraccommodates a single-ended LO input, eliminating the need for a costly external balun.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2006, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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+45°
–45°ΣRFOUT
IVIN
IREF
QVIN
QREF
LO
50
VCC
PWD GND
B0002-01
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may bemore susceptible to damage because very small parametric changes could cause the device not to meet its publishedspecifications.
AVAILABLE OPTIONS
T
A
4-mm ×4-mm 16-Pin RHC (QFN) Package
(1)
TRF3702IRHC–40 °C to 85 °C
TRF3702IRHCR (Tape and reel)
(1) For the most current package and ordering information, see thePackage Option Addendum at the end of this document, or see theTI website at www.ti.com .
FUNCTIONAL BLOCK DIAGRAM
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1 16 15 14 13
5 6 7 8 9
2
3
4
12
11
10
GND
GND
VCC
GND
GND
LO
GND
QREF
IREF
RFOUT
GND IVIN
QVIN
GND
VCC
PWD
RHC PACKAGE
(TOP VIEW)
P0003-01
ABSOLUTE MAXIMUM RATINGS
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTIONNAME NO.
GND 1, 2, 3, 5, 9, 11, 12 GroundIREF 15 I In-phase (I) reference voltage/differential inputIVIN 14 I In-phase (I) signal inputLO 4 I Local oscillator inputPWD 7 I Power downQREF 16 I Quadrature (Q) reference voltage/differential inputQVIN 13 I Quadrature (Q) signal inputRFOUT 8 O RF outputVCC 6, 10 Supply voltage
over operating free-air temperature range (unless otherwise noted)
(1) (2)
V
CC
Supply voltage range –0.5 V to 6 VLO input power level 10 dBmBaseband input voltage level (single-ended) 3 Vp-pT
A
Operating free-air temperature range –40 °C to 85 °CLead temperature for 10 seconds 260 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) Measured with respect to ground
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RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
MIN NOM MAX UNIT
Supplies and References
V
CC
Analog supply voltage 4.5 5 5.5 VVCM (IVIN, QVIN, IREF, QREF input common-mode voltage) 3.7 V
Local Oscillator (LO) Input
Input frequency 1500 2500 MHzPower level (measured into 50 ) –6 0 6 dBm
Signal Inputs (IVIN, QVIN)
Input bandwidth 700 MHz
Over recommended operating conditions, VCC = 5 V, VCM = 3.7 V, f
LO
= 2140 MHz at 0 dBm, T
A
= 25 °C (unless otherwisenoted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Power Supply
V(PWD) = 5 V 145 170I
CC
Total supply current mAV(PWD) = 0 V 13 30Turnon time 120 nsTurnoff time 20 nsPower-down input impedance 11 k
Local Oscillator (LO) Input
Input impedance
(1)
27 + j8
Signal Inputs (IVIN, QVIN, IREF, QREF)
Input bias current I, Q = VCM = 3.7 V (all inputs tied to VCM) 16 µASingle-ended input 260Input impedance k Differential input 130
(1) For a listing of impedances at various frequencies, see Table 1 .
Table 1. RFOUT and LO Pin Impedance
Frequency (MHz) Z (RFOUT Pin) Z (LO Pin)
1500 31 j 4.7 31.7 j 8.81600 30.9 j 0.3 29.3 j 6.21700 29.3 + j 3.1 27.3 - j 3.11800 27.9 + j 7.2 26.5 j 0.171900 27.6 + j 13 26.1+ j 2.72000 29.4 +j 19.8 26.5 + j 5.42100 34.6 + j 27.2 27 + j 7.62200 44.2 + j 33 28 + j 9.52300 60 + j 33.6 29 + j 10.62400 78 + j 21 29.5 + j 112500 82 j 5.8 29.8 + j 12.2
4
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RF OUTPUT PERFORMANCE
RF OUTPUT PERFORMANCE
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
Over recommended operating conditions, VCC = 5 V, VCM = 3.7 V, f
LO
= 1842 MHz at 0 dBm (unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Single and Two-Tone Specifications
Output power –5 –2.5 dBmSecond baseband harmonic
–50 –42 dBc(USB or LSB)
(2)
I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHzThird baseband harmonic
–57 –50 dBc(USB or LSB)
(2)
I, Q
(1)
= 1 Vp-p (two-tone signal, f
BB1
= 928 kHz,IMD
3
–59 –53 dBcf
BB2
= 992 kHz)P1dB (output compression
7 dBmpoint)
I, Q = VCM = 3.7 VDC (all inputs tied to VCM), 6-MHz offset
–155from carrierNSD Noise spectral density dBm/Hz6-MHz offset from carrier, P
out
= 0 dBm, over temperature –148.5 –146.5
(3)
RFOUT pin impedance
(4)
28 + j8 I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, unadjusted 30Carrier suppression I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, optimized 55 dBcI, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, over temperature
(5)
44I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, unadjusted 35Sideband suppression I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, optimized 55 dBcI, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, over temperature
(5)
47
(1) I , Q = 1 Vp-p implies that the magnitude of the signal at each input pin IVIN, IREF, QVIN, QREF is equal to 500 mVp-p.(2) USB = upper sideband. LSB = lower sideband.(3) Maximum noise values are assured by statistical characterization only, not production testing. The values specified are over the entiretemperature range, T
A
= –40 °C to 85 °C.(4) For a listing of impedances at various frequencies, see Table 1 .(5) After optimization at room temperature. See the Definitions of Selected Specifications section.
Over recommended operating conditions, VCC = 5 V, VCM = 3.7 V, f
LO
= 1960 MHz at 0 dBm (unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Single and Two-Tone Specifications
Output power –3 dBmSecond baseband harmonic
–50 dBc(USB or LSB)
(2)
I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHzThird baseband harmonic
–60 dBc(USB or LSB)
(2)
I, Q
(1)
= 1 Vp-p (two-tone signal, f
BB1
= 928 kHz,IMD
3
–59 –53 dBcf
BB2
= 992 kHz)P1dB (output compression
7 dBmpoint)NSD Noise spectral density 6-MHz offset from carrier, P
out
= 0 dBm, over temperature –148 –146.5
(3)
dBm/HzRFOUT pin impedance
(4)
28 + j15 I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, unadjusted 33Carrier suppression dBcI, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, optimized 55I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, unadjusted 35Sideband suppression dBcI, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, optimized 55
(1) I , Q = 1 Vp-p implies that the magnitude of the signal at each input pin IVIN, IREF, QVIN, QREF is equal to 500 mVp-p.(2) USB = upper sideband. LSB = lower sideband.(3) Maximum noise values are assured by statistical characterization only, not production testing. The values specified are over the entiretemperature range, T
A
= –40 °C to 85 °C.(4) For a listing of impedances at various frequencies, see Table 1 .
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RF OUTPUT PERFORMANCE
THERMAL CHARACTERISTICS
DEFINITIONS OF SELECTED SPECIFICATIONS
Unadjusted Carrier Suppression
Adjusted (Optimized) Carrier Suppression
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
Over recommended operating conditions, VCC = 5 V, VCM = 3.7 V, f
LO
= 2.1 GHz at 0 dBm (unless otherwise specified)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Single and Two-Tone Specifications
Output power –5 –3 dBmSecond baseband harmonic
–50 –42 dBc(USB or LSB)
(2)
I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHzThird baseband harmonic
–60 –51 dBc(USB or LSB)
(2)
I, Q
(1)
= 1 Vp-p, fBB = 928 kHz (two-tone signal,IMD
3
–55 –47 dBcf
BB1
= 928 kHz, f
BB2
= 992 kHz)P1dB (output compression
7 dBmpoint)NSD Noise spectral density 60-MHz offset from carrier, P
out
= 0 dBm, over temperature –151 –148.5
(3)
dBm/HzWCDMA ACPR Single carrier, channel power = –14 dBm 71 dBcRFOUT pin impedance
(4)
35 + j27 I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, unadjusted 30Carrier suppression I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, optimized 55 dBcI, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, over temperature
(5)
47I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, unadjusted 37Sideband suppression I, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, optimized 55 dBcI, Q
(1)
= 1 Vp-p, f
BB
= 928 kHz, over temperature
(5)
47
(1) I , Q = 1 Vp-p implies that the magnitude of the signal at each input pin IVIN, IREF, QVIN, QREF is equal to 500 mVp-p.(2) USB = upper sideband. LSB = lower sideband.(3) Maximum noise values are assured by statistical characterization only, not production testing. The values specified are over the entiretemperature range, T
A
= –40 °C to 85 °C.(4) For a listing of impedances at various frequencies, see Table 1 .(5) After optimization at room temperature. See the Definitions of Selected Specifications section.
PARAMETER CONDITION NOM UNIT
R
θJA
Thermal resistace, junction to ambient Soldered pad using four-layer JEDEC board with four thermal vias 42.8 °C/WR
θJM
Thermal resistace, junction to mounting 24.8 °C/WsurfaceR
θJC
Thermal resistace, junction to case Soldered pad using two-layer JEDEC board with four thermal vias 67.6 °C/W
This specification measures the amount by which the local oscillator component is attenuated in the outputspectrum of the modulator relative to the carrier. It is assumed that the baseband inputs delivered to the pins ofthe TRF3702 are perfectly matched to have the same dc offset (VCM). This includes all four baseband inputs:IVIN, QVIN, IREF and QREF. Unadjusted carrier suppression is measured in dBc.
This differs from the unadjusted suppression number in that the dc offsets of the baseband inputs are iterativelyadjusted around their theoretical value of VCM to yield the maximum suppression of the LO component in theoutput spectrum. Adjusted carrier suppression is measured in dBc.
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Unadjusted Sideband Suppression
Adjusted (Optimized) Sideband Suppression
Suppressions Over Temperature
f − Frequency Offset − kHz (Relative to Carrier)
−80
−70
−60
−50
−40
−30
−20
−10
0
10
−200 −150 −100 −50 0 50 100 150 200
P − Power − dBm
G007
3RD LSB
(dBc)
3RD LSB
2ND LSB
LSB
(Undesired)
POUT
SBS
(dBc)
Carrier
USB
(Desired)
2ND USB
(dBc)
2ND USB
3RD USB
CS
(dBc)
TYPICAL CHARACTERISTICS
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
DEFINITIONS OF SELECTED SPECIFICATIONS (continued)
This specification measures the amount by which the unwanted sideband of the input signal is attenuated in theoutput of the modulator, relative to the wanted sideband. It is assumed that the baseband inputs delivered to themodulator input pins are perfectly matched in amplitude and are exactly 90 °out of phase. Unadjusted sidebandsuppression is measured in dBc.
This differs from the unadjusted sideband suppression in that the baseband inputs are iteratively adjustedaround their theoretical values to maximize the amount of sideband suppression. Adjusted sidebandsuppression is measured in dBc.
This specification assumes that the user has gone through the optimization process for the suppression inquestion, and set the optimal settings for the I, Q inputs at T
A
= 25 °C. This specification then measures thesuppression when temperature conditions change after the initial calibration is done.
Figure 1 shows a simulated output and illustrates the respective definitions of various terms used in this datasheet. The graph assumes a baseband input of 50 kHz.
Figure 1. Graphical Illustration of Common Terms
For all the performance plots in this section, the following conditions were used, unless otherwise noted:VCC = 5 V, VCM = 3.7 V, P
LO
= 0 dBm, I and Q inputs driven differentially at a frequency of 50 kHz. In the caseof optimized suppressions, the point of optimization is noted and is always at nominal conditions and roomtemperature. A level of >50 dBc is assumed to be optimized.
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I, Q Amplitude − VPP
−25
−20
−15
−10
−5
0
5
10
0 1 2 3 4
POUT − Output Power − dBm
G001
–40°C
85°C
25°C
fLO = 1842 MHz
−25
−20
−15
−10
−5
0
5
10
0 1 2 3 4
POUT − Output Power − dBm
G002
–40°C
85°C
25°C
fLO = 1960 MHz
I, Q Amplitude − VPP
−25
−20
−15
−10
−5
0
5
10
0 1 2 3 4
POUT − Output Power − dBm
G003
–40°C
85°C
25°C
fLO = 2.1 GHz
I, Q Amplitude − VPP
fLO − Frequency − MHz
0
5
10
15
20
25
30
35
40
45
1400 1600 1800 2000 2200 2400 2600
CS − Unadjusted Carrier Suppression − dBc
G020
25°C
85°C–40°C
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
OUTPUT POWER OUTPUT POWERvs vsI, Q AMPLITUDE I, Q AMPLITUDE
Figure 2. Figure 3.
OUTPUT POWER UNADJUSTED CARRIER SUPPRESSIONvs vsI, Q AMPLITUDE FREQUENCY
Figure 4. Figure 5.
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fLO − Frequency − MHz
0
5
10
15
20
25
30
35
40
45
50
55
60
65
1400 1600 1800 2000 2200 2400 2600
SS − Unadjusted Sideband Suppression − dBc
G021
–40°C
85°C
25°C
POUT − Output Power − dBm
0
5
10
15
20
25
30
35
40
45
50
−25 −20 −15 −10 −5 0 5 10
fLO = 1960 MHz
CS − Unadjusted Carrier Suppression − dBc
G008
–40°C
25°C
85°C
POUT − Output Power − dBm
0
10
20
30
40
50
−25 −20 −15 −10 −5 0 5 10
fLO = 1960 MHz
SS − Unadjusted Sideband Suppression − dBc
G011
–40°C
25°C
85°C
0
10
20
30
40
50
60
70
80
1880 1900 1920 1940 1960 1980 2000 2020
fLO − Frequency − MHz
POUT = 0 dBm
Optimized at 1960 MHz
CS − Carrier Suppression − dBc
G025
25°C
Optimization
Point
–40°C85°C
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
UNADJUSTED SIDEBAND SUPPRESSION UNADJUSTED CARRIER SUPPRESSIONvs vsFREQUENCY OUTPUT POWER
Figure 6. Figure 7.
UNADJUSTED SIDEBAND SUPPRESSION CARRIER SUPPRESSIONvs vsOUTPUT POWER FREQUENCY
Figure 8. Figure 9.
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0
10
20
30
40
50
60
70
80
4.4 4.6 4.8 5.0 5.2 5.4 5.6
25°C
VCC − Supply Voltage − V
POUT = 0 dBm
fLO = 1960 MHz
Optimized at 5 V
CS − Carrier Suppression − dBc
G034
–40°C
Optimization
Point
85°C
0
10
20
30
40
50
60
70
80
90
3.0 3.5 4.0 4.5
VCM − V
POUT = 0 dBm
fLO = 1960 MHz
Optimized at 3.7 V
CS − Carrier Suppression − dBc
G028
25°C
–40°C
85°C
Optimization
Point
0
10
20
30
40
50
60
70
80
−12 −9 −6 −3 0 3 6 9 12
POUT = 0 dBm
fLO = 1960 MHz
Optimized at 0 dBm
CS − Carrier Suppression − dBc
G039
25°C
–40°C
Optimization
Point
PLO − Local Oscillator Input Power − dBm
85°C
0
10
20
30
40
50
60
70
80
1880 1900 1920 1940 1960 1980 2000 2020
–40°C
fLO − Frequency − MHz
POUT = 0 dBm
Optimized at 1960 MHz
SS − Sideband Suppression − dBc
G026
25°C
85°C
Optimization
Point
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
CARRIER SUPPRESSION CARRIER SUPPRESSIONvs vsVCM SUPPLY VOLTAGE
Figure 10. Figure 11.
CARRIER SUPPRESSION SIDEBAND SUPPRESSIONvs vsLOCAL OSCILLATOR INPUT POWER FREQUENCY
Figure 12. Figure 13.
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0
10
20
30
40
50
60
70
80
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
POUT = 0 dBm
fLO = 1960 MHz
Optimized at 5 V
SS − Sideband Suppression − dBc
G035
25°C
–40°C
85°C
Optimization
Point
0
10
20
30
40
50
60
70
80
90
3.0 3.5 4.0 4.5
VCM − V
POUT = 0 dBm
fLO = 1960 MHz
Optimized at 3.7 V
SS − Sideband Suppression − dBc
G029
–40°C
85°C
Optimization
Point
25°C
0
10
20
30
40
50
60
70
80
−12 −9 −6 −3 0 3 6 9 12
POUT = 0 dBm
fLO = 1960 MHz
Optimized at 0 dBm
SS − Sideband Suppression − dBc
G040
85°C
25°C
PLO − Local Oscillator Input Power − dBm
Optimization
Point
–40°C
fLO − Frequency − MHz
20
25
30
35
40
45
50
55
60
65
70
75
80
1780 1800 1820 1840 1860 1880 1900 1920 1940
CS − Carrier Suppression − dBc
G017
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 1842 MHz
Optimized at 1842 MHz
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
SIDEBAND SUPPRESSION SIDEBAND SUPPRESSIONvs vsVCM SUPPLY VOLTAGE
Figure 14. Figure 15.
SIDEBAND SUPPRESSION CARRIER SUPPRESSIONvs vsLOCAL OSCILLATOR INPUT POWER FREQUENCY
Figure 16. Figure 17.
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0
10
20
30
40
50
60
70
80
90
3.0 3.5 4.0 4.5
VCM − V
CS − Carrier Suppression − dBc
G043
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 1842 MHz
Optimized at 3.7 V
0
10
20
30
40
50
60
70
80
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
CS − Carrier Suppression − dBc
G044
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 1842 MHz
Optimized at 5 V
0
10
20
30
40
50
60
70
80
−12 −9 −6 −3 0 3 6 9 12
POUT = 0 dBm
TA = 25°C
fLO = 1842 MHz
Optimized at 0 dBm
CS − Carrier Suppression − dBc
G018
Optimization
Point
PLO − Local Oscillator Input Power − dBm
30
40
50
60
70
1780 1800 1820 1840 1860 1880 1900 1920
fLO − Frequency − MHz
SS − Sideband Suppression − dBc
G045
POUT = 0 dBm
TA = 25°C
fLO = 1842 MHz
Optimized at 1842 MHz
Optimization
Point
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
CARRIER SUPPRESSION CARRIER SUPPRESSIONvs vsVCM SUPPLY VOLTAGE
Figure 18. Figure 19.
CARRIER SUPPRESSION SIDEBAND SUPPRESSIONvs vsLOCAL OSCILLATOR INPUT POWER FREQUENCY
Figure 20. Figure 21.
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0
10
20
30
40
50
60
70
80
3.0 3.5 4.0 4.5
VCM − V
SS − Sideband Suppression − dBc
G050
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 1842 MHz
Optimized at 3.7 V
30
35
40
45
50
55
60
65
70
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
SS − Sideband Suppression − dBc
G051
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 1842 MHz
Optimized at 5 V
0
10
20
30
40
50
60
70
80
−12 −9 −6 −3 0 3 6 9 12
SS − Sideband Suppression − dBc
G049
PLO − Local Oscillator Input Power − dBm
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 1842 MHz
Optimized at 0 dBm
fLO − Frequency − MHz
20
25
30
35
40
45
50
55
60
65
70
75
80
2040 2060 2080 2100 2120 2140 2160 2180
CS − Carrier Suppression − dBc
G054
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 2.1 GHz
Optimized at 2.1 GHz
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
SIDEBAND SUPPRESSION SIDEBAND SUPPRESSIONvs vsVCM SUPPLY VOLTAGE
Figure 22. Figure 23.
SIDEBAND SUPPRESSION CARRIER SUPPRESSIONvs vsLOCAL OSCILLATOR INPUT POWER FREQUENCY
Figure 24. Figure 25.
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0
10
20
30
40
50
60
70
80
90
3.0 3.5 4.0 4.5
VCM − V
CS − Carrier Suppression − dBc
G056
POUT = 0 dBm
TA = 25°C
fLO = 2.1 GHz
Optimized at 3.7 V
Optimization
Point
40
45
50
55
60
65
70
75
80
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
CS − Carrier Suppression − dBc
G057
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 2.1 GHz
Optimized at 5 V
0
10
20
30
40
50
60
70
80
−12 −9 −6 −3 0 3 6 9 12
POUT = 0 dBm
TA = 25°C
fLO = 2.1 GHz
Optimized at 0 dBm
CS − Carrier Suppression − dBc
G055
Optimization
Point
PLO − Local Oscillator Input Power − dBm
fLO − Frequency − MHz
40
45
50
55
60
65
70
75
80
85
90
2040 2060 2080 2100 2120 2140 2160 2180
SS − Sideband Suppression − dBc
G058
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 2.1 GHz
Optimized at 1842 MHz
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
CARRIER SUPPRESSION CARRIER SUPPRESSIONvs vsVCM SUPPLY VOLTAGE
Figure 26. Figure 27.
CARRIER SUPPRESSION SIDEBAND SUPPRESSIONvs vsLOCAL OSCILLATOR INPUT POWER FREQUENCY
Figure 28. Figure 29.
14
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0
10
20
30
40
50
60
70
80
90
3.0 3.5 4.0 4.5
VCM − V
SS − Sideband Suppression − dBc
G060
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 2.1 GHz
Optimized at 3.7 V
0
10
20
30
40
50
60
70
80
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
SS − Sideband Suppression − dBc
G061
Optimization
Point
POUT = 0 dBm
TA = 25°C
fLO = 2.1 GHz
Optimized at 5 V
0
10
20
30
40
50
60
70
80
−12 −9 −6 −3 0 3 6 9 12
POUT = 0 dBm
TA = 25°C
fLO = 2.1 GHz
Optimized at 0 dBm
SS − Sideband Suppression − dBc
G059
Optimization
Point
PLO − Local Oscillator Input Power − dBm
fLO − Frequency − MHz
0
1
2
3
4
5
6
7
8
1400 1600 1800 2000 2200 2400 2600
P1dB − dBm
G019
85°C
–40°C
25°C
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
SIDEBAND SUPPRESSION SIDEBAND SUPPRESSIONvs vsVCM SUPPLY VOLTAGE
Figure 30. Figure 31.
SIDEBAND SUPPRESSION P1dBvs vsLOCAL OSCILLATOR INPUT POWER FREQUENCY
Figure 32. Figure 33.
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fLO − Frequency − MHz
−5
−4
−3
−2
−1
0
1
2
3
4
5
1700 1800 1900 2000 2100 2200 2300
POUT − Output Power Flatness − dBm
G022
–40°C
25°C85°C
VCM − V
−5
−4
−3
−2
−1
0
1
2
3
4
5
3.0 3.5 4.0 4.5 5.0
fLO = 1960 MHz
POUT − Output Power Flatness− dBm
G027
–40°C25°C
85°C
PLO − Local Oscillator Input Power − dBm
−5
−4
−3
−2
−1
0
1
2
3
4
5
−12 −9 −6 −3 0 3 6 9 12
fLO = 1960 MHz
POUT − Output Power Flatness − dBm
G038
–40°C25°C
85°C
VCC − Supply Voltage − V
−5
−4
−3
−2
−1
0
1
2
3
4
5
4.4 4.6 4.8 5.0 5.2 5.4 5.6
fLO = 1842 MHz
POUT − Output Power − dBm
G009
25°C
–40°C
85°C
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
OUTPUT POWER FLATNESS OUTPUT POWER FLATNESSvs vsFREQUENCY (P
OUT
= 0, –10 dBm NOMINAL) VCM (P
OUT
= 0 dBm NOMINAL)
Figure 34. Figure 35.
OUTPUT POWER FLATNESS OUTPUT POWER FLATNESSvs vsLO INPUT POWER (P
OUT
= 0 dBm NOMINAL) SUPPLY VOLTAGE (P
OUT
= 0 dBm NOMINAL)
Figure 36. Figure 37.
16
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−5
−4
−3
−2
−1
0
1
2
3
4
5
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
fLO = 1960 MHz
POUT − Output Power − dBm
G033
85°C
–40°C25°C
−5
−4
−3
−2
−1
0
1
2
3
4
5
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
fLO = 2.1 GHz
POUT − Output Power − dBm
G053
85°C
–40°C25°C
fLO − Frequency − MHz
−65
−60
−55
−50
−45
−40
−35
−30
1750 1850 1950 2050 2150 2250
POUT = 0 dBm
2nd USB − dBc
G023
–40°C
85°C
25°C
POUT − Output Power Per Tone − dBm
0
10
20
30
40
50
60
70
−15 −10 −5 0
fLO = 1.8 GHz
IMD3 − dBc
G016
85°C
–40°C
25°C
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
OUTPUT POWER FLATNESS OUTPUT POWER FLATNESSvs vsSUPPLY VOLTAGE (P
OUT
= 0 dBm NOMINAL) SUPPLY VOLTAGE (P
OUT
= 0 dBm NOMINAL)
Figure 38. Figure 39.
IMD3 2
ND
USBvs vsOUTPUT POWER PER TONE FREQUENCY
Figure 40. Figure 41.
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−80
−70
−60
−50
−40
−30
0 1 2 3 4
fLO = 1842 MHz
2nd USB − dBc
G004
–40°C
85°C
25°C
I, Q Amplitude − VPP
−80
−70
−60
−50
−40
−30
−20
−10
0
0 1 2 3 4
fLO = 1960 MHz
2nd USB − dBc
G005
85°C
25°C
I, Q Amplitude − VPP
–40°C
−80
−70
−60
−50
−40
−30
0 1 2 3 4
fLO = 2.1 GHz
2nd USB − dBc
G006
–40°C
85°C25°C
I, Q Amplitude − VPP
−65
−60
−55
−50
−45
−40
−35
−30
3.0 3.5 4.0 4.5
VCM − V
POUT = 0 dBm
fLO = 1960 MHz
2nd USB − dBc
G030
25°C
85°C
–40°C
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
2
ND
USB 2
ND
USBvs vsI, Q AMPLITUDE I, Q AMPLITUDE
Figure 42. Figure 43.
2
ND
USB 2
ND
USBvs vsI, Q Amplitude VCM
Figure 44. Figure 45.
18
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−70
−65
−60
−55
−50
−45
−40
−35
−30
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
POUT = 0 dBm
fLO = 1960 MHz
2nd USB − dBc
G036
25°C
85°C
–40°C
−65
−60
−55
−50
−45
−40
−35
−30
−12 −9 −6 −3 0 3 6 9 12
POUT = 0 dBm
fLO = 1842 MHz
2nd USB − dBc
G052
25°C
–40°C
PLO − Local Oscillator Input Power − dBm
85°C
−65
−60
−55
−50
−45
−40
−35
−30
−12 −9 −6 −3 0 3 6 9 12
POUT = 0 dBm
fLO = 2.1 GHz
2nd USB − dBc
G062
25°C
–40°C
PLO − Local Oscillator Input Power − dBm
85°C
−65
−60
−55
−50
−45
−40
−35
−30
−12 −9 −6 −3 0 3 6 9 12
POUT = 0 dBm
fLO = 1960 MHz
2nd USB − dBc
G041
85°C
25°C
–40°C
PLO − Local Oscillator Input Power − dBm
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
2
ND
USB 2
ND
USBvs vsSUPPLY VOLTAGE LOCAL OSCILLATOR INPUT POWER
Figure 46. Figure 47.
2
ND
USB 2
ND
USBvs vsLOCAL OSCILLATOR INPUT POWER LOCAL OSCILLATOR INPUT POWER
Figure 48. Figure 49.
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fLO − Frequency − MHz
−80
−75
−70
−65
−60
−55
−50
−45
−40
1700 1800 1900 2000 2100 2200
POUT = 0 dBm
3rd LSB − dBc
G024
25°C
–40°C85°C
I, Q Amplitude − VPP
−90
−80
−70
−60
−50
−40
−30
−20
0.0 0.5 1.0 1.5 2.0 2.5
fLO = 1842 MHz
3rd LSB − dBc
G013
–40°C
25°C
85°C
I, Q Amplitude − VPP
−90
−80
−70
−60
−50
−40
−30
−20
0.0 0.5 1.0 1.5 2.0 2.5
fLO = 1960 MHz
3rd LSB − dBc
G014
–40°C
25°C
85°C
I, Q Amplitude − VPP
−90
−80
−70
−60
−50
−40
−30
−20
0.0 0.5 1.0 1.5 2.0 2.5
fLO = 2.1 GHz
3rd LSB − dBc
G015
–40°C
25°C
85°C
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
3
RD
LSB 3
RD
LSBvs vsFREQUENCY I, Q AMPLITUDE
Figure 50. Figure 51.
3
RD
LSB 3
RD
LSBvs vsI, Q AMPLITUDE I, Q AMPLITUDE
Figure 52. Figure 53.
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−70
−60
−50
−40
−30
−20
−10
0
3.0 3.5 4.0 4.5
VCM − V
POUT = 0 dBm
fLO = 1960 MHz
3rd LSB − dBc
G031
25°C
85°C
–40°C
−80
−75
−70
−65
−60
−55
−50
−45
−40
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
POUT = 0 dBm
fLO = 1960 MHz
3rd LSB − dBc
G037
25°C
–40°C
85°C
−80
−75
−70
−65
−60
−55
−50
−45
−40
−12 −9 −6 −3 0 3 6 9 12
POUT = 0 dBm
fLO = 1960 MHz
3rd LSB − dBc
G042
–40°C
25°C
PLO − Local Oscillator Input Power − dBm
85°C
100
120
140
160
180
200
4.4 4.6 4.8 5.0 5.2 5.4 5.6
VCC − Supply Voltage − V
POUT = 0 dBm
fLO = 1960 MHz
ICC − Supply Current − mA
G032
85°C
–40°C
25°C
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
3
RD
LSB 3
RD
LSBvs vsVCM SUPPLY VOLTAGE
Figure 54. Figure 55.
3
RD
LSB SUPPLY CURRENTvs vsLOCAL OSCILLATOR INPUT POWER SUPPLY VOLTAGE
Figure 56. Figure 57.
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POUT − Output Power − dBm
−156
−154
−152
−150
−148
−146
−144
−142
−25 −20 −15 −10 −5 0 5
fLO = 1960 MHz
Noise − dBm/Hz
G046
25°C
85°C
–40°C
POUT − Output Power − dBm
−156
−154
−152
−150
−148
−146
−144
−142
−25 −20 −15 −10 −5 0 5
fLO = 2.1 GHz
Noise − dBm/Hz
G063
85°C
–40°C
25°C
Noise − dBm/Hz
0
2
4
6
8
10
12
14
16
Percentage
−150.0
−149.6
−149.8
−149.4
−149.2
−149.0
−148.8
−148.6
−148.4
−148.2
−148.0
−147.8
G065
POUT = 0 dBm
fLO = 1842 MHz
−147.6
−147.4
−147.2
Noise − dBm/Hz
0
2
4
6
8
10
12
14
16
18
20
Percentage
−148.4
−148.0
−148.2
−147.8
−147.6
−147.4
−147.2
−147.0
G064
POUT = 0 dBm
fLO = 1960 MHz
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
NOISE AT 6-MHz OFFSET NOISE AT 60-MHz OFFSETvs vsOUTPUT POWER OUTPUT POWER
Figure 58. Figure 59.
NOISE DISTRIBUTION AT 6-MHz NOISE DISTRIBUTION AT 6-MHzOFFSET OVER TEMPERATURE OFFSET OVER TEMPERATURE
Figure 60. Figure 61.
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Noise − dBm/Hz
0
2
4
6
8
10
12
14
16
18
20
Percentage
−151.8
−151.4
−151.6
−151.2
−151.0
−150.8
−150.6
−150.4
−150.2
−150.0
−149.8
−149.6
G066
POUT = 0 dBm
fLO = 2.1 GHz
−149.4
THEORY OF OPERATION
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
TYPICAL CHARACTERISTICS (continued)
NOISE DISTRIBUTION AT 60-MHzOFFSET OVER TEMPERATURE
Figure 62.
The TRF3702 employs a double-balanced mixer architecture in implementing the direct I, Q upconversion. The I,Q inputs can be driven single-endedly or differentially, with comparable performance in both cases. The commonmode level (VCM) of the four inputs (IVIN, IREF, QVIN, QREF) is typically set to 3.7 V and needs to be drivenexternally. These inputs go through a set of differential amplifiers and through a V-I converter to feed thedouble-balanced mixers. The ac-coupled LO input to the device goes through a phase splitter to provide thein-phase and quadrature signals that in turn drive the mixers. The outputs of the mixers are then summed,converted to single-ended signals, and amplified before they are fed to the output port RFOUT. The output ofthe TRF3702 is ac-coupled and can drive 50- loads.
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EQUIVALENT CIRCUITS
S0001-01
LO
50
S0003-01
RFOUT
Power Down 50 k
S0004-01
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
Figure 63 through Figure 66 show equivalent schematics for the main inputs and outputs of the device.
Figure 63. LO Equivalent Input Circuit Figure 64. IVIN, QVIN, IREF, QREF Equivalent Circuit
Figure 65. RFOUT Equivalent Circuit Figure 66. Power-Down (PWD) Equivalent Circuit
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APPLICATION INFORMATION
DRIVING THE I, Q INPUTS
Implementing a Single-to-Differential Conversion for the I, Q inputs
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
There are several ways to drive the four baseband inputs of the TRF3702 to the required amplitude and dcoffset. The optimal configuration depends on the end application requirements and the signal levels desired bythe designer.
The TRF3702 is by design a differential part, meaning that ideally the user should provide fully complementarysignals. However, similar performance in every respect can be achieved if the user only has single-endedsignals available. In this case, the IREF and QREF pins just need to have the VCM dc offset applied.
In case differential I, Q signals are desired but not available, the THS4503 family of wideband, low-distortion,fully differential amplifiers can be used to provide a convenient way of performing this conversion. Even ifdifferential signals are available, the THS4503 can provide gain in case a higher voltage swing is required.Besides featuring high bandwidth and high linearity, the THS4503 also provides a convenient way of applyingthe VCM to all four inputs to the modulator through the VOCM pin (pin 2). The user can further adjust the dclevels for optimum carrier suppression by injecting extra dc at the inputs to the operational amplifier, or byindividually adding it to the four outputs. Figure 67 shows a typical implementation of the THS4503 as a driverfor the TRF3702. Gain can be easily incorporated in the loop by adjusting the feedback resistors appropriately.For more details, see the THS4503 data sheet at www.ti.com.
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S0005-02
Single-Ended I Input 374
VCM
0.01 µF0.1 µF
+
VOCM
VOUT
VOUT+
8
2
1
5
4
NC
7
+VCC
3
−VCC
6
402
392
0.01 µF0.1 µF
+8 VA
10 pF
22.1 IREF IREF
22.1 IVIN IVIN
0.1 µF0.01 µF
−8 VA
392
10 pF
THS4503
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
APPLICATION INFORMATION (continued)
Figure 67. Using the THS4503 to Condition the Baseband Inputs to the TRF3702 (I Channel Shown)
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DRIVING THE LOCAL OSCILLATOR INPUT
CE
10
REFIN
8
LE
13
DATA
12
CLK
11
CPGND
AGND
DGND
RFINB 5
MUXOUT 14
RFINA 6
RSET 1
CPOUT 2
VCP 16
DVDD 15
AVDD 7
TRF3750
1 nF
CLK
DATA
LE
10 pF
VCP
1 nF 10 nF 82 pF
VVCO
100 pF
100 pF
100 pF
AVDD
100 pF
RSET
LOCK DETECT
VCO
V TUNE
GND GND
OUT
GND
SUPPLY
DECOUPLING NOT SHOWN
To TRF3702
LO Input
TCXO
(10-MHz Reference)
10 mF
0.1 mF
20 kW
3 . 9 kW
4 . 7 kW
16.5 W
1 6. 5 W
1 6. 5 W
4 9. 9 W
10 pF 10 mF
0.1 mF
3 4 9
0.1 mF
10 mF
10 pF
DVDD
0.1 mF
10 mF
+10 pF
+
+
+
S0009-02
PCB LAYOUT CONSIDERATIONS
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
APPLICATION INFORMATION (continued)
The LO pin is internally terminated to 50 , thus enabling easy interface to the LO source without the need forexternal impedance matching. The power level of the LO signal should be in the range of –6 dBm to 6 dBm. Forcharacterization purposes, a power level of 0 dBm was chosen. An ideal way of driving the LO input of theTRF3702 is by using the TRF3750, an ultralow-phase-noise integer-N PLL from Texas Instruments. Combiningthe TRF3750 with an external VCO can complete the loop and provide a flexible, convenient, and cost-effectivesolution for the local oscillator of the transmitter. Figure 68 shows a typical application for the LO driver networkthat incorporates the TRF3750 integer-N PLL synthesizer into the design. Depending on the VCO output and theamount of signal loss, an optional gain stage may be added to the output of the VCO before it is applied to theTRF3702 LO input.
Figure 68. Typical Application Circuit for Generating the LO Signal for the TRF3702 Modulator
The TRF3702 is a high-performance RF device; hence, care should be taken in the layout of the PCB in order toensure optimum performance. Proper decoupling with low-ESR ceramic chip capacitors is needed for the VCCsupplies (pins 6 and 10). Typical values used are in the order of 1 pF parallel to 0.1 µF, with the lower-valuedcapacitors placed closer to the device pins. In addition, a larger tank capacitor in the order of 10 µF should beplaced on the supply line as layout permits. At least a 4-layer board is recommended for the PCB. If possible, asolid ground plane and a ground pour is also recommended, as is a power plane for the supplies. Because thebalance of the four I, Q inputs to the modulator can be critical to device performance, care should be taken toensure that the trace runs for all four inputs are equal in length. In the case of single-ended drive of the I, Qinputs, the two unused pins IREF and QREF are fed with the VCM dc voltage only, and should be decoupledwith a 0.1- µF capacitor (or smaller). The LO input trace should be minimized in length and have controlledimpedance of 50 . No external matching components are needed because there is an internal 50- termination. The RFOUT pin should also have a relatively small trace to minimize parasitics and coupling, andshould also be controlled to 50 . An impedance-matching network can be used to optimize power transfer, butis not critical. All the results shown in the data sheet were taken with no impedance matching network used(RFOUT directly driving an external 50- load).
The exposed thermal and ground pad on the bottom of the TRF3702 should be soldered to ground to ensureoptimum electrical and thermal performance. The landing pattern on the PCB should include a solid pad and 4thermal vias. These vias typically have 1,2-mm pitch and 0,3-mm diameter. The vias can be arranged in a 2 ×2array. The thermal pad on the PCB should be at least 1,65 ×1,65 mm. A suggested layout is shown in Figure 69 .
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0.8 mm
3.5 mm
3.2 mm
1.2 mm
1 mm x 0.432 mm
(16 Places)
M0002-01
Via 0.3 mm Drill
(4 Places)
Power Pad
1.65 mm x 1.65 mm
IMPLEMENTING A DIRECT UPCONVERSION TRANSMITTER USING A TI DAC
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
APPLICATION INFORMATION (continued)
Figure 69. Board Layout for the TRF3702 Device
The TRF3702 is ideal for implementing a direct upconversion transmitter, where the input I, Q data can originatefrom an ASIC or a DAC. Texas Instruments' line of digital-to-analog converters (DAC) is ideally suited forinterfacing to the TRF3702. Such DACs include, among others, the DAC290x series, DAC5672, and DAC5686.
This section illustrates the use of the DAC5686, which offers a unique set of features that make interfacing tothe TRF3702 easy and convenient. The DAC5686 is a 16-bit, 500 MSPS, 2 ×–16 ×interpolating dual-channelDAC, and it features I, Q adjustments for optimal interface to the TRF3702. User-selectable, 11-bit offset and12-bit gain adjustments can optimize the carrier and sideband suppression of the modulator, resulting inenhanced performance and relaxed filtering requirements at RF. The preferred mode of operation of theDAC5686 for direct interface with the TRF3702 at baseband is the dual-DAC mode. The user also has theflexibility of selecting any one of the four possible complex spectral bands to be fed into the TRF3702. Fordetails on the available modes and programming, see the DAC5686 data sheet available at www.ti.com.
Figure 70 shows the DAC5686 in dual-DAC mode, which is best-suited for zero-IF interface to the TRF3702. Inthis mode, a seamless, passive interface between the DAC output and the input to the modulator is used, sothat no extra components are needed between the two devices. The optimum dc offset level for the inputs to theTRF3702 (VCM) is approximately 3.7 V. The output of the DAC should be centered around 3.3 V or less(depending on signal swing), in order to ensure that its output compliance limits are not exceeded. The resistivenetwork shown in Figure 70 allows for this dc offset transition while still providing a dc path between the DACoutput and the modulator. This ensures that the dc offset adjustments on the DAC5686 can still be applied tooptimize the carrier suppression at the modulator output. The combination of the DAC5686 and the TRF3702provides a unique signal-chain solution with state-of-the-art performance for wireless infrastructure applications.
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IOUTB1
IOUTB2
IOUTA1
IOUTA2
16-Bit
DAC
DA[15:0]
DB[15:0]
Fdata
A Gain
A
Offset
16-Bit
DAC
B
Offset
B Gain
DEMUX
GND +5 V
+5 VGND
+45°
–45°RFOUT
IVIN
IREF
QVIN
QREF
LO
50
VCC
PWD GND
Σ
DAC5686 TRF3701
S0010-01
221W221W49.9W
49.9W
15W
15W
15W
15W
221W221W49.9W
49.9W
GSM Applications
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
APPLICATION INFORMATION (continued)
Figure 70. DAC5686 in Dual-DAC Mode With Quadrature Modulator
The TRF3702 is ideally suited for GSM applications, because it combines high linearity with low noise levels.Figure 60 and Figure 61 show the distribution of noise vs output power for the TRF3702 over the entirerecommended temperature range. The level of noise attained in combination with the superior IMD3performance shown in Figure 40 means that the user can reach superior levels of C/N while maintaining highlinearity. This combination offers the capability of delivering low levels of EVM, meeting the stringentrequirements imposed by the GSM/EDGE standards. Figure 71 shows the spectral mask compliance for thedevice versus channel power, for both 400-kHz and 600-kHz offsets.
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Channel Power − dBm
0
10
20
30
40
50
60
70
80
90
−14 −12 −10 −8 −6 −4 −2 0
fLO = 2 GHz
GMSK Spectral Performance − dBc in 30 kHz
G047
600-kHz Offset
400-kHz Offset
WCDMA Applications
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
APPLICATION INFORMATION (continued)GMSK SPECTRAL PERFORMANCE
vsCHANNEL POWER
Figure 71.
The TRF3702 is also optimized for WCDMA applications, where both adjacent-channel power ratio (ACPR) andnoise density are critically important. Figure 62 shows the noise performance of the modulator at a 60-MHzoffset over temperature. In addition, Figure 72 shows the 60-MHz offset noise measured at the output of theTRF3702 versus WCDMA channel power. Using Texas Instruments' DAC568x series of high-performancedigital-to-analog converters in the configuration depicted in Figure 70 , state-of-the-art levels of ACPR have beenmeasured. In each case, test model 1 was used with 64 active channels as the baseband input to the TRF3702.Figure 73 shows the performance attained for a single WCDMA carrier at 2.14 GHz, with a measured ACPR of71.2 dBc for a channel power of –14 dBm. This unprecedented level of ACPR along with the low levels of noiseat 60-MHz offset makes the TRF3702 an optimum choice for such applications. Figure 74 shows thesingle-carrier WCDMA ACPR performance versus channel power; it is important to note that even at high outputpower levels, the TRF3702 maintains great linearity, offering 64 dBc of ACPR at an output-channel power of –8dBm.
30
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Channel Power − dBm
−153.6
−153.4
−153.2
−153.0
−152.8
−152.6
−152.4
−152.2
−152.0
−20 −15 −10 −5 0
Noise − dBm/Hz
G068
f − Frequency − MHz
−120
−100
−80
−60
−40
−20
0
2125 2130 2135 2140 2145 2150 2155
fLO = 2140 MHz
Channel Power = −14 dBm
ACPR = 71.2 dBc
Power − dBm
G067
Channel Power − dBm
63
64
65
66
67
68
69
70
71
72
−25 −20 −15 −10 −5 0
ACPR − dBc
G068
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
APPLICATION INFORMATION (continued)
NOISE AT 60-MHz OFFSET
vsWCDMA CHANNEL POWER SINGLE-CARRIER WCDMA PERFORMANCE
Figure 72. Figure 73.
SINGLE-CARRIER WCDMA ACPRvsCHANNEL POWER
Figure 74.
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Channel Power (Per Carrier) − dBm
57
58
59
60
61
62
63
64
−30 −25 −20 −15 −10
ACPR − dBc
G070
f − Frequency − MHz
−120
−100
−80
−60
−40
−20
0
2110 2120 2130 2140 2150 2160 2170
fLO = 2140 MHz
Total Carrier Power = −16.7 dBm
ACPR = 62.8 dBc
ALT ACPR = 63.7 dBc
Power − dBm
G069
TRF3702
SLWS149A SEPTEMBER 2004 REVISED AUGUST 2006
APPLICATION INFORMATION (continued)The TRF3702 can also be used for multicarrier applications, as is illustrated in Figure 75 . For a 4-carrier case ata total output power of –16.7 dBm, an ACPR of almost 63 dBc can be reached. Figure 76 shows the ACPRprofile for a 4-carrier WCDMA application versus per-carrier channel power. Further improvements inperformance can be achieved by including a low-pass filter between the output of the DAC and the input to theTRF3702, based on the frequency planning and specific requirements of a given design. The combination of theTRF3702, the DAC568x, and the TRF3750 provides a unique signal-chain chipset capable of deliveringstate-of-the-art levels of performance for the most challenging WCDMA applications.
FOUR-CARRIER WCDMA ACPRvsFOUR-CARRIER WCDMA ACPR PERFORMANCE CHANNEL POWER (PER CARRIER)
Figure 75. Figure 76.
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PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TRF3702IRHC ACTIVE VQFN RHC 16 92 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TRF3702IRHCG4 ACTIVE VQFN RHC 16 92 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TRF3702IRHCR ACTIVE VQFN RHC 16 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TRF3702IRHCRG4 ACTIVE VQFN RHC 16 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TRF3702IRHCR VQFN RHC 16 3000 330.0 12.4 4.3 4.3 1.5 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Feb-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TRF3702IRHCR VQFN RHC 16 3000 338.1 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Feb-2012
Pack Materials-Page 2
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