APL431 Adjustable Precision Shunt Regulator Features General Description * * The APL431 is a 3-terminal adjustable voltage reference with specified thermal stability over applicable commer- Precise Reference Voltage to 2.500V Guaranteed 0.5%, 1% or 2% Reference Voltage cial temperature ranges. Output voltage may be set to any value between VREF (2.5 V) and 20 V with two external Tolerance * * * * Sink Current Capability, 1mA to 100mA resistors (See Figure 2). When used with an photocoupler, the APL431 is an ideal voltage reference in isolated feed- Quick Turn-On Adjustable Output Voltage, VO = VREF to 20V back circuits for 2.5V to 12V switching-mode power supplies. This device has a typical output impedance of Low Operational Cathode Current, 250A Typical * * 0.1. Active output circuitry provides a very sharp turn-on characteristic, making the APL431 excellent replacements 0.1 Typical Output Impedance for zener diodes in many applications, including on-board regulation and adjustable power supplies. SOT-23-3, SOT-23-5, SOT-89, SOP-8, and TO-92 Packages * Lead Free and Green Devices Available (RoHS Compliant) Pin Configuration Applications * * * NC NC 5 4 ANODE Linear Regulators 3 Adjustable Power Supply 1 2 1 2 3 Switching Power Supply REF CATHODE Symbol SOT-23-3 (Top View) REF ANODE CATHODE SOT-23-5 (Top View) REF Anode Cathode 1 Functional Diagram REF 3 + _ 1 8 ANODE 2 7 ANODE ANODE 3 6 ANODE NC 4 5 NC REF ANODE CATHODE SOT-89 (Top View) Cathode REF 2 CATHODE SOP-8 (Top View) 3 CATHODE 2 ANODE Vref 1 REF Anode TO-92 (Top View) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 1 www.anpec.com.tw APL431 Ordering and Marking Information Elec. Grade A : 0.5% Reference Voltage Tolerance B : 1% Reference Voltage Tolerance C : 2% Reference Voltage Tolerance Package Code A : SOT-23-3 B : SOT-23-5 D : SOT-89 E : TO-92 K : SOP-8 Y : Chip Form Operating Ambient Temperature Range C : 0 to 70 oC I : -40 to 85 oC Handling Code TB : Tape & Box TR : Tape & Reel PB : Plastic & Box Assembly Material G : Halogen and Lead Free Device APL431 Assembly Material Handling Code Temperature Range Package Code Elec. Grade APL431 A/B : 431 APL431 D : APL431 XXXXX XXXXX - Date Code APL431 E : APL 431 XXXXX XXXXX - Date Code APL431 K : APL431 XXXXX XXXXX - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines "Green" to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings Symbol VKA IK IREF (Note 1) Parameter Rating Unit Cathode Voltage 21 V Continuous Cathode Current Range 100 mA 3 mA APL431XXC APL431XXI 0 to 70 -40 to 85 C APL431XXC APL431XXI 0 to 150 -40 to 150 C -65 to 150 C 260 C Reference Current Range Ambient Temperature Range TA Junction Temperature Range TJ TSTG Storage Temperature Range TSOL Maximum Lead Soldering Temperature, 10 Seconds Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 2 www.anpec.com.tw APL431 Thermal Characteristics Symbol Parameter Typical Value Thermal Resistance from Junction to Ambient in Free Air Unit (Note 2) SOT-23 SOT-23-5 SOT-89 TO-92 SOP-8 JA 416 357 250 250 210 C/W Note 2: JA is measured with the component mounted on a high effective thermal conductivity test board in free air. Electrical Characteristics Symbol VREF Parameter APL431 Test Conditions Reference Voltage VREF / T TA= 25C ( unless otherwise noted) Typ. Max. APL431A 2.487 2.500 2.513 APL431B 2.475 2.500 2.525 APL431C 2.450 2.500 2.550 - - 20 30 IK=10mA, VKA=VREF to 10V (Note 4) - -1.5 -3 (Note 4) - -1.2 -2.5 - 1.0 3 A - 0.3 1 A - 0.25 0.5 mA - 0.1 1 A - 0.1 0.4 - - 100 mA (Note 3) VKA=VREF, IK=10mA VKA=VREF,IK=10mA TA =0 to 70C (Note 3) TA =-40 to 85C (Note 3) Reference Voltage Drift Over Temperature Range VREF / VKA Voltage Ratio (Open Loop Gain) IK=10mA, VKA=VREF to 20V IREF Reference Current IK=10mA, R1=10k, R2=open (Note 4) IREF/T IK(min) IK=10mA, R1=10k, R2=open, TA= -40 to 85C (Note 4) VKA=VREF (Note 3) Reference Current Drift Min. Cathode Current IK(off) |ZKA| IK Unit Min. (Note 5) Off-state Cathode Current VKA= 20V, VREF= 0V Dynamic Impedance VKA=VREF IK=1mA to 100mA, f 1kHz (Note 3) Cathode Current V mV mV/V Note 3 : use Figure 1 Note 4 : use Figure 2 Note 5 : use Figure 3 Test Figures VIN VIN VO IK VREF Figure 1. Test Circuit for VKA=VREF , VO=VKA=VREF VO VIN IK R1 IREF R2 VREF Figure 2. Test Circuit for Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 VO IK(off) Figure 3. Test Circuit for IK(off) VKA>VREF, VO= VKA= VREFx (1+R1/R2) + IREF x R1 3 www.anpec.com.tw APL431 Typical Application Circuits RB VIN VIN Vo VO RB R1 R1 C1 VREF VREF R2 R2 Precision Voltage Reference Precision High-Current Series Regulator Notes for Typical Application Circuits: 1) For the series regulator applications, add a compensation capacitor C1 between CATHODE and REF is strongly recommended to improve the stability of output voltage . 2) Set VO according to the following equation: VO = VREF(1+R1/R2)+lREF xR1 3) Choose the value for RB as below: A) The maximum limit for RB should be such that the cathode current (lK) is greater than the minimum operating current (0.5mA) at VIN(MIN). B) The minimum limit for RB should be such that the cathode current (lK) does not exceed 100mA under all load conditions, and the instantaneous turn-on value for lK does not exceed 120mA. Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 4 www.anpec.com.tw APL431 Typical Operating Characteristics Reference Input Current vs. Ambient Cathode Current vs. Cathode Voltage Temperature 800 R1=10k R2= IK=10mA VKA=VREF TA=25oC 600 1.25 Cathode Current (A) Reference Input Current (A) 1.5 1 0.75 400 IK-MIN 200 0 0.5 -50 -25 0 25 50 75 100 -200 125 -1 0 Ambient Temperature (C) 2 3 Cathode Voltage (V) Cathode Current vs. Cathode Voltage Reference Voltage vs. Ambient Temperature 100 2.52 VKA=VREF TA=25oC VKA=VREF IK=100mA 2.515 2.51 50 Reference Voltage (V) Cathode Current (mA) 1 0 -50 2.505 2.5 2.495 2.49 2.485 2.48 2.475 -100 2.47 -50 -1 0 1 2 Cathode Voltage (V) Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 -25 0 25 50 75 100 125 3 Ambient Temperature (C) 5 www.anpec.com.tw APL431 Typical Operating Characteristics (Cont.) Off State Cathode Current vs. Cathode Voltage Pulse Response 6 Input VREF=0 TA=25 oC 2000 Input and Output Voltage (V) Off State Cathode Current (A) 2500 1500 1000 500 0 5 4 3 Output 2 1 -500 -5 0 5 10 15 20 25 0 30 3 4 5 6 Cathode Voltage (V) Temperature Cathode Voltage vs. Ambient Tmperature 0 VKA=20V VREF=0 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 12 13 Ratio of Delta Reference Voltage to Delta Ratio of Delta Reference Voltage to Delta Cathode Voltage (mV/V) Off-State Cathode Current (A) 0.8 10 11 Off-State Cathode Current vs. Ambient 1 0.9 7 8 9 Time (S) -25 0 25 50 75 100 VKA=VREF to 20V IKA=10mA -0.5 -0.75 -1 -1.25 -1.5 -1.75 -2 -2.25 -50 125 -25 0 25 50 75 100 125 Ambient Temperature (C) Ambient Temperature (C) Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 -0.25 6 www.anpec.com.tw APL431 Typical Operating Characteristics (Cont.) Small-Signal Voltage Amplification vs. Frequency Stability Boundary Conditions 100 90 50 Cathode Current (mA) Small-Signal Voltage Amplification (dB) 60 40 30 20 80 V KA=V REF 70 60 Stable 50 Stable 40 VKA=3.3V 30 20 10 10 0 1 10 100 0 0.01 1000 0.1 1 Load Capacitance (F) Frequency (kHz) Reference Impedance vs. Frequency Power Dissipation vs. Ambient Temperature 1 0.7 IK=100mA TA=25oC SOP-8 0.6 Power Dissipation (W) Reference Impedance () 10 500m 300m 200m SOT-89 & TO-92 0.5 0.4 0.3 0.2 SOT-23 SOT-23-5 0.1 100m 1k 2k 5k 10k 20k 0 50k 100k 200k 0 Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 Safe Operation Region 7 25 50 75 100 125 Ambient Temperature(TA) 150 www.anpec.com.tw APL431 Typical Operating Characteristics (Cont.) 232 VIN VO 10F 15k 8.25k Voltage Amplification Test Circuit VIN VO IK CL Stability Test Circuit for VKA=VREF VIN VO IK R1 10k CL R2 Stability Test Circuit for VKA>VREF, VO= VKA= VREF x (1+R1/R2) + IREF x R1 Use the MLCC for CL Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 8 www.anpec.com.tw APL431 Package Information SOT-23-3 D e E E1 SEE VIEW A c b 0.25 A L GAUGE PLANE SEATING PLANE 0 A1 A2 e1 VIEW A S Y M B O L SOT-23-3 INCHES MILLIMETERS MIN. MIN. MAX. A MAX. 0.057 1.45 0.00 0.15 0.000 0.006 A2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 A1 c 0.08 0.22 0.003 0.009 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 E1 1.40 1.80 0.055 e 0.95 BSC e1 0.071 0.037 BSC 1.90 BSC 0.075 BSC L 0.30 0.60 0 0 8 0.012 0 0.024 8 Note : Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 9 www.anpec.com.tw APL431 Package Information SOT-23-5 D e E E1 SEE VIEW A b c 0.25 A L 0 GAUGE PLANE SEATING PLANE A1 A2 e1 VIEW A S Y M B O L SOT-23-5 INCHES MILLIMETERS MIN. MIN. MAX. A MAX. 1.45 0.057 A1 0.00 0.15 0.000 0.006 A2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 c 0.08 0.22 0.003 0.009 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 E1 1.40 1.80 0.055 0.071 e 0.95 BSC e1 1.90 BSC 0.037 BSC 0.075 BSC L 0.30 0.60 0 0 8 0.012 0 0.024 8 Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 10 www.anpec.com.tw APL431 Package Information SOT-89 A C L H E E1 D D1 e e1 B B1 SOT-89 S Y M B O L A MIN. MAX. MIN. MAX. 1.40 1.60 0.055 0.063 B 0.44 0.56 0.017 0.022 B1 0.36 0.48 0.014 0.019 0.017 MILLIMETERS INCHES C 0.35 0.44 0.014 D 4.40 4.60 0.173 0.181 0.072 0.102 D1 1.62 1.83 0.064 E 2.29 2.60 0.090 E1 2.13 2.29 0.084 e 1.50 BSC e1 0.090 0.059 BSC 3.00 BSC 0.118 BSC H 3.94 4.25 0.155 0.167 L 0.89 1.20 0.035 0.047 Note : Follow JEDEC TO-243 AA. Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 11 www.anpec.com.tw APL431 Package Information A TO-92 E S D L j e1 b e TO-92 S Y M B O L MIN. MAX. MIN. MAX. A 4.32 5.33 0.170 0.210 b 0.41 0.53 0.016 0.021 D 4.45 5.20 0.175 0.205 E 3.18 4.19 0.125 0.165 e 2.42 2.66 0.095 0.105 e1 1.15 1.39 0.045 0.055 j 3.43 4.00 0.135 0.157 L 12.70 15.00 0.500 0.591 S 2.03 2.66 0.080 0.105 MILLIMETERS INCHES Note : Follow JEDEC TO-92. Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 12 www.anpec.com.tw APL431 Package Information SOP-8 D E E1 SEE VIEW A h X 45 c A 0.25 b GAUGE PLANE SEATING PLANE A1 A2 e L VIEW A S Y M B O L SOP-8 MILLIMETERS MIN. INCHES MAX. A MIN. MAX. 1.75 0.069 0.010 0.004 0.25 A1 0.10 A2 1.25 b 0.31 0.51 0.012 0.020 c 0.17 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 5.80 6.20 0.228 0.244 E1 3.80 4.00 0.150 0.157 e 0.049 1.27 BSC 0.050 BSC h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 0 0 8 0 8 Note: 1. Follow JEDEC MS-012 AA. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension "E" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 13 www.anpec.com.tw APL431 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application SOT-23-3 Application SOT-23-5 Application SOT-89 A H 178.02.00 50 MIN. P0 P1 T1 8.4+2.00 -0.00 P2 4.00.10 4.00.10 2.00.05 A H T1 178.02.00 50 MIN. P0 P1 8.4+2.00 -0.00 P2 d D W E1 F 1.5 MIN. 20.2 MIN. 8.00.30 1.75 0.10 3.50.05 D0 D1 T A0 B0 K0 3.200.20 3.10 0.20 1.500.20 1.5+0.10 -0.00 1.0 MIN. 0.6+0.00 -0.40 C d D W E1 F 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.00.30 1.75 0.10 3.50.05 D0 D1 T A0 B0 K0 3.200.20 3.10 0.20 1.500.20 1.5+0.10 -0.00 4.00.10 A H T1 C d D W E1 F 178.02.00 50 MIN. 12.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 12.00.30 1.75 0.10 5.500.05 P0 P1 P2 D0 D1 T A0 B0 K0 4.800.20 4.50 0.20 1.800.20 8.00.10 2.00.05 1.5+0.10 -0.00 1.0 MIN. 0.6+0.00 -0.40 4.00.10 4.00.10 2.00.05 C 13.0+0.50 -0.20 1.5 MIN. 0.6+0.00 -0.40 (mm) Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 14 www.anpec.com.tw APL431 Carrier Tape & Reel Dimensions (Cont.) A H T1 C d D W E1 F 330.02.00 50 MIN. 12.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 12.00.30 1.75 0.10 5.50.05 P0 P1 P2 D0 D1 T A0 B0 K0 6.400.20 5.20 0.20 2.100.20 Application SOP-8 4.00.10 8.00.10 2.00.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 (mm) Carrier Tape & Box Dimensions Devices Per Unit Package Type Unit Quantity SOT-23-3 Tape & Reel 3000 SOT-23-5 Tape & Reel 3000 SOT-89 Tape & Reel 1000 TO-92 Tape & Box 2000 SOP-8 Tape & Reel 2500 Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 15 www.anpec.com.tw APL431 Taping Direction Information SOT-23-3 USER DIRECTION OF FEED SOT-23-5 USER DIRECTION OF FEED SOT-89 USER DIRECTION OF FEED SOP-8 USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 16 www.anpec.com.tw APL431 Classification Profile Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 C 150 C 60-120 seconds 150 C 200 C 60-120 seconds 3 C/second max. 3C/second max. 183 C 60-150 seconds 217 C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 C/second max. 6 C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 17 www.anpec.com.tw APL431 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process - Classification Temperatures (Tc) Package Thickness <2.5 mm 2.5 mm Volume mm <350 235 C 220 C 3 Volume mm 350 220 C 220 C 3 Table 2. Pb-free Process - Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm - 2.5 mm 2.5 mm Volume mm <350 260 C 260 C 250 C 3 Volume mm 350-2000 260 C 250 C 245 C 3 Volume mm >2000 260 C 245 C 245 C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT ESD Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD 78 Description 5 Sec, 245C 1000 Hrs, Bias @ 125C 168 Hrs, 100%RH, 2atm, 121C 500 Cycles, -65C~150C VHBM2KV, VMM200V 10ms, 1tr100mA Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. C.7 - Mar., 2009 18 www.anpec.com.tw