TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DHigh Resolution, 1/3-in Solid-State Image
Sensor for NTSC Black and White
Applications
D340,000 Pixels per Field
DFrame Memory
D658 (H) × 496 (V) Active Elements in Image
Sensing Area Compatible With Electronic
Centering
DMultimode Readout Capability
– Progressive Scan
– Interlaced Scan
– Dual-Line Readout
– Image Area Line Summing
– Smear Subtraction
DFast Single-Pulse Clear Capability
DContinuous Electronic Exposure Control
From 1/60–1/50,000 s
D7.4-µm Square Pixels
DAdvanced Lateral Overflow Drain
Antiblooming
DLow Dark Current
DHigh Photoresponse Uniformity
DHigh Dynamic Range
DHigh Sensitivity
DHigh Blue Response
DSolid-State Reliability With No Image
Burn-In, Residual Imaging, Image
Distortion, Image Lag, or
Microphonics
description
The TC237B is a frame-transfer, charge-coupled device (CCD) image sensor designed for use in single-chip
black and white National Television Standards Committee (NTSC) TV, computer, and special-purpose
applications that require low cost and small size.
The image-sensing area of the TC237B device is configured into 500 lines with 680 elements in each line.
Twenty-two elements are provided in each line for dark reference. The antiblooming feature of the sensor is
based on an advanced lateral overflow drain concept. The sensor can be operated in a true interlace mode as
a 658(H) × 496(V) sensor with a low dark current. An important feature of the TC237B high-resolution sensor
is the ability to capture a full 340,000 pixels per field. The image sensor also provides high-speed image transfer
capability and a continuous electronic exposure control without the loss of sensitivity and resolution inherent
in other technologies. Charge voltage is converted to signal voltage at 13 µV per electron by a high-performance
structure with a reset and a voltage-reference generator. The signal is further buffered by a low-noise,
two-stage, source-follower amplifier to provide high-output drive capability.
The TC237B sensor is built using TI-proprietary advanced virtual-phase (AVP) technology, which provides
devices with high blue response, low dark current, high photoresponse uniformity, and single-phase clocking.
The TC237B sensor is characterized for operation from –10°C to 45°C.
This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together
or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to VSS. Under no
circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUT to VSS during operation to prevent
damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is
allowed to flow. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling
Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
DUAL-IN-LINE PACKAGE
(TOP VIEW)
ODB 1
IAG2 2
SUB 3
ADB 4
OUT1 5
OUT2 6
12 IAG1
11 SAG
10 SAG
9 SUB
8 SRG
7 RST
TI is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
Image Area With
Blooming Protection
Dark Reference Elements
Storage Area
Clearing Drain
3
1
2
4
6
5
SUB
ODB
IAG2
ADB
OUT2
OUT1
Amplifiers
4 Dummy Elements
9
8
7
10
12
11
IAG1
SAG
SAG
SUB
SRG
RST
sensor topology diagram
Single-Phase Storage Area
Two-Phase Image-Sensing Area
422
Optical Black
(OPB)
4 22 658 Active Pixels
Dummy Pixels
658 Active Pixels
4 Dark Lines
22 Dark-Reference Pixels
658 Active Pixels
496 Lines
500 Lines
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME NO. I/O DESCRIPTION
ADB 4 I Supply voltage for amplifier drain bias
IAG1 12 I Image area gate 1
IAG2 2 I Image area gate 2
ODB 1 I Supply voltage for drain antiblooming bias
OUT1 5 O Output signal 1
OUT2 6 O Output signal 2
RST 7 I Reset gate
SAG 10, 11 IStorage area gate
SRG 8 I Serial register gate
SUB 3, 9 Substrate
detailed description
The TC237B CCD image sensor consists of four basic functional blocks: the image-sensing area, the image
storage area, the serial register gates, and the low-noise signal processing amplifier block with charge detection
nodes and independent resets. The location of each of these blocks is identified in the functional block diagram.
image-sensing and image storage areas
Figure 1 and Figure 2 show cross sections with potential well diagrams and top views of the image-sensing and
storage area elements. As light enters the silicon in the image-sensing area, electrons are generated and
collected in the wells of the sensing elements. Blooming protection is provided by applying a dc bias to the
overflow drain bias pin. To clear the image before beginning a new integration time (for implementation of
electronic fixed shutter or electronic auto-iris), apply a pulse of at least 1 µs to the overflow drain bias. After
integration is complete, charge voltage is transferred into the storage area. The transfer timing depends on
whether the readout mode is interlace or progressive scan. If the progressive-scan readout mode is selected,
the readout may be performed by using one serial register or at high speed by using both serial registers (see
Figure 3 through Figure 5). A line-summing operation, which is useful in off-chip smear subtraction, can be
implemented before the parallel transfer (see Figure 6).
T wenty-two columns at the left edge of the image-sensing area are shielded from incident light; these elements
provide the dark reference used in subsequent video-processing circuits to restore the video black level. In
addition, four dark lines between the image-sensing and the image storage area prevent charge leakage from
the image-sensing area into the image storage area.
advanced lateral overflow drain
The advanced lateral overflow drain structure is shared by two neighboring pixels and provides several unique
features in the sensor . By varying the dc bias of the drain pin, you can control the blooming protection level and
trade it for the well capacity.
T o clear charge voltages in the image area, apply a 10-V pulse for a minimum duration of 1 µs above the nominal
dc bias level. This feature permits a precise control of the integration time on a frame-by-frame basis. The
single-pulse clear capability also reduces smear by eliminating accumulated charge from the pixels before the
start of the integration (single-sided smear).
Application of a negative 1-V pulse to the ODB signal during the parallel transfer is recommended to prevent
slight column-to-column pixel well capacity variations in some artifacts.
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3.8 µm
3.6 µm
7.4 µm
1.6 µm1.6 µm
Channel Stops
Including Metal Bus Lines
Clocked Barrier
Clocked Well
Virtual Barrier
Antiblooming
Device
Virtual Well
Clocked Gate
Figure 1. Image-Area Pixel Structure
3.5 µm
3.5 µm
7.4 µm
1.6 µm
Clocked Barrier
Clocked Well
Virtual Barrier
Virtual Well
Clocked Gate
1.6 µm
Channel Stops
Including Metal Bus Lines
Figure 2. Storage-Area Pixel Structure
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Expanded Section of
Parallel Transfer
IAG1, 2
SAG
SRG
1 µs Minimum
684 Pulses
684 Pulses
†
†
†‡
ODB
IAG1, 2
SAG
SRG
RST
Clear Integrate Transfer to Memory Readout
250 Cycles
Figure 3. Interlace Timing
†The number of parallel-transfer pulses is field dependent. Field 1 has 500 pulses of IAG1, IAG2, SAG, and SRG with appropriate phasing. Field 2
has 501 pulses.
‡The readout is from register 2.
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Expanded Section of
Parallel Transfer
IAG1, 2
SAG
SRG
1 µs Minimum
684 Pulses†
684 Pulses
ODB
IAG1, 2
SAG
SRG
RST
Clear Integrate Transfer to Memory Readout
500 Cycles
500 Pulses
500 Pulses
500 Pulses
†The readout is from register 2.
Figure 4. Progressive-Scan Timing With Single Register Readout
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Expanded Section of
Parallel Transfer
IAG1, 2
SAG
SRG
1 µs Minimum
684 Pulses
684 Pulses
ODB
IAG1, 2
SAG
SRG
RST
Clear Integrate Transfer to Memory Readout
250 Cycles
500 Pulses
500 Pulses
500 Pulses
Figure 5. Progressive-Scan Timing W ith Dual-Register Readout
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Expanded Section of
Parallel Transfer
IAG1, 2
SAG
SRG
1 µs Minimum
684 Pulses
684 Pulses
§
ODB
IAG2
SAG
SRG
RST
Clear Integrate Transfer to Memory Readout
250 Cycles
†
IAG1
Line
Sum
‡
Figure 6. Line-Summing Timing
†This pulse occurs only during field 1.
‡This pulse occurs only during field 2.
§While readout is from register 2, register 1 can be read out for off-chip smear subtraction.
The number of parallel transfer pulses if field dependent. Field 1 has 500 pulses, and field 2 has 501 pulses.
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
serial registers
The storage area gate and serial gate(s) are used to transfer charge line-by-line from the storage area into the
serial register(s). Depending on the readout mode, one or both serial registers are used. If both are used, the
registers are read out in parallel.
readout and video processing
After transfer into the serial register(s), the pixels are clocked out and sensed by a charge detection node. The
node must be reset to a reference level before the next pixel is placed onto it. The timing for the serial-register
readout, which includes the external pixel clamp and sample-and-hold signals needed to implement correlated
double sampling, is shown in Figure 7. As charge is transferred onto the detection node, the potential of the node
changes in proportion to the amount of the charge received. The change is sensed by an MOS transistor; after
proper buffering, the signal is supplied to the output terminal of the image sensor. Figure 8 shows the circuit
diagram of the charge detection node and output amplifier. The detection nodes and amplifiers are placed a
short distance from the edge of the storage area; therefore, each serial register contains 4 dummy elements
that are used to span the distance between the serial registers and the amplifiers.
OUT
RST
SRG
S/H
PCMP
Figure 7. Serial Readout and Video-Processing Timing
VOUT
ADBVREF
Reset
CCD Channel
QR Q1 Q2
Figure 8. Output Amplifier and Charge Detection Node
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, ADB (see Note 1) SUB to SUB + 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage range, ODB SUB to SUB + 21 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: IAG1, IAG2, SAG, SRG 0 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA –10°C to 45°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –30°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating case temperature range, TC –10°C to 55°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTE 1: All voltage values are with respect to SUB.
recommended operating conditions
MIN NOM MAX UNIT
ADB 21 22 23
Supply voltage V
For antiblooming control 15.5 16 16.5
V
Supply voltage, VCC ODB For clearing 25.5 26 26.5 V
ODB
For transfer 14.5 15 15.5
Substrate bias voltage 10 V
IAG1 IAG2
High level 11.5 12 12.5
IAG1, IAG2 Low level 0
Input voltage V
SAG
High level 11.5 12 12.5
V
Input voltage, VISAG Low level 0V
SRG RST
High level 11.5 12 12.5
SRG, RST Low level 0
IAG1, IAG2 12.5
Clock frequency, fclock SAG 12.5 MHz
Clock
frequency,
fclock
SRG, RST 12.5
MHz
Load capacitance OUT1, OUT2 6 pF
Operating free-air temperature, TA–10 45 °C
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER MIN TYP†MAX UNIT
Dynamic range (see Note 2)
With CDSठ64
dB
Dynamic range (see Note 2) Without CDSठ58 59 dB
Charge conversion factor 13 µV/e
Charge transfer ef ficiency (see Note 3) 0.9999 0.99995 1
Signal response delay time, τ (see Note 4) 12.5 ns
Gamma (see Note 5) 1
Output resistance 300 400 500 Ω
Amplifier noise equivalent signal
With CDS‡15 18 21
electrons
Amplifier noise equivalent signal Without CDS‡30 36 42 electrons
ADB (see Note 6) 20
Rejection ratio SRG (see Note 7) 45 dB
Rejection
ratio
ODB (see Note 8) 25
dB
Supply current 5 10 mA
IAG1, IAG2 2000
Input capacitance C
SRG 70
pF
Input capacitance, CiRST 10 pF
SAG 4000
†All typical values are at TA = 25°C.
‡CDS = Correlated double sampling, a signal-processing technique that improves noise performance by subtraction of reset noise.
§Performance depends on the particular implementation of the CDS technique and on the selected filter bandwidth that precedes sampling.
NOTES: 2. Dynamic range is –20 times the logarithm of the mean-noise signal divided by the saturation output signal.
3. Charge transfer efficiency is one minus the charge loss per transfer in the output register. The test is performed in the dark using
an electrical input signal.
4. Signal response delay time is the time between the falling edge of the SRG pulse and the output signal valid state.
5. Gamma (γ) is the value of the exponent in the equation below for two points on the linear portion of the transfer function curve (this
value represents points near saturation).
ǒExposure (2)
Exposure (1)Ǔg
+ǒOutput signal (2)
Output signal (1)Ǔ
6. ADB rejection ratio is –20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at ADB.
7. SRG rejection ratio is –20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at SRG.
8. ODB rejection ratio is –20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at ODB.
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
optical characteristics, TA = 40°C (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
Sensitivity (see Note 9)
No IR filter 256
mV/lux
Sensitivity (see Note 9) With IR filter 32 mV/lux
Saturation signal, Vsat (see Note 10) Antiblooming disabled TA =45°C 320 mV
Maximum usable signal, V use Antiblooming enabled TA =45°C 120 mV
Blooming overload ratio (see Note 11) 500
Image area well capacity 22K 30K 38K electrons
Smear (see Note 12) See Note 13 –78 dB
Dark current TA = 21°C 0.05 nA/cm2
Dark signal TA = 45°C 1 mV
Dark-signal uniformity TA = 45°C 0.5 mV
Dark-signal shading TA = 45°C 0.5 mV
Spurious nonuniformity
Dark TA = 45°C 10 mV
Spurious nonuniformity Illuminated, F#8 TA = 45°C 15 %
Column uniformity 0.5 mV
Electronic shutter capability 1/50,000 1/60 s
NOTES: 9. Theoretical value
10. Saturation is the condition in which further increase in exposure does not lead to further increase in output signal.
11. Blooming is the condition in which charge is induced in an element by light incident on another element. Blooming-overload ratio
is the ratio of blooming exposure to saturation exposure.
12. Smear is a measure of the error introduced by transferring charge through an illuminated pixel in shutterless operation. It is
equivalent to the ratio of the single-pixel transfer time to the exposure time using an illuminated section that is 1/10 of the image-area
vertical height with recommended clock frequencies.
13. The exposure time is 16.67 ms, the fast-dump clocking rate during vertical transfer is 12.5 MHz, and the illuminated section is 1/10
the height of the image section.
TYPICAL CHARACTERISTICS
W avelength [nm]
0.4
0.2
0400 500 600 700 800 900 1000 1100
Responsivity [A/W]
TC237B Spectral Responsivity
16.6 ms T-int (diagonal lines represent QE)
20%
DATA
40%
60%
Figure 9. Spectral Characteristics of the TC237B CCD Sensor
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
CCD_OUT1
IAG1
SAG
SAG
SUB
SRG
RST
ODB
IAG2
SUB
ADB
OUT 1
OUT 2
TC237
+12 V
CCD_OUT2
+15 V
CCD_ODB
ODB_CLK
ODB
Driver
+5 V
CCD_SAG
2 kΩ
2.7
kΩ
10 Ω
5.2
kΩ
3.3 kΩ
1.5
kΩ
3.3 kΩ
A1
A2
A3
A4
G
Y1
Y2
Y3
Y4
SRG_CLK
RST_CLK
74ACT240NS
Serial
Driver
0.1 µF
2.2 kΩ
4.7 Ω
–10
v
+2 V
560
Ω10 kΩ
560
Ω10 kΩ
4.7 Ω
10 Ω
10 Ω
0.1 µF
CCD_SRG
CCD_RST
0.1 µF
2.2 kΩ
4.7 Ω
–10
v
+2 V
560
Ω10 kΩ
560
Ω10 kΩ
4.7 Ω
10 Ω
10 Ω
0.1 µF
E1 E2
B1 B2
C1 C2
E1 E2
B1 B2
C1 C2
E1 E2
B1 B2
C1 C2
NC
OUTA
V+
OUTB
NC
INA
GND
INB
EL7202C
NC
OUTA
V+
OUTB
NC
INA
GND
INB
EL7202C
HN1A01F
HN1A01F
HN1A01F
IAG1_CLK
IAG2_CLK
SAG_CLK
1.2
kΩ
1.8
kΩ
1.8
kΩ1.8
kΩ
1.8
kΩ
1.8
kΩ
1.8
kΩ
Parallel
Driver
–10 V
CCD_IAG2
CCD_IAG
1
+2 V
3.9
kΩ
DEVICE
NOTES: A. Support circuits
B. Clock, DC voltages
EL7202C
74ACT240NS
FUNCTIONAPPLICATION
TTL level
+15 V, +12 V, +5 V, +2 V, 0 V, (Ground), –10 V
SRG_CLK, RST_CLK, ODB_CLK, IAG1_CLK,
IAG2_CLK, SAG_CLK
DC
Clock
Driver for IAG1, IAG2,SAG
Driver for SRG, RST
Parallel driver
Serial pre-driver
Figure 10. Typical Application Circuit Diagram
TC237B
680- × 500-PIXEL CCD IMAGE SENSOR
SOCS063 – APRIL 2001
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
The package for the TC237B consists of a ceramic base, a glass window, and a 12-lead frame. The glass window
is sealed to the package by an epoxy adhesive. The package leads are configured in a dual-in-line organization and
fit into mounting holes with 1,78 mm center-to-center spacings.
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
Index
Mark
11/00
4,15
4,45
11,10
11,50
3,40
0,17
2,80
11,18
10,95
1,48
3,35
0,41
1,65
0,76
10,75
12,00
12,40 11,85
1,78
1,91
0,51
3,65
2,08
11,68
3,30
0,33 4,00
11,05
5,64
5,94
Focus Plane
TC237 (12 pin)
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS
Optical
Center
Package
Center
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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its products to the specifications applicable at the time of sale in accordance with
TI’s standard warranty . T esting and other quality control techniques are utilized to the extent TI deems necessary
to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except
those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
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intellectual property right of TI covering or relating to any combination, machine, or process in which such
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Mailing Address:
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Post Office Box 655303
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Copyright 2001, Texas Instruments Incorporated