IRFB3607PbF IRFS3607PbF IRFSL3607PbF HEXFET(R) Power MOSFET Applications High Efficiency Synchronous Rectification in SMPS Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits VDSS RDS(on) typ. IRFB3607PbF IRFSL3607PbF TO-220 TO-262 IRFS3607PbF D2-Pak 9.0m 80A ID Benefits Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dV/dt and dI/dt Capability Package Type 7.34m max. D Base part number 75V D D S D G TO-220AB IRFB3607PbF S G D2-Pak IRFS3607PbF G Gate D Drain Standard Pack Form Quantity Tube 50 Tube 50 Tube 50 Tape and Reel Left 800 TO-262 IRFSL3607PbF S Source IRFB3607PbF IRFSL3607PbF IRFS3607PbF IRFS3607TRLPbF Symbol Parameter Continuous Drain Current, VGS @ 10V 80 ID @ TC = 100C IDM PD @TC = 25C Continuous Drain Current, VGS @ 10V Pulsed Drain Current Maximum Power Dissipation 56 310 140 VGS TJ TSTG S D Orderable Part Number ID @ TC = 25C Linear Derating Factor Gate-to-Source Voltage Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw G Max. Units A W 0.96 20 -55 to + 175 W/C V C 300 10 lbf*in (1.1N*m) Avalanche Characteristics EAS (Thermally Limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Thermal Resistance Symbol RJC RCS RJA RJA 1 Parameter Junction-to-Case Case-to-Sink, Flat, Greased Surface , TO-220 Junction-to-Ambient , TO-220 Junction-to-Ambient ( PCB Mount, steady state) 120 46 14 mJ A mJ Typ. Max. Units --- 0.50 --- 1.045 --- 62 40 C/W 2016-2-17 IRFB/S/SL3607PbF Static @ TJ = 25C (unless otherwise specified) Parameter V(BR)DSS Drain-to-Source Breakdown Voltage Min. 75 Typ. Max. Units --- --- V Conditions VGS = 0V, ID = 250A V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient --- 0.096 --- V/C Reference to 25C, ID = 5mA RDS(on) Static Drain-to-Source On-Resistance --- 7.34 9.0 m VGS = 10V, ID = 46A VGS(th) Gate Threshold Voltage 2.0 --- 4.0 IDSS Drain-to-Source Leakage Current --- --- 20 --- --- 250 IGSS Gate-to-Source Forward Leakage --- --- 100 Gate-to-Source Reverse Leakage --- --- -100 V A nA VDS = VGS, ID = 100A VDS = 75V, VGS = 0V VDS = 60V,VGS = 0V,TJ =125C VGS = 20V VGS = -20V Dynamic Electrical Characteristics @ TJ = 25C (unless otherwise specified) VDS = 50V, ID = 46A ID = 46A VDS = 38V nC VGS = 10V gfs Qg Qgs Qgd Qsync RG td(on) tr td(off) tf Ciss Coss Forward Trans conductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge Sync. (Qg - Qgd) Internal Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance 115 --- --- --- --- --- --- --- --- --- --- --- --- 56 13 16 40 0.55 16 110 43 96 3070 280 --- 84 --- --- --- --- --- --- --- --- --- --- Crss Reverse Transfer Capacitance --- 130 --- Coss eff.(ER) Effective Output Capacitance (Energy Related) --- 380 --- VDD = 49V ID = 46A ns RG= 6.8 VGS = 10V VGS = 0V VDS = 50V pF = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 0V to 60V Coss eff.(TR) Effective Output Capacitance (Time Related) --- 610 --- VGS = 0V, VDS = 0V to 60V Min. Typ. Max. Units --- --- 80 --- --- 310 --- --- --- --- --- --- --- --- 1.3 --- 50 59 48 71 --- Diode Characteristics Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage dv/dt Peak Diode Recovery trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time 27 33 39 32 47 1.9 S Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25C,IS = 46A,VGS = 0V V/ns TJ = 175C,IS = 46A,VDS=75V TJ = 25C VDD = 64V ns TJ = 125C IF = 46A, TJ = 25C di/dt = 100A/s nC TJ = 125C A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.12mH, RG = 25, IAS = 46A, VGS =10V. Part not recommended for use above this value. ISD 46A, di/dt 1920A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at TJ approximately 90C. 2 2016-2-17 IRFB/S/SL3607PbF 1000 1000 100 BOTTOM BOTTOM 100 4.5V 10 4.5V 60s PULSE WIDTH 60s PULSE WIDTH Tj = 175C Tj = 25C 10 1 0.1 1 10 0.1 100 Fig. 1 Typical Output Characteristics 100 3.0 100 T J = 175C 10 T J = 25C 1 VDS = 25V 60s PULSE WIDTH 0.1 2 3 4 5 6 7 ID = 80A VGS = 10V 2.5 (Normalized) R DS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (A) 10 Fig. 2 Typical Output Characteristics 1000 2.0 1.5 1.0 0.5 8 -60 -40 -20 0 20 40 60 80 100 120 140160 180 T J , Junction Temperature (C) VGS , Gate-to-Source Voltage (V) Fig. 4 Normalized On-Resistance vs. Temperature Fig. 3 Typical Transfer Characteristics 100000 12.0 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd VGS, Gate-to-Source Voltage (V) ID= 46A Coss = Cds + Cgd C, Capacitance (pF) 1 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) 10000 C iss C oss 1000 C rss 100 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 3 VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V VDS = 60V VDS = 38V VDS= 15V 10.0 8.0 6.0 4.0 2.0 0.0 0 10 20 30 40 50 60 QG, Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 2016-2-17 IRFB/S/SL3607PbF 1000 OPERATION IN THIS AREA LIMITED BY R DS (on) ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 100 T J = 175C 10 T J = 25C 1 100sec 100 1msec 10msec 10 Tc = 25C Tj = 175C Single Pulse VGS = 0V 0.0 0.5 1.0 1.5 1 2.0 10 Fig 8. Maximum Safe Operating Area V(BR)DSS , Drain-to-Source Breakdown Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 80 70 ID, Drain Current (A) 60 50 40 30 20 10 0 25 50 75 100 125 150 100 Id = 5mA 95 90 85 80 75 70 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 175 T J , Temperature ( C ) TC , Case Temperature (C) Fg 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage 500 EAS , Single Pulse Avalanche Energy (mJ) 1.20 1.00 0.80 Energy (J) 100 VDS , Drain-to-Source Voltage (V) VSD , Source-to-Drain Voltage (V) 0.60 0.40 0.20 ID TOP 5.6A 11A BOTTOM 46A 450 400 350 300 250 200 150 100 50 0 0.00 -10 0 10 20 30 40 50 60 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 DC 1 0.1 70 80 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) Fig 12. Maximum Avalanche Energy vs. Drain Current 2016-2-17 IRFB/S/SL3607PbF Thermal Response ( Z thJC ) C/W 10.00 1.00 D = 0.50 0.20 0.10 0.05 0.10 J 0.02 0.01 0.01 R1 R1 J 1 R2 R2 R3 R3 R4 R4 C 2 1 2 3 4 3 Ci= iRi Ci= iRi 1E-005 i (sec) 0.01109 0.000003 0.26925 0.000130 0.49731 0.001301 0.26766 0.008693 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.00 1E-006 C 4 Ri (C/W) 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse) 100 0.01 10 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Avalanche Current vs. Pulse width EAR , Avalanche Energy (mJ) 150 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 46A 125 100 75 50 25 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) Fig 15. Maximum Avalanche Energy vs. Temperature 5 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.infineon.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 18a, 18b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 13, 14). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3*BV*Iav) = T/ ZthJC Iav = 2T/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav 2016-2-17 IRFB/S/SL3607PbF 20 IF = 31A V R = 64V 4.0 TJ = 25C TJ = 125C 15 3.5 3.0 IRR (A) VGS(th) , Gate Threshold Voltage (V) 4.5 ID = 100A 2.5 10 ID = 250A ID = 1.0mA 2.0 5 ID = 1.0A 1.5 1.0 0 -75 -50 -25 0 25 50 75 100 125 150 175 200 0 200 T J , Temperature ( C ) Fig 16. Threshold Voltage vs. Temperature 600 800 1000 Fig. 17 - Typical Recovery Current vs. dif/dt 560 20 IF = 46A V R = 64V 480 IF = 31A VR = 64V TJ = 25C TJ = 125C 400 TJ = 25C TJ = 125C QRR (nC) 15 IRR (A) 400 diF /dt (A/s) 10 320 240 160 5 80 0 0 0 200 400 600 800 0 1000 200 400 600 800 1000 diF /dt (A/s) diF /dt (A/s) Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt QRR (nC) 560 480 IF = 46A VR = 64V 400 TJ = 25C TJ = 125C 320 240 160 80 0 0 200 400 600 800 1000 diF /dt (A/s) Fig. 20 - Typical Stored Charge vs. dif/dt 6 2016-2-17 IRFB/S/SL3607PbF Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V(BR)DSS 15V tp L VDS D.U.T RG IAS 20V tp DRIVER + V - DD A 0.01 Fig 22a. Unclamped Inductive Test Circuit Fig 23a. Switching Time Test Circuit I AS Fig 22b. Unclamped Inductive Waveforms Fig 23b. Switching Time Waveforms Id Vds Vgs Vgs(th) Qgs1 Qgs2 Fig 24a. Gate Charge Test Circuit 7 Qgd Qgodr Fig 24b. Gate Charge Waveform 2016-2-17 IRFB/S/SL3607PbF TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB Part Marking Information EXAM PLE: T H IS IS A N IR F 1 0 1 0 LO T C O D E 1789 ASSEM BLED O N W W 19, 2000 IN T H E A S S E M B L Y L IN E "C " N o t e : "P " in a s s e m b ly lin e p o s it io n in d ic a t e s "L e a d - F r e e " IN T E R N A T IO N A L R E C T IF IE R LO G O ASSEM BLY LO T C O D E PART NUM BER D ATE C O D E YEA R 0 = 2000 W EEK 19 L IN E C TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 2016-2-17 IRFB/S/SL3607PbF D2-Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches)) D2-Pak (TO-263AB) Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO PART NUMBER F530S DATE CODE YEAR 0 = 2000 WEEK 02 LINE L ASSEMBLY LOT CODE OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER F530S DATE CODE P = DESIGNATES LEAD - FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASSEMBLY SITE CODE Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 2016-2-17 IRFB/S/SL3607PbF TO-262 Package Outline (Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 ASSEMBLED ON WW19, 1997 IN THE ASSEMBLYLINE "C" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = ASSEMBLY SITE CODE Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 10 2016-2-17 IRFB/S/SL3607PbF D2-Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 60.00 (2.362) MIN. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 11 2016-2-17 IRFB/S/SL3607PbF Qualification Information Industrial Qualification Level Moisture Sensitivity Level TO-220 N/A D2-Pak MSL1 TO-262 N/A Yes RoHS Compliant Qualification standards can be found at International Rectifier's web site: http://www.irf.com/product-info/reliability/ Applicable version of JEDEC standard at the time of product release. Revision History Date 02/17/2016 Comments Updated datasheet with corporate template Corrected Fig.6 label from VDS=24V & 15V to VDS= 60V,38V,15V-on page 3. Removed note 1 to correct typo on page 2. Corrected label for Fig.19 & Fig.20 from (A) to (nC) on page 6. Published by Infineon Technologies AG 81726 Munchen, Germany (c) Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. 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Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies' products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 12 2016-2-17