Features
•Fast read access time – 70ns
•Dual voltage range operation
– Unregulated battery power supply range, 2.7V to 3.6V, or
– Standard power supply range, 5V 10%
•Pin compatible with JEDEC standard Atmel® AT27C256R
•Low-power CMOS operation
– 20µA max standby (less than 1µA, typical) for VCC = 3.6V
– 29mW max active at 5MHz for VCC = 3.6V
•JEDEC standard surface mount package
– 32-lead PLCC
•High-reliability CMOS technology
– 2,000V ESD protection
– 200mA latchup immunity
•Rapid programming algorithm – 100µs/byte (typical)
•CMOS- and TTL-compatible inputs and outputs
– JEDEC standard for LVTTL and LVBO
•Integrated product identification code
•Industrial temperature range
•Green (Pb/halide-free) packaging option
1. Description
The Atmel AT27BV256 is a high-performance, low-power, low-voltage, 262,144-bit, one-
time programmable, read-only memory (OTP EPROM) organized as 32K by 8 bits. It
requires only one supply in the range of 2.7V to 3.6V in normal read mode operation, mak-
ing it ideal for fast, portable systems using either regulated or unregulated battery power.
The Atmel innovative design techniques provide fast speeds that rival 5V parts, while keep-
ing the low power consumption of a 3V supply. At VCC = 2.7V, any word can be accessed in
less than 70ns. With a typical power dissipation of only 18mW at 5 MHz and VCC = 3V, the
AT27BV256 consumes less than one-fifth the power of a standard, 5V EPROM.
Standby mode supply current is typically less than 1µA at 3V. The AT27BV256 simplifies
system design and stretches battery lifetime even further by eliminating the need for power
supply regulation.
The AT27BV256 is available in an industry-standard, JEDEC-approved ,one-time program-
mable (OTP) PLCC package. All devices feature two-line control (CE, OE) to give
designers the flexibility to prevent bus contention.
The AT27BV256 operating with VCC at 3.0V produces TTL-level outputs that are compatible
with standard TTL logic devices operating at VCC = 5.0V. At VCC = 2.7V, the part is compati-
ble with JEDEC-approved, low-voltage battery operation (LVBO) interface specifications.
The device is also capable of standard, 5V operation, making it ideally suited for dual supply
range systems or card products that are pluggable in both 3V and 5V hosts.
The AT27BV256 has additional features to ensure high quality and efficient production use.
The rapid programming algorithm reduces the time required to program the part and guar-
antees reliable programming. Programming time is typically only 100µs/byte. The
integrated product identification code electronically identifies the device and manufacturer.
256K (32K x 8)
Unregulated Battery
Voltage, High-
speed, One-time
Programmable,
Read-only Memory
Atmel AT27BV256
0601F–EPROM–4/11
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0601F–EPROM–4/11
Atmel AT27BV256
This feature is used by industry-standard programming equipment to select the proper programming algorithms and
voltages. The AT27BV256 programs in exactly the same way as a standard, 5V Atmel AT27C256R, and uses the same
programming equipment.
2. Pin configurations
3. System considerations
Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless
accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance.
At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible.
Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic
capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
Figure 3-1. Block diagram
Pin name Function
A0 - A14 Addresses
O0 - O7 Outputs
CE Chip enable
OE Output enable
NC No connect
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A6
A5
A4
A3
A2
A1
A0
NC
O0
A8
A9
A11
NC
OE
A10
CE
O7
O6
4
3
2
1
32
31
30
14
15
16
17
18
19
20
O1
O2
GND
NC
O3
O4
O5
A7
A12
VPP
NC
VCC
A14
A13
32-lead PLCC
Top view
Note: PLCC package pins 1 and 17 are “don’t connect.”
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Atmel AT27BV256
4. Absolute maximum ratings*
Note: 1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is
VCC + 0.75V DC, which may be exceeded if certain precautions are observed (consult application notes), and which may
overshoot to +7.0V for pulses of less than 20ns.
5. DC and AC characterisitcs
Table 5-1. Operating modes
Note: 1. X can be VIL or VIH.
2. Read, output disable, and standby modes require 2.7V VCC 3.6V or 4.5V VCC 5.5V.
3. Refer to programming characteristics. Programming modes require VCC = 6.5V.
4. VH = 12.0 ± 0.5V.
5. Two identifier bytes may be selected. All Ai inputs are held low (VIL) except A9, which is set to VH, and A0, which is tog-
gled low (VIL) to select the manufacturers’ identification byte and high (VIH) to select the device code byte.
Table 5-2. DC and AC operating conditions for read operation
Temperature under bias . . . . . . . . . . . . . . . -40°C to +85°C *NOTICE: Stresses beyond those listed under “Absolute
maximum ratings” may cause permanent damage to
the device. This is a stress rating only, and functional
operation of the device at these or any other
conditions beyond those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect device reliability.
Storage temperature . . . . . . . . . . . . . . . . .-65°C to +125°C
Voltage on any pin with
respect to ground . . . . . . . . . . . . . . . . . . . -2.0V to +7.0V (1)
Voltage on A9 with
respect to ground . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)
VPP supply voltage with
respect to ground . . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)
Mode/Pin CE OE Ai VPP VCC Outputs
Read(2) VIL VIL Ai VCC VCC DOUT
Output disable(2) VIL VIH X
(1) VCC VCC High Z
Standby(2) VIH XXV
CC VCC High Z
Rapid program(3) VIL VIH Ai VPP VCC DIN
PGM verify(3) XV
IL Ai VPP VCC DOUT
Optional PGM verify(3) VIL VIL Ai VCC VCC DOUT
PGM inhibit(3) VIH VIH XV
PP VCC High Z
Product identification(3)(5) VIL VIL
A9 = VH(4)
A0 = VIH or VIL
A1 - A14 = VIL
VCC VCC Identification code
Atmel AT27BV256-70
Industrial operating temperature (case) -40°C - 85°C
VCC power supply
2.7V to 3.6V
5V 10%
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Atmel AT27BV256
Table 5-3. DC and operating characteristics for read operation
Notes: 1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP.
Symbol Parameter Condition Min Max Units
VCC = 2.7V to 3.6V
ILI Input load current VIN = 0V to VCC 1µA
ILO Output leakage current VOUT = 0V to VCC 5µA
IPP1(2) VPP(1) read/standby current VPP = VCC 10 µA
ISB VCC(1) standby current
ISB1 (CMOS), CE = VCC 0.3V 20 µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V 100 µA
ICC VCC active current f = 5MHz, IOUT = 0mA, CE = VIL, VCC = 3.6V 8 mA
VIL Input low voltage
VCC = 3.0 to 3.6V -0.6 0.8 V
VCC = 2.7 to 3.6V -0.6 0.2 x VCC V
VIH Input high voltage
VCC = 3.0 to 3.6V 2.0 VCC + 0.5 V
VCC = 2.7 to 3.6V 0.7 x VCC VCC + 0.5 V
VOL Output low voltage
IOL = 2.0mA 0.4 V
IOL = 100µA 0.2 V
IOL = 20µA 0.1 V
VOH Output high voltage
IOH = -2.0mA 2.4 V
IOH = -100µA VCC - 0.2 V
IOH = -20µA VCC - 0.1 V
VCC = 4.5V to 5.5V
ILI Input load current VIN = 0V to VCC 1µA
ILO Output leakage current VOUT = 0V to VCC 5µA
IPP1(2) VPP(1) read/standby current VPP = VCC 10 µA
ISB VCC(1) standby current
ISB1 (CMOS), CE = VCC 0.3V 100 µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA
ICC VCC active current f = 5MHz, IOUT = 0mA, CE = VIL 20 mA
VIL Input low voltage -0.6 0.8 V
VIH Input high voltage 2.0 VCC + 0.5 V
VOL Output low voltage IOL = 2.1mA 0.4 V
VOH Output high voltage IOH = -400µA 2.4 V
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Atmel AT27BV256
Table 5-4. AC characteristics for read operation
Figure 5-1. AC waveforms for read operation(1)
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled, and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
6. When reading an Atmel AT27BV256, a 0.1µF capacitor is required across VCC and ground to suppress spurious voltage
transients.
Figure 5-2. Input test waveform and measurement level
VCC = 2.7V to 3.6V and 4.5V to 5.5V
Symbol Parameter Condition
Atmel AT27BV256-70
UnitsMin Max
tACC(3) Address to output delay CE = OE = VIL 70 ns
tCE(2) CE to output delay OE = VIL 70 ns
tOE(2)(3) OE to output delay CE = VIL 50 ns
tDF(4)(5) OE or CE High to output float,
whichever occurred first 40 ns
tOH
Output hold from address, CE or OE,
whichever occurred first 0ns
tR, tF < 20ns (10% to 90%)
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Atmel AT27BV256
Figure 5-3. Output test load
Table 5-5. Pin capacitance
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled, and is not 100% tested.
Figure 5-4. Programming waveforms(1)
Notes: 1. The input timing reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device, but must be accommodated by the programmer.
3. When programming the Atmel AT27BV256, a 0.1µF capacitor is required across VPP and ground to suppress spurious volt-
age transients.
f = 1MHz, T = 25°C(1)
Symbol Typ Max Units Conditions
CIN 4 8 pF VIN = 0V
COUT 812pFV
OUT = 0V
Note: CL = 100pF
including jig capacitance.
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0601F–EPROM–4/11
Atmel AT27BV256
Table 5-6. DC programming characterisitcs
Table 5-7. AC programming characteristics
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.
2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven. See tim-
ing diagram.
3. Program pulse width tolerance is 100µsec 5%.
Table 5-8. The Atmel AT27BV256 integrated product identification code(1)
Note: 1. The Atmel AT27BV256 has the same product identification code as the Atmel AT27C256R and Atmel AT27LV256A. They are all
programming compatible
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Symbol Parameter Test conditions
Limits
UnitsMin Max
ILI Input load current VIN = VIL, VIH 10 µA
VIL Input low level -0.6 0.8 V
VIH Input high level 2.0 VCC + 0.5 V
VOL Output low voltage IOL = 2.1mA 0.4 V
VOH Output high voltage IOH = -400µA 2.4 V
ICC2 VCC supply current (program and verify) 25 mA
IPP2 VPP current CE = VIL 25 mA
VID A9 product identification voltage 11.5 12.5 V
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Symbol Parameter Test conditions(1)
Limits
UnitsMin Max
tAS Address setup time
Input rise and fall times:
(10% to 90%) 20 ns
Input pulse levels:
0.45V to 2.4V
Input timing reference level:
0.8V to 2.0V
Output timing reference level:
0.8V to 2.0V
2µs
tOES OE setup time 2 µs
tDS Data setup time 2 µs
tAH Address hold time 0 µs
tDH Data hold time 2 µs
tDFP OE high to output float delay(2) 0 130 ns
tVPS VPP setup time 2 µs
tVCS VCC setup time 2 µs
tPW CE program pulse width(3) 95 105 µs
tOE Data valid from OE(2) 150 ns
tPRT VPP pulse rise time during programming 50 ns
Codes
Pins Hex
dataA0 O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer 0 0 0 0111101E
Device type 1 1 0 0011008C
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Atmel AT27BV256
6. Rapid programming algorithm
A 100µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to
13.0V. Each address is first programmed with one 100µs CE pulse without verification. Then a verification/reprogramming
loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100µs pulses are
applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is
considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then
lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device
passes or fails.
Figure 6-1. Rapid programming algorithm
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Atmel AT27BV256
7. Ordering Information
Green package option (Pb/hailde-free)
tACC
(ns)
ICC (mA)
Atmel Ordering Code Lead finish Package Operation rangeActive Standby
70 8 0.02 AT27BV256-70JU Matte tin 32J Industrial
(-40C to 85C)
Package type
32J 32-lead, plastic, J-leaded chip carrier (PLCC)
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0601F–EPROM–4/11
Atmel AT27BV256
8. Packaging Information
32J – PLCC
DRAWING NO. REV.
TITLE
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) B
32J
10/04/01
1.14(0.045) X 45° PIN NO. 1
IDENTIFIER
1.14(0.045) X 45°
0.51(0.020)MAX
0.318(0.0125)
0.191(0.0075)
A2
45° MAX (3X)
A
A1
B1 E2
B
e
E1 E
D1
D
D2
COMMON DIMENSIONS
(Unit of measure = mm)
SYMBOL MIN NOM MAX NOTE
Package Drawing Contact:
packagedrawings@atmel.com
Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.10mm) maximum.
A 3.175 – 3.556
A1 1.524 – 2.413
A2 0.381 – –
D 12.319 – 12.573
D1 11.354 – 11.506 Note 2
D2 9.906 – 10.922
E 14.859 – 15.113
E1 13.894 – 14.046 Note 2
E2 12.471 – 13.487
B 0.660 – 0.813
B1 0.330 – 0.533
e 1.270 TYP
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0601F–EPROM–4/11
Atmel AT27BV256
9. Revision history
Doc. Rev. Date Comments
0601F 04/2011 Remove SOIC and TSOP packages
Add lead finish to ordering information
0601E 12/2007
Atmel Corporation
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Fax: (+81) (3) 3523-7581
© 2011 Atmel Corporation. All rights reserved. / Rev.: 0601F–EPROM–4/11
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