MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Applications 1/2-Inch 3-Megapixel CMOS Digital Image Sensor MT9T031 For the latest data sheet, refer to Aptina's Web site: www.aptina.com Features Table 1: High frame rate Global reset release Horizontal and vertical binning Column and row skip modes Superior low-light performance Low dark current Simple two-wire serial interface Programmable controls: Gain, frame rate, frame size, exposure * Pin-for-pin compatible with Aptina's 1.3-megapixel MT9M001 1/2-inch (4:3) 6.55mm(H) x 4.92mm(V) 8.19 (Diagonal) 2,048H x 1,536V 3.2m x 3.2m RGB Bayer pattern Global reset release (GRR), electronic rolling shutter (ERS) 48 MPS/48 MHz Active pixels Pixel size Color filter array Shutter type Maximum data rate/ master clock QXGA (2,048 x 1,536) UXGA Frame (1,600 x 1,200) rate HDTV (1,280 x 720) XGA (1,024 x 768) VGA (640 x 480) ADC resolution Responsivity Dynamic range SNRMAX Supply voltage Power consumption High resolution network cameras Wide field of view cameras Dome cameras with electronic pan, tilt, and zoom Hybrid video cameras with high resolution stills Detailed feature extraction for smart cameras General Description The Aptina(R) MT9T031 is a QXGA-format 1/2-inch CMOS active-pixel digital image sensor with an active imaging pixel array of 2,048H x 1,536V. It incorporates sophisticated camera functions on-chip such as windowing, column and row skip mode, and snapshot mode. It is programmable through a simple two-wire serial interface. Programmable up to 12 fps Programmable up to 20 fps Programmable up to 39 fps Programmable up to 43 fps Programmable up to 93 fps 10-bit, on-chip >1.0 V/lux-sec (550nm) 61dB 43dB 3.0V-3.6V (3.3V nominal) 244mW (nominal); 1.65W (standby) 0C to 60C 48-pin CLCC Operating temperature Packaging The 3-megapixel CMOS image sensor features Aptina's breakthrough low-noise CMOS imaging technology that achieves CCD image quality (based on signal-tonoise ratio and low-light sensitivity) while maintaining the inherent size, cost, and integration advantages of CMOS. Ordering Information Table 2: Available Part Numbers Part Number MT9T031C12STC MT9T031C12STCD ES MT9T031C12STCH ES PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Typical Value Optical format Active imager size Applications * * * * * Key Performance Parameters Parameter * * * * * * * * 1 . Description 48-Pin CLCC 48-Pin CLCC demo 48-Pin CLCC headboard . (c)2006 Aptina Imaging Corporation All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Table of Contents Table of Contents Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Pixel Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Pixel Array Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Output Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Output Data Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Frame Timing Formulas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Register List and Default Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Sensor Core Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Feature Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Window Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Window Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Electronic Panning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Blanking Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Frame Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 High Frame Rate Readout Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Pixel Integration Time Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Snapshot Mode and Flash Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Setting up for Snapshot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Triggering A Snapshot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Strobe Pulse Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Global Shutter Release Snapshot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Programmed Exposure Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Skip and Bin Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Smaller Format Resolution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Line_Valid Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Gain Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Black Level Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Manual Black Level Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Black Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Standby Control and Chip Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Serial Bus Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Bus Idle State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Start Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Stop Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Slave Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Data Bit Transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Acknowledge Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 No-Acknowledge Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 Two-Wire Serial Interface Sample Write and Read Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 16-Bit Write Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 16-Bit Read Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 Two-Wire Serial Register Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 I/O Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 2 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Table of Contents Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 3 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor List of Figures List of Figures Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: Figure 25: Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Typical Configuration (Connection) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 48-Pin CLCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Pixel Array Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Pixel Color Pattern Detail (Top Right Corner) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Spatial Illustration of Image Readout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Timing Example of Pixel Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Row Timing and FRAME_VALID/LINE_VALID Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Windowing Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Windowing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Column Skip 2X; Row Skip 2X Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Column Skip 3X; Row Skip 3X Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Column Skip 4X; Row Skip 4X Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 Column Skip 8X; Row Skip 8X Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 Bin 2-to-1: 2,048H x 1,536V (QXGA) to 1,024H x 768V (XGA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Bin 3-to-1: 2,048H x 1,536V (QXGA) to 640H x 480V (VGA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Different LINE_VALID Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Timing Diagram Showing a Write to R0x09 with the Value 0x0284 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 Timing Diagram Showing a Read from R0x09; Returned Value 0x0284 . . . . . . . . . . . . . . . . . . . . . . . . .39 Two-Wire Serial Bus Timing Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 I/O Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 Quantum Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 Image Center Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 48-Pin CLCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 4 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor List of Tables List of Tables Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Table 10: Table 11: Table 12: Table 13: Table 14: Table 15: Table 16: Table 17: Key Performance Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Available Part Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Frame Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Core Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Core Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Standard Resolutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Wide Screen (16:9) Resolutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Auto Focus Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 STROBE Pulse Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Bin and Skip Mode Resolution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Skip and Bin Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Gain Increment Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Two-Wire Serial Bus Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 I/O Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 5 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor General Description General Description The sensor can be operated in its default mode or programmed by the user for frame size, exposure, gain setting, and other parameters. The default mode outputs a QXGA image at 12 frames per second (fps). An on-chip analog-to-digital converter (ADC) provides 10 bits per pixel. FRAME_VALID and LINE_VALID signals are output on dedicated pins, along with a pixel clock that is synchronous with valid data. The MT9T031 produces extraordinarily clear, sharp digital pictures, and its ability to capture both continuous video and single frames makes it the perfect choice for a wide range of consumer and industrial applications, including digital still cameras, digital video cameras, and PC cameras. Figure 1: Block Diagram Control Register Active-Pixel Sensor (APS) Array Analog Processing PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Timing and Control ADC 6 Two-Wire Serial Interface Clock Sync Signals 10-bit Data (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor General Description Figure 2: Typical Configuration (Connection) VDD + VAA 0.01F 0.1F 0.1F AGND SCLK SDATA MASTER CLOCK EXTCLK TRIGGER GSHT_CTL DOUT[9:0] STANDBY OE# TEST DGND + DGND Note: PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN AGND PIXCLK LINE_VALID FRAME_VALID STROBE RESET# 10F VAAPIX TWO-WIRE SERIAL BUS VAA DGND VDD 1.5K1 1K 1.5K1 2.2F AGND 1. Resistor value 1.5K is recommended, but may be greater for slower two-wire speed. 7 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor General Description DGND VDD NC NC VAAPIX AGND AGND SCLK SDATA NC DGND 48-Pin CLCC NC 6 5 4 3 2 1 48 47 46 45 44 43 10 39 STROBE 11 38 DGND GSHT_CTL 12 37 VDD OE# 13 36 DOUT[9] NC 14 35 DOUT[8] AGND 15 34 DOUT[7] VAA 16 33 DOUT[6] AGND 17 32 DOUT[5] AGND 18 31 PIXCLK 19 NC NC Table 3: 20 21 22 23 24 25 26 27 28 29 30 NC RESET# EXTCLK LINE_VALID DOUT[4] 40 DOUT[3] FRAME_VALID 9 DOUT[2] 41 NC DOUT[1] TRIGGER DOUT[0] NC DGND 42 8 VDD 7 AGND STANDBY VAA Figure 3: . Pin Descriptions Pin Numbers Symbol Type Description 7 STANDBY Input 8 10 13 TRIGGER RESET# OE# Input Input Input 29 46 12 45 24, 25, 26, 27, 28, 32, 33, 34, 35, 36 31 EXTCLK SCLK GSHT_CTL SDATA DOUT[9:0] Input Input Input I/O Output Standby: activates (HIGH) standby mode, disables analog bias circuitry for power saving mode. Trigger: activates (HIGH) snapshot sequence. Reset: activates (LOW) asynchronous reset of sensor. All registers assume factory defaults. Output enable: OE# when HIGH, places outputs DOUT[9:0], FRAME_VALID, LINE_VALID, PIXCLK, and STROBE into a tri-state configuration. Clock in: master clock into sensor (48 MHz maximum). Serial clock: clock for serial interface. Global shutter control. Serial data: serial data bus, requires 1.5K resistor to 3.3V for pull-up. Data out: pixel data output bit 0, DOUT[9] (MSB), DOUT[0] (LSB). PIXCLK Output 39 STROBE Output 40 LINE_VALID Output 41 1 4, 22, 37 FRAME_VALID VAAPIX VDD Output Supply Supply PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Pixel clock: pixel data outputs are valid during falling edge of this clock. Frequency = (master clock). Strobe: output is pulsed HIGH to indicate sensor reset operation of pixel array has completed. Line valid: output is pulsed HIGH during line of selectable valid pixel data (see R0x20 for options). Frame valid: output is pulsed HIGH during frame of valid pixel data. Analog pixel power: provide power supply for pixel array, 3.3V 0.3V. Digital power: provide power supply for digital block, 3.3V 0.3V. 8 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor General Description Table 3: Pin Descriptions (Continued) Pin Numbers Symbol Type 5, 23, 38, 43 16, 20 15, 17, 18, 21, 47, 48 2, 3, 6, 9, 11,14,19, 30 42, 44 DGND VAA AGND Supply Supply Supply NC - PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Description Digital ground: provide isolated ground for digital block. Analog power: provide power supply for analog block, 3.3V 0.3V. Analog ground: provide isolated ground for analog block and pixel array. No connect: these pins must be left unconnected. 9 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Pixel Data Format Pixel Data Format Pixel Array Structure The MT9T031 pixel array is configured as 2,112 columns by 1,568 rows, as shown in Figure 4. Columns from 0 through 27 and from 2,085 through 2,111 are optically black. Similarly, rows from 0 through 15 and from 1,561 through 1,567 are optically black. These optical black columns and rows can be used to monitor the black level. The black row data is used internally for the automatic black level adjustment. However, the black rows and columns can also be read out by setting R0x20 (11) and R0x1E (7), respectively. There are 2,057 columns by 1,545 rows of optically active pixels, which provides a fourpixel boundary around the QXGA (2,048 x 1,536) image to avoid boundary effects during color interpolation and correction. The MT9T031 uses a Bayer color pattern, as shown in Figure 5. The even-numbered rows contain green and red color pixels, and odd-numbered rows contain blue and green color pixels. The even-numbered columns contain green and blue color pixels; oddnumbered columns contain red and green color pixels. Figure 4: Pixel Array Description 16 black rows (0, 0) 4 27 black columns 5 QXGA (2,048 x 1,536) + 4 pixel boundary for color correction + additional active column + additional active row = 2,057 x 1,545 active pixels 4 28 black columns 5 (2111, 1567) Figure 5: 7 black rows Pixel Color Pattern Detail (Top Right Corner) column readout direction .. . black pixels Pixel (28, 16) row readout direction ... G R G R G R G B G B G B G B G R G R G R G B G B G B G B G R G R G R G B G B G B G B .. . PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 10 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Pixel Data Format Output Data Format The MT9T031 image data is read out in a progressive scan. Valid image data is surrounded by horizontal blanking and vertical blanking, as shown in Figure 6. The amount of horizontal blanking and vertical blanking is programmable through R0x05 and R0x06, respectively. LINE_VALID is HIGH during the shaded region of the figure. FRAME_VALID timing is described in "Output Data Timing" on page 11. Figure 6: Spatial Illustration of Image Readout P0,0 P0,1 P0,2.....................................P0,n-1 P0,n P1,0 P1,1 P1,2.....................................P1,n-1 P1,n 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 VALID IMAGE HORIZONTAL BLANKING Pm-1,0 Pm-1,1.....................................Pm-1,n-1 Pm-1,n 00 00 00 .................. 00 00 00 Pm,0 Pm,1.....................................Pm,n-1 Pm,n 00 00 00 .................. 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 VERTICAL BLANKING VERTICAL/HORIZONTAL BLANKING 00 00 00 ..................................... 00 00 00 00 00 00 ..................................... 00 00 00 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 Output Data Timing The data output of the MT9T031 is synchronized with the PIXCLK output. When LINE_VALID is HIGH, one 10-bit pixel datum is output every PIXCLK period. The PIXCLK can be used as a clock to latch the data. DOUT data is valid on the falling edge of PIXCLK in default mode. The PIXCLK is HIGH while master clock is HIGH and then LOW while master clock is LOW. It is continuously enabled, even during the blanking period. The parameters P, A, and Q shown in Figure 8 are defined in Table 4. Figure 7: Timing Example of Pixel Data .... LINE_VALID .... PIXCLK Blanking DOUT[9:0] PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN P0 (9:0) P1 (9:0) P2 (9:0) 11 P3 (9:0) Blanking .... Valid Image Data P4 (9:0) .... Pn-1 (9:0) Pn (9:0) (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Pixel Data Format Figure 8: Row Timing and FRAME_VALID/LINE_VALID Signals ... FRAME_VALID ... LINE_VALID ... Number of master clocks P1+P2 A Q A Q A P3 Frame Timing Formulas Table 4: Frame Timing Parameter Name Equation (Pixel Clocks = Master Clock) R Active Rows A Active Columns P1 Frame Start Blanking 1 P2 Frame Start Blanking 2 P3 Frame End Blanking 3 ((R0x03 + 1)/((R0x22[2-0] + 1))) (rounded up to next even number) ((R0x04 + 1)/((R0x23[2-0] + 1))) (rounded up to next even number) 331 if R0x22[5-4] = 0, normal 673 if R0x22[5-4] = 1, Bin 2X 999 if R0x22[5-4] = 2, Bin 3X 38 if R0x23[5-4] = 0, normal 22if R0x23[5-4] = 1, Bin 2X 14 if R0x23[5-4] = 2, Bin 3X R0x05 (minimum R0x05 value = 21) Q Horizontal Blanking P1 + P2 + P3 P4 Shutter Overhead R0x0C + 316 x (R0x23[5-4] +1) tROW RowTime The greater of: (A + Q) or (P1+ P4) V Vertical Blanking (R0x06 + 1) x tROW tFV Frame Valid Time R x tROW tFRAME Total Frame Time The greater of: ((65536 x R0x08 + R0x09) x tROW) or (tFV + V) PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 12 Default Timing at 48 MHz 1,536 pixel clocks = 32.0?s 2,048 pixel clocks = 42.67?s 331pixel clocks = 6.89?s 38 pixel clocks = 0.79?s 142 pixel clocks = 2.96?s 511 pixel clocks = 10.65?s 316 pixel clocks = 6.58?s 2,559 pixel clocks = 53.31?s 66,534 pixel clocks = 1.39ms 3,930,624 pixel clocks = 81.89ms 3,997,158 pixel clocks = 83.27ms (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Register List and Default Values Register List and Default Values Table 5: Core Registers *1 = always 1; 0 = always 0; d = programmable; ? = read only Register # Dec (Hex) Register Description Data Format (Binary)* R0(R0x00) R1(R0x01) R2(R0x02) R3(R0x03) R4(R0x04) R5(R0x05) R6(R0x06) R7(R0x07) R8(R0x08) R9(R0x09) R10(R0x0A) R11(R0x0B) R12(R0x0C) R13(R0x0D) R30(R0x1E) R32(R0x20) R33(R0x21) R34(R0x22) R35(R0x23) R39(R0x27) R41(R0x29) R43(R0x2B) R44(R0x2C) R45(R0x2D) R46(R0x2E) R48(R0x30) R50(R0x32) R53(R0x35) R60(R0x3C) R61(R0x3D) R62(R0x3E) R63(R0x3F) R64(R0x40) R65(R0x41) R66(R0x42) R67(R0x43) R68(R0x44) R69(R0x45) R70(R0x46) R71(R0x47) R72(R0x48) R73(R0x49) Chip Version Row Start Column Start Row Size Column Size Horizontal Blanking Vertical Blanking Output Control Shutter Width Upper Shutter Width Pixel Clock Control Frame Restart Shutter Delay Reset Read Mode 1 Read Mode 2 Read Mode 3 Row Address Mode Column Address Mode Reserved Reserved Green1 Gain Blue Gain Red Gain Green2 Gain Reserved Test Data Global Gain Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Black Level ???? ???? ???? ???? 0000 0ddd dddd dddd 0000 dddd dddd dddd 0000 0ddd dddd dddd 0000 dddd dddd dddd 0000 0ddd dddd dddd 0000 0ddd dddd dddd dddd dddd dddd dddd 0000 0000 0000 dddd dddd dddd dddd dddd dddd dddd dddd dddd 0000 0000 0000 000d 0000 0ddd dddd dddd 0000 0000 0000 000d dddd dddd dddd dddd dddd dddd dddd dddd 0000 0000 0000 00dd dddd dddd dddd dddd 0000 0ddd dddd dddd -- -- 0ddd dddd dddd dddd 0ddd dddd dddd dddd 0ddd dddd dddd dddd 0ddd dddd dddd dddd -- 0000 0ddd ddd dd00 0ddd dddd dddd dddd -- -- -- -- -- -- -- -- -- -- -- -- -- 0000 dddd dddd dddd PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 13 Default Value Dec (Hex) 5665 (0x1621) 20 (0x0014) 32 (0x0020) 1535 (0x05FF) 2047 (0x07FF) 142 (0x008E) 25 (0x0019) 2 (0x0002) 0 (0x0000) 1561 (0x0619) 0 (0x0000) 0 (0x0000) 0 (0x0000) 0 (0x0000) 49216 (0xC040) 8192 (0x2000) 0 (0x0000) 0 (0x0000) 0 (0x0000) 1 (0x0001) 1025 (0x0401) 8 (0x0008) 8 (0x0008) 8 (0x0008) 8 (0x0008) 0 (0x0000) 0 (0x0000) 8 (0x0008) 16 (0x0010) 5 (0x0005) 3 (0x0003) 2 (0x0002) 5 (0x0005) 3 (0x0003) 3 (0x0003) 3 (0x0003) 3 (0x0003) 16 (0x0010) 16 (0x0010) 16 (0x0010) 16 (0x0010) 168 (0x00A8) Note 1, 2 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Register List and Default Values Table 5: Core Registers (Continued) *1 = always 1; 0 = always 0; d = programmable; ? = read only Register # Dec (Hex) Register Description Data Format (Binary)* R74(R0x4A) R75(R0x4B) R76(R0x4C) R77(R0x4D) R78(R0x4E) R79(R0x4F) R80(R0x50) R81(R0x51) R82(R0x52) R83(R0x53) R84(R0x54) R85(R0x55) R86(R0x56) R91(R0x5B) R92(R0x5C) R93(R0x5D) R94(R0x5E) R95(R0x5F) R96(R0x60) R97(R0x61) R98(R0x62) R99(R0x63) R100(R0x64) R101(R0x65) R103(R0x67) R104(R0x68) R105(R0x69) R106(R0x6A) R107(R0x6B) R108(R0x6C) R109(R0x6D) R110(R0x6E) R112(R0x70) R113(R0x71) R114(R0x72) R115(R0x73) R116(R0x74) R117(R0x75) R118(R0x76) R119(R0x77) R120(R0x78) R121(R0x79) R122(R0x7A) R123(R0x7B) Reserved Row Black Default Offset Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved BLC Delta Thresholds Reserved Cal Thresholds Cal Green1 Offset Cal Green2 Offset Black Level Calibration Red Offset Blue Offset Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved -- 0000 dddd dddd dddd -- -- -- -- -- -- -- -- -- -- -- -- -- dddd dddd dddd dddd -- dddd dddd dddd dddd 0000 000d dddd dddd 0000 000d dddd dddd dddd dddd dddd dddd 0000 000d dddd dddd 0000 000d dddd dddd -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 14 Default Value Dec (Hex) 16 (0x0010) 40 (0x0028) 48 (0x0030) 32 (0x0020) 16 (0x0010) 20 (0x0014) 32772 (0x8004) 2 (0x0002) 32772 (0x8004) 2 (0x0002) 16 (0x0010) 16 (0x0010) 32 (0x0020) 7 (0x0007) 1820 (0x071C) 11539 (0x2D13) 21348 (0x5364) 8989 (0x231D) 32 (0x0020) 32 (0x0020) 0 (0x0000) 32 (0x0020) 32 (0x0020) 0 (0x0000) 16383 (0x3FFF) 0 (0x0000) 0 (0x0000) 0 (0x0000) 0 (0x0000) 0 (0x0000) 0 (0x0000) 0 (0x0000) 163 (0x00A3) 41476 (0xA204) 40966 (0xA006) 9738 (0x260A) 10252 (0x280C) 21005 (0x520D) 28756 (0x7054) 0 (0x0000) 40023 (0x9C57) 40450 (0x9E02) 40452 (0x9E04) 40454 (0x9E06) Note 3 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Register List and Default Values Table 5: Core Registers (Continued) *1 = always 1; 0 = always 0; d = programmable; ? = read only Register # Dec (Hex) Register Description Data Format (Binary)* R124(R0x7C) R125(R0x7D) R126(R0x7E) R127(R0x7F) R128(R0x80) R129(R0x81) R130(R0x82) R131(R0x83) R132(R0x84) R134(R0x86) R135(R0x87) R137(R0x89) R138(R0x8A) R139(R0x8B) R140(R0x8C) R144(R0x90) R145(R0x91) R146(R0x92) R241(R0xF1) R248(R0xF8) R250(R0xFA) R251(R0xFB) R252(R0xFC) R253(R0xFD) R255(R0xFF) Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Chip Enable Reserved Reserved Reserved Reserved Chip Version [Dup] -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0000 0000 0000 00dd -- -- -- -- ???? ???? ???? ???? Note: PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Default Value Dec (Hex) Note 40966 (0xA006) 21256 (0x5308) 12808 (0x3208) 31826 (0x7C52) 78 (0x004E) 19968 (0x4E00) 19458 (0x4C02) 18444 (0x480C) 18958 (0x4A0E) 11788 (0x2E0C) 0 (0x0000) 19458 (0x4C02) 0 (0x0000) 20234 (0x4F0A) 14858 (0x3A0A) 12 (0x000C) 0 (0x0000) 1 (0x0001) 0 (0x0000) 1 (0x0001) 0 (0x0000) 0 (0x0000) 0 (0x0000) 0 (0x0000) 5665 (0x1621) 1. It is recommended that bit 14 be cleared. 2. Value 0x8040 is recommended. 3. Value of 0x20 is recommended. 15 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Sensor Core Register Descriptions Sensor Core Register Descriptions Table 6: Reg. # R0 R0x00 R1 R0x01 R2 R0x02 R3 R0x03 R4 R0x04 R5 R0x05 R6 R0x06 R7 R0x07 R7 R0x07 Core Registers Bits Default Name 15:0 0x1621 Chip Version (RO) Chip version. 15:0 0x0014 Row Start (RW) The first row to be read out, excluding any dark rows that may be read. To window the image down, set this register to the starting "Y" value. Setting a value less than 20 is not recommended because the dark rows should be read using R0x22. 15:0 0x0020 Column Start (RW) The first column to be read out, excluding dark columns that may be read. To window the image down, set this register to the starting X value. Setting a value below 96 is not recommended because readout of dark columns should be controlled by R0x22. 15:0 0x05FF Row Size (RW) Number of rows in the image to be read out, excluding any dark rows or border rows that may be read. The minimum supported value is 2. 15:0 0x07FF Column Size (RW) Number of columns in the image to be read out, excluding any dark columns or border columns that may be read. The minimum supported value is 17. 15:0 0x008E Horizontal Blanking (RW) Horizontal Blank--default = 0x008E (142 pixels). Minimum value = 0x0015 (21). 15:0 0x0019 Vertical Blanking (RW) Vertical Blank--default = 0x0019 (25 rows). Minimum value = 0x0003 (3). 15:0 0x0002 Output Control (RW) 15 0x0000 Reserved 14 0x0000 Reserved 13:9 X Reserved 8 0x0000 Reserved 7 X Reserved 6 0x0000 Override pixel data Override pixel data. 0 = normal operation. 1 = output programmed test data (see R0x32). First valid columns will output contents of test data register; second columns will output inverted data. Third columns will output noninverted data, fourth inverted, etc. 5:4 0x0000 Reserved 3 0x0000 Reserved 2 0x0000 Reserved 1 0x0001 Chip Enable Chip Enable. 1 = normal operation. 0 = sensor readout is stopped and analog control signals are put in a state which draws minimal power. 0 0x0000 Sync changes Synchronize changes. 0 = normal operation, update changes to registers that affect image brightness (integration time, shutter delay, gain, horizontal and vertical blank, window size, row/column skip, or row mirror) at the next frame boundary. 1 = do not update any changes to these settings until this bit is returned to "0." This register controls various features of the output format for the sensor. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 16 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Sensor Core Register Descriptions Table 6: Reg. # R8 R0x08 R9 R0x09 R10 R0x0A R11 R0x0B R12 R0x0C R13 R0x0D R30 R0x1E Core Registers (Continued) Bits Default Name 15:0 0x0000 Shutter Width Upper (RW) The most significant bits of the shutter width, which are combined with Shutter Width (R0x09). The total shutter width is therefore: (((Shutter_Width_Upper) x 65536) + Shutter_Width). This should allow a shutter width from about 50us to about 50s at default row time. 15:0 0x0619 Shutter Width (RW) Integration time in number of rows. The integration time is also influenced by the shutter delay (R0x0C) and the overhead time. 15:0 0x0000 Pixel Clock Control (RW) 15 0x0000 Invert Pixel CLock 14:11 X Reserved 10:8 0x0000 Shift pixel clock 7 X Reserved 6:0 0x0000 Divide pixel clock 15:0 0x0000 Frame Restart (RW) Setting bit 0 to "1" of R0x0B will cause the sensor to abandon the readout of the current frame and restart from the first row. This register automatically resets itself to 0x0000 after the frame restart. The first frame after this event is considered to be a "bad frame" (see description for R0x20, bit 0). 15:0 0x0000 Shutter Delay (RW) The amount of time from the end of the sampling sequence to the beginning of the pixel reset sequence. If the value in this register exceeds the row time, the reset of the row does not complete before the associated row is sampled, and the sensor does not generate an image. A programmed value of N reduces the integration time by (N/2) pixel clock periods in low power mode and by N pixel clock periods in full power mode. 15:0 0x0000 Reset (RW) Setting this bit will put the sensor into reset mode, which will set the sensor to its default power-up state. Clearing this bit will resume normal operation. 15:0 0xC040 Read Mode 1 (RW) 15 0x0001 Reserved 14 0x0001 Reserved 13 0x0000 Reserved 12 0x0000 Reserved 11 0x0000 Strobe override Strobe Override--default is 0 (strobe signal created by digital logic). 1 = override strobe signal (strobe signal is set high when this bit is set, low when this bit is set low. It is assumed that strobe enable is set to "0" if strobe override is being used). PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 17 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Sensor Core Register Descriptions Table 6: Core Registers (Continued) Reg. # R30 R0x1E R32 R0x20 R33 R0x21 Bits Default 10 0x0000 9 0x0000 8 0x0000 7 6 5:0 15:0 15 14 13 12 11 10 0x0000 0x0001 0x0000 0x2000 0x0000 0x0000 0x0001 0x0000 0x0000 0x0000 9 0x0000 8:2 1 0 0x0000 0x0000 0x0000 15:0 15:2 1 0x0000 X 0x0000 0 0x0000 PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Name Strobe width Strobe Width--default is 0 (strobe signal width at minimum length, one row of integration time, prior to Line_Valid going high). 1 = extend strobe width (strobe signal width extends to entire time all rows are integrating; shutter width must be >= row size + vertical blanking). Strobe enable Strobe Enable--default is 0 (no strobe signal). 1 = enable strobe (signal output from the sensor during the time all rows are integrating). See strobe width for more information. Snap Shot Mode Snapshot Mode--default is 0 (continuous mode). 1 = enable Snapshot trigger signal can come from outside signal (trigger pin 8 on the sensor) or from serial interface register restart, i.e. programming a "1" to bit 0 of R0x0B. Show dark columns Noise suppression Reserved Read Mode 2 (RW) Mirror row Mirror Column Reserved Reserved Read dark rows xor line_valid 1 = LINE_VALID = "Continuous" LINE_VALID XOR FRAME_VALID. 0 = LINE_VALID determined by bit 9 (default). Continuous line valid 1 = "Continuous" LINE_VALID (continue producing Line_Valid during vertical blanking). 0 = Normal Line_Valid (default, no Line_Valid during vertical blank). Reserved Reserved No bad frames No bad frames--1 = output all frames (including bad frames). 0 = default, only output good frames. A bad frame is defined as the first frame following a change to: window size or position, horizontal blanking, row or column skip, or mirroring. Read Mode 3 (RW) Reserved Use GSHT_CTL Use GSHT_CTL--default = 0x0000. When set, the leading edge of the GSHT_CTL pad signal will be used to start the shutter sequence in snapshot mode, and the trailing edge will start the read sequence. When clear, the leading edge of the TRIGGER pad signal will be used to initiate the shutter sequence, the trailing edge of GSHT_CTL will start the exposure, and the trailing edge of the TRIGGER pad signal will be used to start the strobe and readout. Ineffective unless Snapshot (R0x1E[8]) and Global Reset are set. Global Reset Global Reset--default = 0x0000--when set, snapshot mode will make use of the global reset -- that is, the entire array will be released from reset simultaneously. Ineffective unless Snapshot (R0x1E[8]) is set. 18 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Sensor Core Register Descriptions Table 6: Core Registers (Continued) Reg. # Bits Default R34 R0x22 15:0 15 14:12 11 10:8 7 6:4 3 2:0 0x0000 X 0x0000 X 0x0000 X 0x0000 X 0x0000 R35 R0x23 15:0 15:11 10:8 7:6 5:4 0x0000 X 0x0000 X 0x0000 3 2:0 X 0x0000 15:0 15 14:8 0x0008 X 0x0000 7 6 X 0x0000 5:0 0x0008 15:0 15 14:8 0x0008 X 0x0000 7 6 X 0x0000 5:0 0x0008 R43 R0x02B R44 R0x2C PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Name Row Address Mode (RW) Reserved Reserved Reserved Reserved Reserved Reserved Reserved Row Skip Row Skip--the number of row-pairs to skip for every row read. For example, "0" means read every row pair. "1" is skip 2X; 2 is skip 3X, etc. If Row Bin is non-zero, this should be set to the interval between the first rows in each bin. For full binning, Row Skip equals Row Bin. Column Address Mode (RW) Reserved Reserved Reserved Column Bin, Column Bin--the number of columns to be addressed per column read out minus one. Zero will produce standard 1:1 read out. A value of "1" will produce Bin 2X; "2" would be Bin 3X. Note: Column start address value must be a multiple of R0x23 [5-4] + 1. Reserved Column Skip Column Skip--the number of column-pairs to skip for every pair read. Zero means read every column. "1" means skip one pair for every pair read (Skip 2X); 2 means skip 2 pairs for every pair read (Skip 3X) etc. Green1 Gain (RW) Reserved Digital Green1 Gain Green1 digital gain--default = 0x00 (0) = 1x gain. Reserved Double Green1 Gain Green1 analog gain--default = 0x08 (8) = 1x gain. Green1 Gain Value Green1 analog gain--default = 0x08 (8) = 1x gain. Blue Gain (RW) Reserved Digital Blue Gain Blue digital gain--default = 0x00 (0) = 1x gain. Reserved Double Blue Gain Blue analog gain--default = 0x08 (8) = 1x gain. Blue Gain Value Blue analog gain--default = 0x08 (8) = 1x gain. 19 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Sensor Core Register Descriptions Table 6: Core Registers (Continued) Reg. # R45 R0x2D R46 R0x2E R50 R0x32 R53 R0x35 R73 R0x49 R75 R0x4B R93 R0x5D Bits Default 15:0 15 14:8 0x0008 X 0x0000 15:0 15 14:8 0x2D13 X 0x002D 7 6:0 X 0x0013 Name Red Gain (RW) Reserved Digital Red Gain Red digital gain--default = 0x00 (0) = 1x gain. 7 X Reserved 6 0x0000 Double Red Gain Red analog gain--default = 0x08 (8) = 1x gain. 5:0 0x0008 Red Gain Value Red analog gain--default = 0x08 (8) = 1x gain. 15:0 0x0008 Green2 Gain (RW) 15 X Reserved 14:8 0x0000 Digital Green2 Gain Green2 digital gain--default = 0x00 (0) = 1x gain. 7 X Reserved 6 0x0000 Double Green2 Gain Green2 analog gain--default = 0x08 (8) = 1x gain. 5:0 0x0008 Green2 Gain Value Green2 analog gain--default = 0x08 (8) = 1x gain. 15:0 0x0000 Test Data (RW) 11:2 0x0000 Test Data The data inserted into the data path to produce test pattern when "Use Test Data" (R0x07, bit 6) is set. Test Data will be inserted for even columns, and the inverse will be inserted for odd columns. 15:0 0x0008 Global Gain (RW) 15 X Reserved 14:8 0x0000 Digital Global Gain Global digital gain--default = 0x00 (0) = 1x gain. This register can be used to set all four gains at once. When read, it will return the value stored in R0x2B. 7 X Reserved 6 0x0000 Double Global Gain Global analog gain--default = 0x08 (8) = 1x gain. 5:0 0x0008 Global Gain Value This register can be used to simultaneously set all four gains. When read, it returns the value stored in R0x2B. 15:0 0x00A8 Black Level (RW) Desired black level in image. 15:0 0x0028 Row Black Default Offset (RW) PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN BLC Delta Thresholds (RW) Reserved High Delta Threshold High Coarse Threshold--default = 0x2D. If the average black value for a color is higher than this value or lower than Low Coarse Threshold, the coarse mode will be activated (if enabled). Once the black level is between the High Coarse Threshold and the Low Coarse Threshold, the fine method will be used. This value should be set no lower than High Target Threshold. Reserved Low Delta Threshold Low Coarse Threshold--default = 0x13. This value should be less than Low Target Threshold. See High Coarse Threshold below. 20 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Sensor Core Register Descriptions Table 6: Reg. # R95 R0x5F R96 R0x60 R97 R0x61 R98 R0x62 R98 R0x62 Core Registers (Continued) Bits 15:0 15 14:8 Default Name Cal Thresholds (RW) Reserved High Target Upper threshold for targeted black level in ADC LSBs. 7 X Reserved 6:0 0x001D Low Target Lower threshold for targeted black level in ADC LSBs. 15:0 0x0020 Cal Green1 Offset (RW) Analog calibration offset for green1 pixels, represented as a two's complement signed 8-bit value (if bit 8 is clear, the offset is positive and the magnitude is given by bits 7:0. If bit 8 is set, the offset is negative and the magnitude is given by not ([7:0]) + 1). If R0x60[0] = 0, this register is R/O and returns the current value computed by the black level calibration algorithm. If R0x60[0] = 1, this register is R/W and can be used to set the calibration offset manually. Green1 pixels share rows with red pixels. 15:0 0x0020 Cal Green2 Offset (RW) Analog calibration offset for green2 pixels, represented as a two's complement signed 8-bit value (if bit 8 is clear, the offset is positive and the magnitude is given by bits 7:0. If bit 8 is set, the offset is negative and the magnitude is given by not ([7:0]) + 1.) If R0x60[0] = 0, this register is R/O and returns the current value computed by the black level calibration algorithm. If R0x60[0] = 1, this register is R/W and can be used to manually set the calibration offset. Green2 pixels share rows with blue pixels. 15:0 0x0000 Black Level Calibration (RW) 15 0x0000 Disable Fast Sample 14 0x0000 Lock Green Calibration Lock Green Calibration--when set, only one calibration value will be used for both Green1 and Green2 channels. Default is 0, set to "0" at all times. Note: Gain for Green1 and Green2 channels must be equal for setting to be effective. 13 0x0000 Lock Red/Blue Calibration Lock Red/Blue Calibration--when set, only one calibration value will be used for both red and blue channels. Default is 0, set to "0" at all times. Note: Gain for Red and Blue channels must be equal for setting to be effective. 12 0x0000 Recalculate BL Recalculate Black Level--1 = start a new running digitally filtered average for the black level (this is internally reset to "0" immediately), and do a rapid sweep to find the new starting point. 0 = normal operation (default). 11 0x0000 Disable Binary search 10:9 X Reserved 8 0x0000 Reserved 7 0x0000 Reserved 6:5 0x0000 Reserved 4:3 0x0000 Reserved 2 X Reserved 1 0x0000 Disable calib Force/disable black level calibration. 0 = Enable Offset Correction (default). 1 = disable Offset Correction Voltage (Offset Correction Voltage = 0.0V). 0 0x0000 Manual override Manual override of black level correction. 1 = override automatic black level correction with programmed values. 0 = normal operation (default). PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 0x231D X 0x0023 21 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Sensor Core Register Descriptions Table 6: Reg. # R99 R0x63 R100 R0x64 R248 R0xF8 R255 R0xFF Core Registers (Continued) Bits Default Name 15:0 0x0020 Red Offset (RW) Analog calibration offset for red pixels, represented as a two's complement signed 8-bit value (if bit 8 is clear, the offset is positive and the magnitude is given by bits 7:0. If bit 8 is set, the offset is negative and the magnitude is given by not([7:0]) + 1). If R0x60[0] = 0, this register is R/O and returns the current value computed by the black level calibration algorithm. If R0x60[0] = 1, this register is R/W and can be used to manually set the calibration offset. 15:0 0x0020 Blue Offset (RW) Analog calibration offset for blue pixels, represented as a two's complement signed 8-bit value (if bit 8 is clear, the offset is positive and the magnitude is given by bits 7:0. If bit 8 is set, the offset is negative and the magnitude is given by not ([7:0]) + 1). If R0x60[0] = 0, this register is R/O and returns the current value computed by the black level calibration algorithm. If R0x60[0] = 1, this register is R/W and can be used to set the calibration offset manually. 15:0 0x0001 Chip Enable (RW) 15:2 X Reserved 1 0x0000 Synchronize changes Mirrors the functionality of R0x07 bit 0 (Synchronize changes). 0 = normal operation, update changes to registers that affect image brightness (integration time, integration delay, gain, horizontal and vertical blank, window size, row/column skip, or row/ column mirror) at the next frame boundary. 1 = do not update any changes to these settings until this bit is returned to "0." 0 0x0001 CE Mirrors the functionality of R0x07 bit 1,(Chip Enable). 1 = normal operation. 0 = stop sensor read out. When this is returned to "1," sensor read out restarts at the starting row in a new frame. 15:0 0x1621 Chip Version (RO) Chip version. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 22 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Feature Description Window Control R0x01, R0x02, R0x03, and R0x04 These registers control the size of the window. Window Size The default programmed window size is 2,048 columns by 1,536 rows (2,048H x 1,536V). The control logic allows the flexibility to change the window size by programming R0x03 and R0x04. R0x03 controls the window height (number of rows) and R0x04 controls the window width (number of columns). The value to be programmed in R0x03 is the desired number of rows -1. The value to be programmed in R0x04 is the desired number of columns -1. The minimum value for R0x03 is 0x0001; for R0x04, 0x0001. Thus, the smallest window size is two columns by two rows (2H x 2V). The value of R0x03 and R0x04 must be an odd number (there can only be even number of columns). The user can program the window size to be any format desired. Table 7 shows examples of register settings to achieve various resolutions and frame rates. Table 7: Standard Resolutions Resolution 2,048 x 1,536 QXGA 1,600 x 1,200 UXGA 1,280 x 1,024 SXGA 1,024 x 768 XGA 800 x 600 SVGA 640 x 480 VGA Table 8: Frame Rate Column_Size (R0x04) Row_Size (R0x03) Shutter Width (R0x09) 12 fps 20 fps 27 fps 43 fps 65 fps 93 fps 2,047 1,599 1,279 1,023 799 639 1,535 1,199 1,023 767 599 479 <1,552 <1,216 <1,040 <784 <616 <496 Frame Rate Column_Size (R0x04) Row_Size (R0x03) Shutter Width (R0x09) 18 fps 39 fps 1,919 1,279 1,079 719 <1,096 <736 Wide Screen (16:9) Resolutions Resolution 1,920 x 1,080 HDTV 1,280 x 720 HDTV Note: PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN For Table 7 and Table 8 above, the settings for R0x05 (horizontal blanking) and R0x06 (vertical blanking) are 21 and 15 respectively, while all of the registers are set to default. 23 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Electronic Panning In addition to changing the window size, the user has the flexibility to change the location of the readout window. R0x01 controls the first row to be read out and R0x02 controls the first column to be read out. The default values are 0x0014 (decimal 20) for R0x01 and 0x0020 (decimal 32) for R0x02. The first column to be read out must be an even number. R0x01 and R0x02, together with R0x03 and R0x04, allow the user to choose any segment of the imager array to be read out. This is especially beneficial when the user needs to zoom in on a small portion of the image and perform analysis on the image content. Figure 9 shows some examples of the electronic panning/zoom-in and windowing capabilities of the sensor. Blanking Control R0x05 and R0x06 These registers control the blanking time in a row (called column fill-in or horizontal blanking) and between frames (vertical blanking). Horizontal blanking is specified in terms of pixel clocks. Vertical blanking is specified in terms of row readout times. The actual imager timing can be calculated using the equations given in Table 4 on page 12. R0x05 controls the horizontal blanking time in a row. The value is specified in terms of pixel clocks. Default value of 0x008E for R0x05 results in a horizontal blanking time of 511 pixel clocks. The minimum value for R0x05 is 21. Thus, the minimum horizontal blanking time is 390 pixel clocks. R0x06 controls the vertical blanking time in a row. The value is specified in terms of the number of rows. Default value of 0x0019 for R0x06 results in a vertical blanking time of 26-row time. Frame Time R0x03, R0x04, R0x05, and R0x06 Total frame time in terms of pixel clocks can be obtained using the formula given in Table 4 on page 12. The user can change the number of columns and rows read out, horizontal blanking and vertical blanking times to obtain different frame rates. High Frame Rate Readout Modes R0x01, R0x02, R0x03, R0x04, R0x05, and R0x06 In addition to having the flexibility to read out smaller standard formats, the sensor gives the user the option of reading out nonstandard formats. This is particularly useful if the user needs to zoom in on a particular segment of the image to perform high-speed mathematical calculations (e.g., high-speed viewfinder or auto focus applications). In applications such as the auto focus mode, the user may need more horizontal resolution than vertical. Thus, the user can window down to the mid-section of the imager array by programming R0x01 and R0x03 to change the row start address and the window height. Figure 10 is an example of how the user may want to window down to 2,048H x 512V from the default of 2,048H x 1,536V. See also Table 9 for other auto focus mode resolutions. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 24 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Figure 9: Windowing Capabilities (32, 20) (1200, 180) A B (1327, 307) (568, 356) C (1079, 867) (80, 912) D (1007, 479) (2048, 1536) Window A Window B Window C Window D Table 9: Resolution 2,048 x 512 2,048 x 256 2,048 x 128 Figure 10: Window Size 2,048 x 1,536 128 x 128 512 x 512 400 x 96 R0x01 0x0014 0x00B4 0x0164 0x0390 R0x02 0x0020 0x04B0 0x0238 0x0050 R0x03 0x05FF 0x007F 0x01FF 0x018F R0x04 0x07FF 0x007F 0x01FF 0x005F Auto Focus Modes Frame Rate Column_ Size (R0x04) Row_ Size (R0x03) Horizontal_ Blank (R0x05) Vertical_ Blank (R0x06) Row_ Bin (R0x22) Row_ Skip (R0x22) Column_ Bin (R0x23) Column_ Skip (R0x23) 30 fps 60 fps 120 fps 2,047 2,047 2,047 1,535 1,535 1,023 22 22 34 1 0 14 2 2 1 2 5 7 0 0 0 0 0 0 Windowing 2,048 Row Start = 20 (R0x01 = 0x0014) Row Start = 356 (R0x01 = 0x0164) 512 1,536 The user can change R0x05 and R0x06 to obtain the desired frame rate. Also, the user may want to perform row skip modes to obtain larger field of view if high-frequency vertical resolution is not critical. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 25 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Pixel Integration Time Control R0x09 and R0x0C The integration time of the pixel is the amount of time the pixels are set to collect charge generated from light. The user can change the integration time of the sensor by programming R0x09. The value of R0x09 sets the number of row time for integration. The sensor also supports sub-row integration time for fine control of pixel integration time. The formula for calculating the pixel integration time is (reference Table 4 on page 12 for P1 description): INT = (65536 x R0x08 + R0x09) x tROW -R0x0C-P1+132 t Typically, the value of R0x09 is limited to the number of rows per frame (which includes vertical blanking rows), such that the frame rate is not affected by the integration time. However, if R0x09 is increased beyond the total number of rows per frame, then additional blanking rows are added as needed. While the user can adjust the integration time to the desired value according to the aforementioned formula, not all integration times may be desired under certain lighting conditions. If the light source has a flicker component, then the integration time needs to be set properly to avoid banding in the image. Under 60Hz flicker, the integration time must be a multiple of 1/120 of a second to avoid flicker. Under 50Hz flicker, the integration time must be a multiple of 1/100 of a second to avoid flicker. Snapshot Mode and Flash Control R0x1E, STROBE pin and TRIGGER pin Setting up for Snapshot Mode Snapshot mode must be enabled before use by setting bit 8 = "1" of R0x1E. There are two important signals used for snapshot mode: TRIGGER and STROBE. The TRIGGER signal initiates the start of a single frame capture and STROBE is an output pulse that may be used to turn on a flash and/or activate a mechanical shutter. Triggering A Snapshot The TRIGGER signal required for starting a frame capture may be generated in the following two ways: 1. External TRIGGER Pulse Pin 8 is a digital input that may be used to supply an external trigger signal input. The snapshot operation begins after the TRIGGER pulse transitions from a HIGH to LOW state. 2. TRIGGER from Register Setting A second method for triggering a snapshot is by setting bit 0 = 1 of R0x0B (Restart). This register automatically returns bit 0 to "0" after the TRIGGER is initiated. This bit does not need to be reset by the user after use. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 26 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Strobe Pulse Output The STROBE pulse must be enabled before use by setting R0x1E [bit 9] = 1. The STROBE signal has two options for pulse length and may be selected using R0x1E [bit 10] as shown in Table 10. Table 10: STROBE Pulse Output R0x1E, Bit 10 0 1 STROBE Pulse Width 1 row time (default) ((65536 x R0x08 + R0x09 - R) -16) x tROW - V After the TRIGGER pulse has signaled a snapshot operation, each row of the imager array is reset in sequence to clear out any accumulated signal. Once each row of the imager is reset, the STROBE pulse is output from the imager with a length dependent upon the characteristics described above. After the STROBE pulse goes low, the imager waits 16 additional rows and then each row from the pixel array is read out. No STROBE is generated unless the shutter width is greater than the output image height plus vertical blanking. Global Shutter Release Snapshot Mode R0x1E and R0x21 In addition to the standard snapshot mode, the MT9T031 has a global shutter release mode which may be combined with a mechanical shutter to achieve simultaneous exposure of all rows in the image. Two global shutter modes are available: programmed exposure and bulb mode. In programmed exposure mode, the exposure time is dictated by {R0x08, R0x09} (Shutter Width). In bulb mode, the TRIGGER and GSHT_CTL pins are used to achieve an arbitrary exposure time. Programmed Exposure Mode To use programmed exposure mode: 1. Set up snapshot mode as normal (including any STROBE preferences). 2. Set R0x21 (Read Mode 3) to 0x0003. 3. Assert (transition LOW to HIGH) the GSHT_CTL pin to reset the array. This pin must remain HIGH for 18820 PIXCLKs. 4. Negate (transition HIGH to LOW) the GSHT_CTL pin to begin the exposure. The exposure starts 1000 PIXCLKs after the falling edge of GSHT_CTL. Note: Unlike normal snapshot mode, R0x0B (Restart) may not be used to initiate the exposure in global shutter modes. 5. Row readout begins automatically. The mechanical shutter should be closed before row read out begins. The trailing edge of STROBE (if enabled) occurs ((65536 x R0x08 + R0x09) x tROW + 2000) PIXCLKs after the falling edge of GSHT_CTL. Readout of the active window starts the lesser of 16 x tROW or (R0x06 + 1) x tROW later. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 27 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Bulb Mode To use bulb mode: 1. Set up snapshot mode as normal (including any STROBE preferences). 2. Set R0x21 (Read Mode 3) to 0x0001. 3. Assert (transition LOW to HIGH) the GSHT_CTL pin. 4. Assert (transition LOW to HIGH) the TRIGGER pin to reset the array. This pin must remain HIGH for at least 18,820 PIXCLKs. 5. Negate (transition HIGH to LOW) the GSHT_CTL pin to begin the exposure. The exposure starts 1,000 PIXCLKs after the falling edge of GSHT_CTL. Note: Unlike normal snapshot mode, R0x0B (Restart) may not be used to initiate the exposure in global shutter modes. 6. Negate (transition HIGH to LOW) the TRIGGER pin to begin row read out. The mechanical shutter should be closed before row read out begins. The trailing edge of STROBE (if enabled) occurs ((65536 x R0x08 + R0x09) x tROW ) PIXCLKs after the falling edge of TRIGGER. Read out of the active window starts the lesser of 16 x tROW or (R0x06 + 1) x tROW later. In this mode, the shutter width (R0x08, R0x09) would normally be set to a low number, allowing row readout to start immediately after the trailing edge of TRIGGER. Skip and Bin Modes Row and column skip modes use subsampling to reduce the output resolution without reducing field-of-view. The MT9T031 also has row and column binning modes, which can reduce the impact of aliasing introduced by the use of skip modes. This is achieved by the averaging of two or three adjacent rows and columns (adjacent same-color pixels). Both 2X and 3X binning modes are supported. Rows and columns can be binned independently. Table 11: Resolution 1,024 x 768 XGA 800 x 600 SVGA 640 x 480 VGA Bin and Skip Mode Resolution Frame Rate Column_ Size (R0x04) Row_ Size (R0x03) Horizontal_ Blank (R0x05) Vertical_ Blank (R0x06) Row_ Bin (R0x22) Row_ Skip (R0x22) Column_ Bin (R0x23) Column_ Skip (R0x23) 34 fps 2,047 1,535 22 40 1 1 1 1 50 fps 1,599 1,199 22 30 1 1 1 1 48 fps 1,919 1,439 21 31 2 2 2 2 Note: Column start address value must be a multiple of R0x23 [5-4] + 1. To use binning mode, set R0x22[5-4] (row bin) or R0x23[5-4] (column bin) to the desired reduction minus 1, as would be done for skip mode. Additionally, R0x22[2-0] (column skip) must be set no less than R0x22[5-4], and R0x23[2-0] (row skip) must be set no less than R0x23[5-4]. Row and column skip modes may be set higher than the corresponding binning modes to achieve greater reductions, but binning must be done. The different skip modes supported are between 2X and 8X in both column and row directions. The different binning modes supported are 2X and 3X. See Table 12 for register bits controlling the different bin and skip modes. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 28 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Table 12: Skip and Bin Modes Register Bit R0x23 Bit[2-0] Bit[5-4] R0x22 Bit[2-0] Bit[5-4] Skip/Bin Modes No column skip Column skip 2X Column skip 3X Column skip 4X Column skip 8X col0, col1, col2, col3, col4, col5, etc. col0, col1, col4, col5, col8, col9, etc. col0, col1, col16, col7, col12, col13 etc. col0, col1, col8, col9, col16, col17, etc. col0, col1, col16, col17, col32, col33, etc. Column Bin 2X Column Bin 3X Binning of 2 adjacent same-color pixels in a 4x4 window Binning of 3 pixel of each color plane in a 6x6 window No row skip Row skip 2X Row skip 3X Row skip 4X Row skip 8X row0, row1, row2, row3, row4, row5, etc. row0, row1, row4, row5, row8, row9, etc. row0, row1, row6, row7, row12, row13, etc. row0, row1, row8, row9, row16, row17, etc. row0, row1, row16, row17, row32, row33, etc. Row bin 2X Row bin 3x Binning of 2 pixel of each color plane in a 4x4 window Binning of 3 pixel of each color plane in a 6x6 window Note: Figure 11: Readouts Column and row skip modes 1x through 8x are available on the MT9T031. Also, the read outs shown assume column start and row start addresses are both "0". Column Skip 2X; Row Skip 2X Enabled Pixel (R0x01, R0x02) ... R G R G R G R G R G G B G B G B G B G B R G R G R G R G R G G B G B G B G B G B R G R G R G R G R G G B G B G B G B G B R G R G R G R G R G G B G B G B G B G B R G R G R G R G R G G B G B G B G B G B .. . PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 29 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Figure 12: Column Skip 3X; Row Skip 3X Enabled Pixel (R0x01, R0x02) PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B 30 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Figure 13: Column Skip 4X; Row Skip 4X Enabled ... R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B Pixel (R0x01, R0x02) .. . Figure 14: Column Skip 8X; Row Skip 8X Enabled Pixel (R0x01, R0x02) R ... G R G R G R G B R G G B R G G B R G G B G B G R G R G G B G B G R G R G B R G G B R G B G B G R G R G G B G B G R G B G B R G R G B G B G B R G R G R G G B G B G B G R G R G B R G G B R G B G B G R G R G G B G B G R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B R G R G R G R G R G R G R G R G R G G B G B G B G B G B G B G B G B G B . PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 31 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Figure 15: Bin 2-to-1: 2,048H x 1,536V (QXGA) to 1,024H x 768V (XGA) Note: Figure 16: Gr R Gr R B Gb B Gb Grs Rs Gr R Gr R Bs Gbs B Gb B Gb Grs = binning of 4 Gr[s] in a 4 x 4 window; Gbs = binning of 4 Gb[s] in a 4 x 4 window. Rs = binning of 4 R[s] in a 4 x 4 window; B[s] = binning of 4 B[s] in a 4 x 4 window. Bin 3-to-1: 2,048H x 1,536V (QXGA) to 640H x 480V (VGA) Gr R Gr R Gr R B Gb B Gb B Gb Gr R Gr R Gr B Gb B Gb B R Gb Gr R Gr R Gr R B Gb B Gb B Gb Note: Grs Rs Bs Gbs Grs = binning of 9 Gr[s] in a 6 x 6 window; Gbs = binning of 9 Gb[s] in a 6 x 6 window. Rs = binning of 9 R[s] in a 6 x 6 window; Bs = binning of B[s] in a 6 x 6 window. Smaller Format Resolution R0x01, R0x02, R0x03, R0x04, R0x05, R0x06, R0x22, and R0x23 With the aforementioned flexible windowing capability of the sensor, the user is able to read out different resolution formats from default of QXGA to UXGA, SXGA, XGA, SVGA, VGA, CIF, QVGA, QCIF, etc. Below are some examples of programmable register settings to obtain the estimated frame rates for the desired formats. The user can change the values of R0x05 and R0x06 to obtain different frame rates. The field of view of the image is reduced since the programmed settings effectively reduce the read out window to the specified settings without skipping any rows or columns. If the user only changes the register settings mentioned above without changing the row and column start address, the read out window would start from that coordinate. To read out the center of the image or any portion that is desired, the user would need to program R0x01 and R0x02, thus performing electronic panning. To maintain the same field of view while reducing the read out resolution, the user would need to perform row and column skip. For example, if the desired read out resolution needs to be XGA (1,024H x 7,68V) instead of QXGA (2,048H x 1,536V). To maintain the same field of view, the user can select column skip 2X and row skip 2X modes. This effectively reduces the horizontal and vertical resolution by 2X for a factor of 4X reduction in overall number of pixels that are read out. To perform this read out mode, the user would need to set the following: R0x03 = 0x05FF R0x04 = 0x07FF R0x23 Bit[2:0]=1 R0x22 Bit[2:0] = 1 PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 1,536V rows 2,048H columns Column skip 2X--> 1,024H columns read out Row skip 2X --> 768 rows read out 32 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description If the user sets R0x03 = 0x02FF (768V rows), R0x04 = 0x03FF (1,024H columns), and then enable column skip 2X and row skip 2X, the effective readout resolution is 512H x 384V. Line_Valid Formats R0x20 is used to control many aspects of the readout of the sensor. By setting Bit 9 and 10 of R0x20 the LINE_VALID signal can get three different output formats. The formats are shown in Figure 17 when reading out four rows and two vertical blanking rows. In the last format the LINE_VALID signal is the XOR between the continuously LINE_VALID signal and the FRAME_VALID signal. Figure 17: Different LINE_VALID Formats Default FRAME_VALID LINE_VALID Continuously FRAME_VALID LINE_VALID XOR FRAME_VALID LINE_VALID PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 33 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Signal Path The MT9T031 sensor analog signal path consists of the pixel array, the column sample and hold (S/H) circuitry, the programmable gain stage, the analog offset correction and the analog-to-digital converter (ADC). The reset and signal voltages from the pixel are sampled onto the column sample and hold circuitry on a row-wise basis. After signal sampling is complete, the differential signal (reset - signal) is transferred to the programmable gain stage. After the gain stage, the differential signal goes through the analog offset correction circuitry. The user can decide if a positive or negative offset or no offset needs to be added to the differential signal. The signal is then sampled onto the sample and hold circuitry of the ADC before being digitized. Figure 18: Signal Path Analog Gain (color-wise) Pixel Voltage X Digital Offset (color-wise) + 10-bit ADC Analog Offset (color-wise) PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 34 Black Level Calibration + X DOUT[9:0] Digital Gain (color-wise) (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Feature Description Gain Settings R0x2B, R0x2C, R0x2D, R0x2E, and R0x35 The analog programmable gain stage consists of two stages of gain circuitry that operate in a pipelined manner. The first stage of gain has programmable gain of 1 or 2 while the second stage of gain has programmable gain of 1 to 4 with steps of 0.125 for a maximum analog gain of 8. The gain settings can be independently adjusted for the colors of Green1, Blue, Red, and Green2 and are programmed through R0x2B, R0x2C, R0x2D, and R0x2E, respectively. The gain may also be adjusted globally through R0x35. The first stage of gain is set by Bit(6), while the second stage gain is set by Bit(5-0). The gain is individually controllable for each color in the Bayer pattern as follows: Analog Gain < = 8: Gain = (Bit[6] + 1) x (Bit[5:0] x 0.125) Digital Gain = 1 + Bit[14:8]/8 Total Gain = Analog Gain x Digital Gain Since Bit[6] of the gain registers are multiplicative factors for the gain settings, there are alternative ways of achieving certain gains. Some settings offer superior noise performance to others, despite the same overall gain, as shown in Table 13. Table 13: Gain Increment Settings Nominal Gain Increments Recommended Settings 1 to 4.000 4.25 to 8.00 9.0 to 128.0 0.125 0.25 1.0 0x0008 to 0x0020 0x0051 to 0x0060 0x0160 to 0x7860 Black Level Calibration R0x5D, and R0x5F The digitized black level of the MT9T031 sensor potentially varies with temperature or gain setting changes. The MT9T031 sensor allows the user the flexibility of automatic black level calibration or manual black level control. Manual Black Level Calibration R0x60, R0x61, R0x62, R0x63, and R0x64 The programmable analog offset stage corrects for analog offset that might be present in the analog signal. The user would need to program R0x62 appropriately to enable the analog offset correction. The analog offset settings can be independently adjusted for the colors of Green1, Green2, Red and Blue and are programmed through R0x60, R0x61, R0x63 and R0x64 respectively. Bit[8] of R0x60, R0x61, R0x63 and R0x64 (these registers have two's complement representation) determines the sign of the analog offset. Bit[8] = 1 makes the analog correction negative instead of positive. The lower 8 bits (Bit[7:0]) determine the absolute value of the analog offset to be corrected and Bit[8] determines the sign of the correction. When Bit[8] is "1", the sign of the correction is negative and vice versa. The analog value of the correction relative to the analog gain stage can be determined from the following formula: PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 35 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Serial Bus Description Analog offset = Bit[8:0] x 1 LSB The 1 LSB value in the formula is an estimate amount. It deviates from 1 LSB with process variation. Black Level R0x49 Digital offset is applied such that the average black level of a frame in a resulting image equals the value of this register. This adjustment happens after black level calibration. Reset This register is used to reset the sensor registers to their default, power-up state. To reset the MT9T031, first write a "1" into bit 0 of this register to put the MT9T031 in reset mode, then write a "0" into bit 0 to resume operation. Another way to reset the sensor is through the RESET# (pin 10) - by pulling the RESET# signal to 0V. The reset operation is an asynchronous reset and the sensor remains in reset as long as RESET# signal = 0V. In both methods of reset, the sensor register settings returns to their default states. Standby Control and Chip Enable There are two steps required to put the sensor in standby mode: 1. Through the two-wire serial interface program R0x07 Bit[1] = 0. This stops the sensor readout and powers down analog circuitry of the sensor. The sensor stays in standby mode until the user reprograms R0x07 Bit[1] = 1. 2. Set STANDBY (pin 7) to HIGH. Serial Bus Description Registers are written to and read from the MT9T031 through the two-wire serial interface bus. The MT9T031 is a serial interface slave and is controlled by the serial clock (SCLK), which is driven by the serial interface master. Data is transferred into and out of the MT9T031 through the serial data (SDATA) line. The SDATA line is pulled up to 3.3V offchip by a 1.5K resistor. Either the slave or master device can pull the SDATA line down-- the serial interface protocol determines which device is allowed to pull the SDATA line down at any given time. Protocol The two-wire serial defines several different transmission codes, as follows: * a start bit * the slave device 8-bit address * a(n) (no) acknowledge bit * an 8-bit message * a stop bit PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 36 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Serial Bus Description Sequence A typical read or write sequence begins by the master sending a start bit. After the start bit, the master sends the slave device's 8-bit address. The last bit of the address determines if the request is a read or a write, where a "0" indicates a write and a "1" indicates a read. The slave device acknowledges its address by sending an acknowledge bit back to the master. If the request was a write, the master then transfers the 8-bit register address to which a write should take place. The slave sends an acknowledge bit to indicate that the register address has been received. The master then transfers the data eight bits at a time, with the slave sending an acknowledge bit after each eight bits. The MT9T031 uses 16-bit data for its internal registers, thus requiring two 8-bit transfers to write to one register. After 16 bits are transferred, the register address is automatically incremented, so that the next 16 bits are written to the next register address. The master stops writing by sending a start or stop bit. A typical read sequence is executed as follows. First the master sends the write-mode slave address and 8-bit register address, just as in the write request. The master then sends a start bit and the read-mode slave address. The master then clocks out the register data eight bits at a time. The master sends an acknowledge bit after each 8-bit transfer. The register address is auto-incremented after every 16 bits is transferred. The data transfer is stopped when the master sends a no-acknowledge bit. Bus Idle State The bus is idle when both the data and clock lines are HIGH. Control of the bus is initiated with a start bit, and the bus is released with a stop bit. Only the master can generate the start and stop bits. Start Bit The start bit is defined as a HIGH-to-LOW transition of the data line while the clock line is HIGH. Stop Bit The stop bit is defined as a LOW-to-HIGH transition of the data line while the clock line is HIGH. Slave Address The eight-bit address of a two-wire serial interface device consists of seven bits of address and 1 bit of direction. A "0" (0xBA) in the LSB (least significant bit) of the address indicates write mode, and a "1" (0xBB) indicates read mode. Data Bit Transfer One data bit is transferred during each clock pulse. The serial interface clock pulse is provided by the master. The data must be stable during the HIGH period of the two-wire serial interface clock--it can only change when the serial clock is LOW. Data is transferred eight bits at a time, followed by an acknowledge bit. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 37 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Serial Bus Description Acknowledge Bit The master generates the acknowledge clock pulse. The transmitter (which is the master when writing, or the slave when reading) releases the data line, and the receiver indicates an acknowledge bit by pulling the data line LOW during the acknowledge clock pulse. No-Acknowledge Bit The no-acknowledge bit is generated when the data line is not pulled down by the receiver during the acknowledge clock pulse. A no-acknowledge bit is used to terminate a read sequence. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 38 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Two-Wire Serial Interface Sample Write and Read Sequences Two-Wire Serial Interface Sample Write and Read Sequences 16-Bit Write Sequence A typical write sequence for writing 16 bits to a register is shown in Figure 19. A start bit given by the master, followed by the write address, starts the sequence. The image sensor then gives an acknowledge bit and expects the register address to come first, followed by the 16-bit data. After each eight-bit transfer, the image sensor gives an acknowledge bit. All 16 bits must be written before the register is updated. After 16 bits are transferred, the register address is automatically incremented so that the next 16 bits are written to the next register. The master stops writing by sending a start or stop bit. Figure 19: Timing Diagram Showing a Write to R0x09 with the Value 0x0284 SCLK SDATA R0x09 0xBA ADDR START 0000 0010 1000 0100 ACK ACK ACK STOP ACK 16-Bit Read Sequence A typical read sequence is shown in Figure 20. First the master has to write the register address, as in a write sequence. Then a start bit and the read address specifies that a read is about to happen from the register. The master then clocks out the register data eight bits at a time. The master sends an acknowledge bit after each eight-bit transfer. The register address should be incremented after every 16 bits is transferred. The data transfer is stopped when the master sends a no-acknowledge bit. Figure 20: Timing Diagram Showing a Read from R0x09; Returned Value 0x0284 SCLK SDATA 0xBA ADDR START PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN R0x09 ACK 0xBB ADDR ACK START ACK 39 1000 0100 0000 0010 ACK STOP NACK (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Electrical Specifications Electrical Specifications Two-Wire Serial Register Interface The electrical characteristics of the two-wire serial register interface (SCLK, SDATA) are shown in Figure 21 and Table 14 on page 41. Figure 21: Two-Wire Serial Bus Timing Parameters tr_clk t SRTH SCLK t SCLK t SDH t SDS t SHAW tf_clk tr_sdat tf_sdat 90% 90% 10% 10% t AHSW t STPS t STPH SDATA Write Address Bit 7 Write Address Bit 0 Register Address Bit 7 Write Start Register Value Bit 0 ACK t AHSR t SHAR SCLK Stop t SDHR t SDSR SDATA Read Address Bit 7 Read Address Bit 0 Register Value Bit 7 Read Start Note: PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Register Value Bit 0 ACK Read sequence: For an 8-bit READ, read waveforms start after the WRITE command and register address are issued. 40 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Electrical Specifications Table 14: Two-Wire Serial Bus Characteristics Symbol Definition f SCLK Serial interface input clock frequency Serial Input clock period SCLK Duty Cycle SCLK rise time SCLK fall time SDATA rise time SDATA fall time Start hold time SDATA hold time SDATA setup time SDATA hold to ACK ACK hold to SDATA Stop setup time Stop hold time SDATA hold to ACK ACK hold to SDATA SDATA hold SDATA setup tSCLK tr_sclk tf_sclk tr_sdat tf_sdat t SRTH t SDH t SDS tSHAW tAHSW tSTPS tSTPH tSHAR tAHSR tSDHR tSDSR Condition Min Typ Max Unit - - - - - 20 - - - - 100 0 0 580 580 0 0 580 580 0 0 - - 50 173.4 64.2 172.6 63 145.8 0 0 623 623 0 0 623 623 0 0 1.2 83.3 79 - - - - 200 0 0 680 680 0 0 680 680 0 0 MHz sec % ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns WRITE/READ WRITE WRITE WRITE WRITE WRITE/READ WRITE/READ READ READ READ READ I/O Timing By default, the MT9T031 launches pixel data, FRAME_VALID and LINE_VALID with the rising edge of PIXCLK. The expectation is that the user captures DOUT[11:0], FRAME_VALID and LINE_VALID using the falling edge of PIXCLK. See Figure 22 and Table 15 for I/O Timing (AC) characteristics. Figure 22: I/O Timing Diagram tR t RP tF t FP 90% 90% 10% 10% t EXTCLK EXTCLK t CP PIXCLK t PD t PD Data[7:0] Pxl_0 Pxl_1 Pxl_2 Pxl_n t PFH t PFL t PLH FRAME_VALID/ LINE_VALID PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN t PLL FRAME_VALID leads LINE_VALID by 369 PIXCLKs as described in Figure 8 and Table 4. 41 FRAME_VALID trails LINE_VALID by 142 PIXCLKs as described in Figure 8 and Table 4. (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Electrical Specifications Table 15: I/O Timing Characteristics Symbol f EXTCLK1 t EXTCLK1 t R t F t RP t FP t JITTER CP fPIXCLK t PD tPFH tPLH tPFL tPLL CLOAD t Table 16: Definition Conditions Input clock frequency Input clock period Input clock rising edge slew rate Input clock falling edge slew rate Pixclk rising edge slew rate Pixclk falling edge slew rate Clock duty cycle Input clock jitter 48 MHz EXTCLK to PIXCLK propagation delay PIXCLK frequency PIXCLK to data valid PIXCLK to FV HIGH PIXCLK to LV HIGH PIXCLK to FV LOW PIXCLK to LV LOW Output load capacitance Nominal voltages Default Default Default Default Default Default Min Typ Max Units 1 1000 - - - - 40 - - 1 0.6 1.0 1.1 1.1 2.1 - - - 4 4 4 4 50 306 5 - 4.02 3.98 4.08 4.08 4.56 30 48 20.8 - - - - 60 - - 48 8.8 7.6 6.8 6.8 8.6 - MHz ns V/ns V/ns V/ns V/ns % ps ns MHz ns ns ns ns ns pF DC Electrical Characteristics fEXTCLK = 48 MHz, VDD = 3.3V, VAA = 3.3V, VAAPIX = 3.3V, T = 25C A Symbol Definition VDD VAA VAAPIX VIH VIL IIN Core digital voltage Analog voltage Pixel supply voltage Input high voltage Input low voltage Input leakage current VOH VOL IOH IOL IOZ IDD IAA IAAPIX ISTDBYD ISTDBYA ISTDBYDA Output high voltage Output low voltage Output high current Output low current Tri-state output leakage current Digital operating current Analog operating current Pixel supply current Digital standby current Analog standby current Pixel standby current PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Condition No Pull-up Resistor; VIN = VDD or DGND At specified IOH At specified IOL At specified VOH At specified VOL 0 lux, 48 MHz 0 lux, 48 MHz 0 lux, 48 MHz Input clock disabled, 0 lux Input clock disabled, 0 lux Input clock disabled, 0 lux 42 Min Typ Max Units 3 3 3 1.70 3.3 3.3 3.3 3.6 3.6 3.6 1.45 5 V V V V V A 0.3 11.5 12.5 5 27.8 54.9 4.9 2.0 2.0 1.0 V V mA mA A mA mA mA A A A -5 3.3 0 23.6 44.6 3.7 24 46.0 3.9 0.2 0.2 0.1 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Electrical Specifications Table 17: Absolute Maximum Ratings Symbol VDD_MAX VAA_MAX VAAPIX_MAX VIN_MAX IDD_MAX IAA_MAX IAAPIX_MAX TOP2 TST1 Definition Note: PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Conditions Core digital voltage Analog voltage Pixel supply voltage Input voltage Digital operating current Analog operating current Pixel supply current Operating temperature Storage temperature Measure at junction Min Max Units -0.3 -0.3 -0.3 - - - - 0 -40 3.6 3.6 3.6 1.9 29.5 56.3 6.4 60 125 V V V V mA mA mA C C 1. Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. In order to keep dark current and shot noise artifacts from impacting image quality, care should be taken to keep TOP at a minimum. 43 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Electrical Specifications Figure 23: Quantum Efficiency Quantum Efficiency 40 Blue Green Red Quantum Efficiency (%) 35 30 25 20 15 10 5 0 350 400 450 500 550 600 650 700 750 800 Wavelength (nm) Note: Figure 24: Diagram not to scale. Image Center Offset Pixel Array Pixel (0, 0) 0.078mm 0.934mm Optical Center 7.721mm Dark Pixels Die Center 7.802mm Note: PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN Diagram not to scale. 44 (c)2006 Aptina Imaging Corporation. All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Electrical Specifications Figure 25: 48-Pin CLCC Note: PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN All dimensions in millimeters. 45 (c)2006 Aptina Imaging Corporation All rights reserved. MT9T031: 1/2-Inch 3-Mp Digital Image Sensor Revision History Revision History Rev. E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5/3/11 * Updated trademarks * Applied updated template Rev. D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6/10 * Updated to non-confidential Rev. C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5/4/10 * Added Figure 24: "Image Center Offset," on page 44 Rev. B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9/09 * Updated to Aptina template * Changed 48-pin PLCC to 48-pin CLCC in Table 1, "Key Performance Parameters," on page 1, in Figure 3: "48-Pin CLCC," on page 8, and in Figure 25: "48-Pin CLCC," on page 45 * Updated Figure 25: "48-Pin CLCC," on page 45 Rev. A, Production. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .07/06 * Initial release 10 Eunos Road 8 13-40, Singapore Post Center, Singapore 408600 prodmktg@aptina.com www.aptina.com Aptina, Aptina Imaging, and the Aptina logo are the property of Aptina Imaging Corporation All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. PDF: 3682685119/Source: 9830567334 MT9T031_DS - Rev.E 5/11 EN 46 . (c)2006 Aptina Imaging Corporation All rights reserved.