AMMC-6425
18-28 GHz 1W Power Ampli er MMIC
Data Sheet
Description
The AMMC-6425 is an MMIC power ampli er designed for
use in wireless transmitters that operate within an 18GHz
to 28GHz range. At 28GHz, it provides 30dBm of output
power (P1dB) and 24dB of small-signal gain from a small
easy-to-use device. This MMIC is optimized for linear op-
eration with an output third order intercept point (OIP3)
of 38dBm. The device has input and output matching
circuitry for use in 50 environments. The AMMC-6425
also has integrated, temperature compensated, RF power
detection circuitry that enables power detection of 0.3V/
Watt at 28GHz.
Chip Size: 2500 x 1870µm (100 x 74ils)
Chip Size Tolerance: ± 10µm (±0.4 mils)
Chip Thickness: 100 ± 10µm (4 ± 0.4 mils)
Pad Dimensions: 100 x 100µm (4 x 4 ±0.4 )mils)
Please refer to Hazardous substances table on page 9
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A): 50V
ESD Human Body Model (Class 0): 250V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
Features
High Gain: 24dB
1-watt output power (P-1)
50 match on input and output
Integrated RF power detector
ESD protection (50V MM, and 250V HBM)
Speci cations (Vd=5V, Idsq=0.65A)
Frequency range 18 to 28 GHz
Small signal Gain of 24dB
Output power @P-1 of 29dBm (Typ.)
Input/Output return-loss of -13dB/-13dB
Applications
Microwave Radio systems
Satellite VSAT, Up/Down Link
LMDS & Pt-Pt mmW Long Haul
Broadband Wireless Access
(including 802.16 and 802.20 WiMax)
WLL and MMDS loops
Commercial grade military
Note:
1. This MMIC uses depletion mode pHEMT devices. Negative supply is
used for DC gate biasing.
RoHS - Exemption
2
Absolute Maximum Ratings [1,2,3,4, 5]
Symbol Parameters Unit Max Notes
VdPositive Supply Voltage[2] V62/
VgGate Supply Voltage V -3 to 0.5
PDPower Dissipation[2,3]W 5.5 2/3/
Pin CW Input Power[2] dBm 23 2/
Tch Operating Channel Temp.[4,5] C+150 4/5/
Tstg Storage Case Temp. C-65 to +155
Tmax Maximum Assembly Temp (30 sec max) C+320
Note:
1. Operation in excess of any one of these conditions may result in permanent damage to this device.
2. Combinations of supply voltage, drain current, input power, and output power shall not exceed PD.
3. When operate at this condition with a base plate temperature of 85C, the median time to failure (MTTF) is signi cantly reduced.
4. These ratings apply to each individual FET
5. The operating channel temperature will directly a ect the device MTTF. For maximum life, it is recommended that junction temperatures be
maintained at the lowest possible levels
DC Speci cations/ Physical Properties [1]
Symbol Parameters and Test Conditions Units
IdDrain Supply Current(Vd=5 V, Vg set for Id Typical) mA 650
VgGate Supply Operating Voltage(Id(Q) = 650 (mA)) V -1.0
Rjc Thermal Resistance[1](Channel-to-Backside) C/W 17.8
Tch Channel Temperature C132
Note:
1. Assume AuSn soldering to an evaluation RF board at 85 °C base plate temperatures. Worst case is at saturated output power when DC power
consumption rises to 5.5W with 1.57W RF power delivered to load. Power dissipation is 3.93W and the temperature rise in the channel is 57 °C. In
this condition, the base plate temperature must be remained below 93 °C to maintain maximum operating channel temperature below 150°C.
RF Speci cations [1,2, 3] (TA= 25C, Vd=5, Id(Q)=650 mA, Zo=50
Symbol Parameters and Test Conditions Units Minimum Typical Maximum
Freq Operational Frequency GHz 18 28
Gain Small-signal Gain [3, 4] dB 22 24
P-1dB Output Power at 1dB[3] Gain Compression dBm 27.5 29
OIP3 Output Third Order Intercept Point dBm 38
RLin Input Return Loss dB 13
RLout Output Return Loss dB 13
Isolation Reverse Isolation dB 50
Notes:
1. Small/Large -signal data measured in on-wafer environment at TA = 25C.
2. This die part performance is veri ed by a functional test correlated to actual performance at one or more frequencies
3. Pre-assembly into package performance veri ed 100% on-wafer published speci cations at Frequencies=18, 23, and 28GHz
4. The Gain and P1dB tested at 23GHz guaranteed with measurement accuracy ± 1.5 dB for gain and ±1.6dB for P1dB.
3
0
5
10
15
20
25
30
15 20 25 30 35
Frequency [GHz]
S21[dB]
-60
-40
S12 [dB]
S21[dB]
S12[dB]
-30
-25
-20
-15
-10
-5
0
15 20 25 30 35
Frequency [GHz]
Return Loss [dB]
S11[dB]
S22[dB]
10
15
20
25
30
35
16 18 20 22 24 26 28 30
Frequency [GHz]
P-1 [dBm], PAE [%]
P-1
PAE
0
5
10
15
16 18 20 22 24 26 28 30
Frequency [GHz]
Noise Figure [dB]
30
35
40
45
50
16 18 20 22 24 26 28
Freq [GHz]
OIP3 [dBm]
0
5
10
15
20
25
30
35
-20 -15 -10 -5 0 5 10 15
Pin [dBm]
Pout [dBm], PAE [%]
-200
0
200
400
600
800
1000
1200
Id [mA]
Pout
PAE
Id
Typical Performances (Data obtained from on-wafer environment. TA = 25C, Vd =5 V, Id(q) =650 mA, Zin = Zout =50 )
Figure 1. AMMC-6425 Typical Gain and Reverse Isolation Figure 2. AMMC-6425 Typical Return Loss (Input and Output)
Figure 3. AMMC-6425 Typical Output Power (P-1) and PAE at 1dB gain
compression
Figure 4. AMMC-6425 Typical Noise Figure
Figure 5. AMMC-6425 Typical IP3 Figure 6. AMMC-6425 Typical Output Power, PAE, and Total Drain Current
versus Input Power at 25GHz
4
-25.000
-20.000
-15.000
-10.000
-5.000
0.000
10 25 30 35
S11[dB]
S11_20
S11_-40
S11_85
-25.000
-20.000
-15.000
-10.000
-5.000
0.000
10 15 25 30 35
S22[dB]
S22_20
S22_-40
S22_85
0
5
10
15
20
25
30
10 20 25 30
Frequency[GHz]
S21[dB]
S21_20
S21_-40
S21_85
20
22
24
26
28
30
32
34
16 18 20 22 24 26 28 30
Frequency [GHz]
P-1 [dBm]
P-1_85deg
P-1_20deg
P-1_-40deg
3515
20
Frequency[GHz]
15 20
Frequency[GHz]
Typical over temperature dependencies (TA = 25C, Vd =5 V, Id(q) = 650 mA, Zin = Zout = 50 )
Figure 7. AMMC-6425 Typical S11 over temperature Figure 8. AMMC-6425 Typical S22 over temperature
Figure 9. AMMC-6425 Typical Gain over temperature Figure 10. AMMC-6425 Typical P-1 over temperature
5
Typical Scattering Parameters [1] (TA = 25C, Vd =5 V, ID = 650 mA, Zin = Zout = 50 )
Freq S11 S21 S12 S22
[GHz] dB Mag Phase dB Mag Phase dB Mag Phase dB Mag Phase
1 -0.18 0.98 -31.00 -50.91 0.00 172.26 -80.52 9.42E-05 161.39 -0.14 0.98 -27.36
2 -0.50 0.94 -60.57 -46.71 0.00 -119.81 -74.86 1.81E-04 -20.97 -0.42 0.95 -53.39
3 -0.89 0.90 -88.63 -45.77 0.01 133.49 -74.75 1.83E-04 -151.39 -0.66 0.93 -78.93
4 -1.35 0.86 -115.64 -43.43 0.01 80.97 -72.03 2.50E-04 101.75 -1.10 0.88 -103.74
5 -1.86 0.81 -140.94 -47.59 0.00 -36.53 -74.43 1.90E-04 -61.03 -1.44 0.85 -125.74
6 -2.44 0.76 -165.06 -52.20 0.00 -83.32 -78.78 1.15E-04 -162.35 -1.81 0.81 -149.44
7 -3.06 0.70 171.33 -62.73 0.00 -112.45 -70.47 3.00E-04 -177.29 -2.29 0.77 -172.28
8 -3.82 0.64 148.56 -61.78 0.00 -159.19 -70.96 2.83E-04 142.99 -2.84 0.72 165.52
9 -4.71 0.58 125.47 -64.62 0.00 102.00 -66.03 5.00E-04 137.46 -3.43 0.67 142.63
10 -5.84 0.51 102.90 -54.25 0.00 12.77 -63.10 7.00E-04 110.85 -4.14 0.62 118.72
11 -7.34 0.43 79.40 -42.17 0.01 -16.36 -63.11 6.99E-04 83.54 -5.08 0.56 91.98
12 -9.18 0.35 57.15 -27.52 0.04 -49.47 -64.29 6.10E-04 51.91 -6.40 0.48 62.37
13 -11.85 0.26 36.72 -14.09 0.20 -100.12 -66.04 4.99E-04 51.77 -8.57 0.37 26.29
14 -14.61 0.19 18.79 -1.42 0.85 -162.63 -66.27 4.86E-04 61.73 -11.83 0.26 -19.97
15 -17.29 0.14 11.16 11.13 3.60 114.96 -62.22 7.74E-04 80.54 -17.73 0.13 -96.22
16 -18.59 0.12 -3.90 19.39 9.32 0.47 -57.32 1.36E-03 43.30 -20.07 0.10 114.52
17 -18.18 0.12 -21.68 22.36 13.12 -97.26 -56.62 1.48E-03 5.66 -23.13 0.07 2.66
18 -19.99 0.10 -62.71 25.12 18.04 174.40 -58.17 1.23E-03 -22.91 -35.25 0.02 -81.56
19 -25.56 0.05 -111.19 26.50 21.14 83.81 -59.81 1.02E-03 -58.29 -32.08 0.02 -4.28
20 -28.70 0.04 -72.75 26.07 20.11 2.80 -65.66 5.21E-04 -58.26 -24.22 0.06 -64.07
21 -24.85 0.06 -112.17 25.60 19.06 -69.33 -62.29 7.68E-04 -51.21 -20.28 0.10 -120.87
22 -21.69 0.08 -133.66 25.28 18.36 -138.46 -61.95 7.99E-04 -78.62 -18.47 0.12 -148.19
23 -22.36 0.08 -172.96 24.93 17.63 153.57 -63.22 6.90E-04 -96.75 -17.01 0.14 173.91
24 -21.48 0.08 163.66 24.49 16.76 87.35 -65.75 5.16E-04 -142.75 -17.42 0.13 152.07
25 -23.59 0.07 146.36 24.34 16.49 21.96 -63.00 7.08E-04 -167.89 -18.48 0.12 122.77
26 -24.27 0.06 126.41 24.61 17.01 -46.70 -61.05 8.87E-04 107.89 -21.50 0.08 104.97
27 -29.23 0.03 165.25 24.62 17.03 -125.11 -60.13 9.85E-04 45.28 -27.76 0.04 -178.20
28 -26.07 0.05 150.75 22.38 13.15 150.42 -63.02 7.07E-04 -23.51 -19.90 0.10 147.42
29 -22.54 0.07 140.36 18.42 8.33 75.77 -65.92 5.06E-04 -89.51 -18.54 0.12 127.22
30 -23.20 0.07 133.08 14.45 5.28 9.65 -74.10 1.97E-04 119.51 -20.64 0.09 111.91
31 -23.96 0.06 97.50 10.68 3.42 -53.32 -73.92 2.01E-04 84.14 -19.81 0.10 105.34
32 -28.29 0.04 142.55 6.86 2.20 -115.03 -79.54 1.05E-04 72.59 -23.10 0.07 108.32
33 -25.07 0.06 123.16 2.75 1.37 -174.97 -66.14 4.93E-04 96.41 -20.62 0.09 90.40
34 -22.55 0.07 102.78 -1.52 0.84 127.51 -65.92 5.06E-04 80.40 -20.14 0.10 97.27
35 -42.73 0.01 167.89 -5.81 0.51 72.35 -74.96 1.79E-04 -176.00 -21.03 0.09 84.93
36 -23.68 0.07 -128.70 -10.14 0.31 18.88 -70.18 3.10E-04 98.04 -19.75 0.10 80.65
37 -14.11 0.20 179.93 -14.68 0.18 -33.49 -66.20 4.90E-04 177.04 -20.77 0.09 92.20
38 -11.27 0.27 157.39 -19.33 0.11 -83.71 -60.89 9.03E-04 118.94 -22.27 0.08 60.59
39 -8.96 0.36 117.64 -24.11 0.06 -139.37 -57.08 1.40E-03 94.41 -22.14 0.08 69.96
40 -8.29 0.39 91.80 -29.14 0.03 163.76 -55.47 1.69E-03 64.07 -27.90 0.04 56.87
41 -10.18 0.31 51.89 -33.41 0.02 105.70 -54.94 1.79E-03 33.20 -24.29 0.06 51.59
42 -13.20 0.22 38.89 -40.03 0.01 47.72 -54.39 1.91E-03 -9.11 -25.85 0.05 131.67
43 -19.84 0.10 36.35 -44.99 0.01 -12.88 -53.97 2.00E-03 -23.02 -32.40 0.02 120.99
44 -15.75 0.16 50.47 -48.14 0.00 -47.19 -55.93 1.60E-03 -51.98 -18.76 0.12 127.25
45 -17.20 0.14 60.92 -48.85 0.00 -78.91 -61.91 8.03E-04 -77.54 -20.68 0.09 126.54
Note:
1. Data obtained from on-wafer measurement.
6
Application and Usage
Biasing and Operation
The recommended quiescent DC bias condition for opti-
mum e ciency, performance, and reliability is Vd=5 volts
with Vg set for Id=650mA. Minor improvements in per-
formance are possible depending on the application. The
drain bias voltage range is 3 to 5V. A single DC gate sup-
ply connected to Vg will bias all gain stages. Muting can
be accomplished by setting Vg and /or Vg to the pinch-o
voltage Vp.
An optional output power detector network is also pro-
vided. The di erential voltage between the Det-Ref and
Det-Out pads can be correlated with the RF power emerg-
ing from the RF output port. The detected voltage is given
by :
V = (Vref - Vdet) - Vofs
where Vref is the voltage at the DET_R port, Vdet is a voltage
at the DET_O port, and Vofs is the zero-input-power o set
voltage. There are three methods to calculate : Vofs
1) Vofs
can be measured before each detector measurement
(by removing or switching o the power source and
measuring Vref - Vdet). This method gives an error due to
temperature drift of less than 0.01dB/50C.
2) Vofs can be measured at a single reference temperature.
The drift error will be less than 0.25dB.
3) Vofs can either be characterized over temprature and
stored in a lookup table, or it can be measured at two
temperatures and a linear t used to calculate Vofs at
any temperature. This method gives an error close to
the method #1.
The RF ports are AC coupled at the RF input to the rst
stage and the RF output of the nal stage. No ground
wired are needed since ground connections are made
with plated through-holes to the backside of the device.
Assembly Techniques
The chip should be attached directly to the ground plane
using either a ux less AuSn solder perform or electrically
conductive epoxy[1]. For conductive epoxy, the amount
should be just enough to provide a thin llet around the
bottom perimeter of the die. The ground plane should
be free of any residue that may jeopardize electrical or
mechanical attachment. Caution should be taken to not
exceed the Absolute Maximum Rating for assembly tem-
perature and time.
Thermo-sonic wedge bonding is the preferred method
for wire attachment to the bond pads. The RF connections
should be kept as short as possible to minimize inductance.
Gold mesh[2] or double-bonding with 0.7mil gold wire is
recommended. Mesh can be attached using a 2mil round
tracking tool and a too force of approximately 22grams
with an ultrasonic power of roughly 55dB for a duration of
76±8mS. A guided wedge at an ultrasonic power level of
64dB can be used for the 0.7mil wire. The recommended
wire bonding stage temperature is 150±2˚C.
The chip is 100m thick and should be handled with care.
This MMIC has exposed air bridges on the top surface.
Handle at the edges or with a custom collet (do not pick
up die with vacuum on die center).
This MMIC is also static sensitive and ESD handling pre-
cautions should be taken.
For more detailed information, see Avago Application
Note 54 “GaAs MMIC ESD, Die Attach and Bonding Guide
lines.”
Notes:
1. Ablebond 84-1 LM1 silver epoxy is recommended.
2. Buckbee-Mears Corporation, St. Paul, MN, 800-262-3824
7
Figure 11. AMMC-6425 Schematic
Figure 12. AMMC6425 Die dimension
8
Figure 13. AMMC-6425 Assembly examples
Figure 14. Typical Detector Voltage and Output Power, Freq=25GHz
0.00
0.10
0.20
0.30
0.40
0.50
0 5 10 15 20 25 30
RF Output Power [dBm]
(DET_R)-(DET_O) [V]
0.001
0.01
0.1
1
(DET_R)-(DET_O)
[V]]
Notes
1. 1uF capacitors not shown on gate and drain
lines are required.
2. Vd connection is required on both sides.
3. Vg can be biased from either side.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies Limited. All rights reserved.
AV02-0884EN - July 25, 2012
Ordering Information:
AMMC-6425-W10 = 10 devices per tray
AMMC-6425-W50 = 50 devices per tray
