LM4121 www.ti.com SNVS073C - APRIL 2000 - REVISED APRIL 2013 LM4121 Precision Micropower Low Dropout Voltage Reference Check for Samples: LM4121 FEATURES (LM4121-1.2) 1 * * * * * * * * * * 2 Small SOT23-5 Package Low Voltage Operation High Output Voltage Accuracy: 0.2% Source and Sink Current Output: 5 mA Supply current: 160 A Typ. Low Temperature Coefficient: 50 ppm/C Enable Pin Output Voltages: 1.25V and Adjustable Industrial Temperature Range: -40C to +85C (For Extended Temperature Range, -40C to 125C, Contact Texas Instruments) APPLICATIONS * * * * * * * * * * Portable, Battery Powered Equipment Instrumentation and Process Control Automotive & Industrial Test Equipment Data Acquisition Systems Precision Regulators Battery Chargers Base Stations Communications Medical Equipment DESCRIPTION The LM4121 is a precision bandgap voltage reference available in a fixed 1.25V and adjustable version with up to 5 mA current source and sink capability. This series reference operates with input voltages as low as 1.8V and up to 12V consuming 160 A (Typ.) supply current. In power down mode, device current drops to less than 2 A. The LM4121 comes in two grades A and Standard. The best grade devices (A) have an initial accuracy of 0.2%, while the standard have an initial accuracy of 0.5%, both with a tempco of 50ppm/C ensured from -40C to +125C. The very low operating voltage, low supply current and power-down capability of the LM4121 makes this product an ideal choice for battery powered and portable applications. The device performance is ensured over the industrial temperature range (-40C to +85C), while certain specs are ensured over the extended temperature range (-40C to +125C). Please contact Texas Instruments for full specifications over the extended temperature range. The LM4121 is available in a standard 5-pin SOT-23 package. Block Diagram * Resistors are removed on the LM4121-ADJ LM4121-ADJ only Figure 1. LM4121-1.2 Block Diagram 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2000-2013, Texas Instruments Incorporated LM4121 SNVS073C - APRIL 2000 - REVISED APRIL 2013 www.ti.com Connection Diagrams Figure 2. SOT23-5 Surface Mount Package Figure 3. SOT23-5 Surface Mount Package Table 1. SOT-23 Package Marking Information (1) Field Information First Field: R = Reference Second and third Field: 19 = 1.250V Voltage Option 20 = Adjustable Fourth Field: A-B = Initial Reference Voltage Tolerance A = 0.2% B = 0.5% (1) Only four fields of marking are possible on the SOT-23's small surface. This table gives the meaning of the four fields. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) -0.3V to 14V Maximum Voltage on input or enable pins Output Short-Circuit Duration Power Dissipation (TA = 25C) Indefinite (3) : DBV0005B package - JA 280C/W Power Dissipation 350 mW ESD Susceptibility (4) Human Body Model Machine Model 2 kV 200V Lead Temperature: (1) (2) (3) (4) 2 Soldering, (10 sec.) +260C Vapor Phase (60 sec.) +215C Infrared (15 sec.) +220C "Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see Electrical Characteristics - LM4121-1.250V and Electrical Characteristics - LM4121-ADJ tables. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Without PCB copper enhancements. The maximum power dissipation must be de-rated at elevated temperatures and is limited by TJMAX (maximum junction temperature), J-A (junction to ambient thermal resistance) and TA (ambient temperature). The maximum power dissipation at any temperature is: PDissMAX = (TJMAX - TA)/J-A up to the value listed in the Absolute Maximum Ratings. The human body model is a 100 pF capacitor discharged through a 1.5 k resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 LM4121 www.ti.com SNVS073C - APRIL 2000 - REVISED APRIL 2013 Operating Range (1) -65C to +150C Storage Temperature Range Ambient Temperature Range -40C to +85C Junction Temperature Range -40C to +125C (1) "Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see Electrical Characteristics - LM4121-1.250V and Electrical Characteristics - LM4121-ADJ tables. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Electrical Characteristics LM4121-1.250V Unless otherwise specified VIN = 3.3V, ILOAD = 0, COUT = 0.01F, TA = Tj = 25C. Limits with standard typeface are for Tj = 25C, and limits in boldface type apply over the -40C TA +85C temperature range. Symbol VOUT Parameter Conditions Min (1) Output Voltage Initial Accuracy LM4121A-1.250 Typ (2) 1.250 LM4121-1.250 Temperature Coefficient -40C TA +125C VOUT/VIN Line Regulation 1.8V VIN 12V Load Regulation 0.0007 0.009 0.012 %/V 0 mA ILOAD 1 mA 0.03 0.08 0.17 1 mA ILOAD 5 mA 0.01 0.04 0.1 -1 mA ILOAD 0 mA 0.04 0.12 -5 mA ILOAD -1 mA 0.01 1.5 VN Output Noise Voltage 0.1 Hz to 10 Hz 20 IS Supply Current ISS Power-down Supply Current 10 Hz to 10 kHz VIN = 12V Enable = 0.4V Enable = 0.2V Logic High Input Voltage 1.6 VL Logic Low Input Voltage 0.4 IH Logic High Input Current 7 IL Logic Low Input Current 0.1 (2) (3) VPP VRMS 250 275 A 1 2 A 1.5 V V 6 VIN = 12V, VOUT = 0 -40C TA 125C 15 A A 15 30 mA 17 6 (1) V 0.2 VIN = 3.3V, VOUT = 0 (3) %/mA 1.8 30 160 VH Thermal Hysteresis % ppm/c ILOAD = 5mA Hyst 0.2 50 Minimum Operating Voltage Short Circuit Current Units 14 Min-VIN ISC (1) 0.5 TCVOUT/C VOUT/ILOAD Max 30 0.5 mV/V Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate TI's Averaging Outgoing Quality Level (AOQL). Typical numbers are at 25C and represent the most likely parametric norm. Thermal hysteresis is defined as the change in +25C output voltage before and after exposing the device to temperature extremes. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 3 LM4121 SNVS073C - APRIL 2000 - REVISED APRIL 2013 www.ti.com Electrical Characteristics LM4121-1.250V (continued) Unless otherwise specified VIN = 3.3V, ILOAD = 0, COUT = 0.01F, TA = Tj = 25C. Limits with standard typeface are for Tj = 25C, and limits in boldface type apply over the -40C TA +85C temperature range. Symbol VOUT (4) Parameter Long Term Stability (4) Conditions Min (1) 1000 hrs. @ 25C Typ (2) Max (1) 100 Units ppm Long term stability is change in VREF at 25C measured continuously during 1000 hrs. Electrical Characteristics LM4121-ADJ Unless otherwise specified VIN = 3.3V, VOUT = VREF, ILOAD = 0, COUT = 0.01F, TA = Tj = 25C. Limits with standard typeface are for Tj = 25C, and limits in boldface type apply over the -40C TA +85C temperature range. Symbol VOUT = VREF Parameter Conditions Min (1) Output Voltage Initial Accuracy LM4121A-ADJ Typ (2) 1.216 LM4121-ADJ Temperature Coefficient -40C TA +125C VREF/VIN Line Regulation 1.8V VIN 12V Load Regulation ppm/c 0.0007 0.009 0.012 %/V 0 mA ILOAD 1 mA 0.03 0.08 0.17 1 mA ILOAD 5 mA 0.01 0.04 0.1 -1 mA ILOAD 0 mA 0.04 0.12 0.01 Min-VIN ILOAD = 5 mA 1.5 VN Output Noise Voltage 0.1 Hz to 10 Hz 20 IS Supply Current ISS Power-down Supply Current 10 Hz to 10 kHz Reference Pin Bias Current VH Logic High Input Voltage VL % 50 -5 mA ILOAD -1 mA IBIAS 0.2 Units 14 Minimum Operating Voltage (3) (1) 0.5 TCVREF/C VOUT/ILOAD Max VIN = 12V Enable = 0.4V Enable = 0.2V V VPP 30 160 (4) 1.8 %/mA VRMS 250 275 A 1 2 A 15 40 nA 1.6 1.5 V Logic Low Input Voltage 0.4 V IH Logic High Input Current 7 IL Logic Low Input Current 0.1 0.2 VOUT = 0 ISC Short Circuit Current (2) (3) (4) 4 A A 15 6 VIN = 12V, VOUT = 0 30 17 6 (1) 15 mA 30 Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate TI's Averaging Outgoing Quality Level (AOQL). Typical numbers are at 25C and represent the most likely parametric norm. Output noise for 1.25V option. Noise is proportional to VOUT. Bias Current flows out of the Adjust pin. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 LM4121 www.ti.com SNVS073C - APRIL 2000 - REVISED APRIL 2013 Electrical Characteristics LM4121-ADJ (continued) Unless otherwise specified VIN = 3.3V, VOUT = VREF, ILOAD = 0, COUT = 0.01F, TA = Tj = 25C. Limits with standard typeface are for Tj = 25C, and limits in boldface type apply over the -40C TA +85C temperature range. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units Hyst Thermal Hysteresis -40C TA 125C 0.5 mV/V VOUT Long Term Stability 1000 hrs. @ 25C 100 ppm (5) (6) (5) (6) Thermal hysteresis is defined as the change in +25C output voltage before and after exposing the device to temperature extremes. Long term stability is change in VREF at 25C measured continuously during 1000 hrs. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 5 LM4121 SNVS073C - APRIL 2000 - REVISED APRIL 2013 www.ti.com LM4121- (All Options) Typical Operating Characteristics Unless otherwise specified, VIN = 3.3V, VOUT = 1.25V, ILOAD = 0, COUT = 0.022F, TA = 25C and VEN = VIN. 6 Minimum Input Voltage vs Temperature GND Pin Current vs VIN Figure 4. Figure 5. GND Pin Current at No Load vs Temperature GND Pin Current vs Load Figure 6. Figure 7. Short Circuit vs Temperature Output Impedance vs Frequency Figure 8. Figure 9. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 LM4121 www.ti.com SNVS073C - APRIL 2000 - REVISED APRIL 2013 LM4121- (All Options) Typical Operating Characteristics (continued) Unless otherwise specified, VIN = 3.3V, VOUT = 1.25V, ILOAD = 0, COUT = 0.022F, TA = 25C and VEN = VIN. PSRR vs Frequency Enable Pin Current Figure 10. Figure 11. Start-Up Response Enable Response Figure 12. Figure 13. Load Step Response Load Step Response Figure 14. Figure 15. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 7 LM4121 SNVS073C - APRIL 2000 - REVISED APRIL 2013 www.ti.com LM4121- (All Options) Typical Operating Characteristics (continued) Unless otherwise specified, VIN = 3.3V, VOUT = 1.25V, ILOAD = 0, COUT = 0.022F, TA = 25C and VEN = VIN. 8 Line Step Response Noise Spectural Density (0.1Hz-10Hz) Figure 16. Figure 17. Noise Spectural Density (10Hz-10kHz) Thermal Hysteresis Figure 18. Figure 19. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 LM4121 www.ti.com SNVS073C - APRIL 2000 - REVISED APRIL 2013 LM4121-1.25 Typical Operating Characteristics Unless otherwise specified, VIN = 3.3V, VOUT = 1.25V, ILOAD = 0, COUT = 0.022F, TA = 25C and VEN = VIN. Typical Temperature Drift Long Term Drift Figure 20. Figure 21. Line Regulation Load Regulation Figure 22. Figure 23. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 9 LM4121 SNVS073C - APRIL 2000 - REVISED APRIL 2013 www.ti.com LM4121-ADJ Typical Operating Characteristics Unless otherwise specified, VIN = 3.3V, VOUT = 1.2V, ILOAD = 0, COUT = 0.022F, TA = 25C and VEN = VIN. 10 Typical Temperature Drift Long Term Drift Figure 24. Figure 25. Dropout Voltage vs Output Error Dropout Voltage vs Load Current Figure 26. Figure 27. Line Regulation Load Regulation Figure 28. Figure 29. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 LM4121 www.ti.com SNVS073C - APRIL 2000 - REVISED APRIL 2013 LM4121-ADJ Typical Operating Characteristics (continued) Unless otherwise specified, VIN = 3.3V, VOUT = 1.2V, ILOAD = 0, COUT = 0.022F, TA = 25C and VEN = VIN. Adjust Pin Bias Current Change In Reference Voltage vs Output Voltage Figure 30. Figure 31. Bode Plot Bode Plot Figure 32. Figure 33. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 11 LM4121 SNVS073C - APRIL 2000 - REVISED APRIL 2013 www.ti.com PIN DESCRIPTIONS Output (Pin 5) Input (Pin 4) Reference Output. Positive Supply. Ground (Pin 2) Negative Supply or Ground Connection Enable (Pin 3) Pulled to input for normal operation. Forcing this pin to ground will turn-off the output. REF (Pin 1) REF Pin (1.25V option only). This pin should be left unconnected for 1.25V option. Adj (Pin 1) VOUT Adj Pin (Adjustable option only). See Application Hints section. APPLICATION HINTS The standard application circuit for the LM4121 is shown in Figure 34. The output voltage is set with the two feedback resistors, according to the following formula: VOUT = [Vref(1+ R1/R2] - Ibias* R1 (1) Values for R1 and R2 should be chosen to be less than 1 M. Ibias typically flows out of the adjust pin. Values for Vref and Ibias are found in the Electrical Characteristics - LM4121-1.250V and Electrical Characteristics - LM4121ADJ tables. For best accuracy, be sure to take into account the variation of VREF with input voltage, load and output voltage. The LM4121 is designed to be stable with ceramic output capacitors in the range of 0.022F to 0.047F. Note that 0.022F is the minimum required output capacitor. These capacitors typically have an ESR of about 0.1 to 0.5. Smaller ESR can be tolerated, however larger ESR can not. The output capacitor can be increased to improve load transient response, up to about 1F. However, values above 0.047F must be tantalum. With tantalum capacitors, in the 1F range, a small capacitor between the output and the reference (Adj) pin is required. This capacitor will typically be in the 50pF range. Care must be taken when using output capacitors of 1F or larger. These application must be thoroughly tested over temperature, line and load. Also, when the LM4121 is used as a controller, with external active components, each application must be carefully tested to ensure a stable design. The adjust pin is sensitive to noise and capacitive loading. The trace to this pin must be as short as possible and the feedback resistors should be close to this pin. Also, a single point ground to the LM4121 will help ensure good accuracy at high load currents. An input capacitor is typically not required. However, a 0.1F ceramic can be used to help prevent line transients from entering the LM4121. Larger input capacitors should be tantalum or aluminium. The enable pin is an analog input with very little hysteresis. About 6A into this pin is required to turn the part on, and it must be taken close to GND to turn the part off (see Electrical Characteristics - LM4121-1.250V and Electrical Characteristics - LM4121-ADJ tables for thresholds). There is a minimum slew rate on this pin of about 0.003V/S to prevent glitches on the output. All of these conditions can easily be met with ordinary CMOS or TTL logic. If the shutdown feature is not required, then this pin can safely be connected directly to the input supply. Floating this pin is not recommended. Figure 34. Standard Application Circuit 12 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 LM4121 www.ti.com SNVS073C - APRIL 2000 - REVISED APRIL 2013 PRINTED CIRCUIT BOARD LAYOUT CONSIDERATION The mechanical stress due to PC board mounting can cause the output voltage to shift from its initial value. References in SOT packages are generally less prone to assembly stress than devices in Small Outline (SOIC) package. To reduce the stress-related output voltage shifts, mount the reference on the low flex areas of the PC board such as near to the edge or the corner of the PC board. Typical Application Circuits VIN 2.2PF + VIN EN ADJ VOUT 2N3904 LM4121-ADJ R1 GND R2 0.022PF VO VO = 1.216 (RR 1 2 + 1 ) Figure 35. Voltage Reference with Negative Output Figure 36. 100mA Quasi-LDO Regulator Figure 37. Boosted Output Current with Negative Voltage Reference Figure 38. Voltage Reference with Complimentary Output (+) VIN EN VOUT ADJ LM4121-ADJ GND 0.022PF I R I= 1.216 (-) R Figure 39. Two Terminal Constant Current Source Figure 40. Precision Voltage Reference with Force and Sense Output Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 13 LM4121 SNVS073C - APRIL 2000 - REVISED APRIL 2013 www.ti.com VCC = 2.5-5V 2.2PF + VIN EN LM4121-ADJ VOUT ADJ IN OUT GND 3.4k 0.022PF HYST Figure 41. Programmable Current Source # 50mV 51: Figure 42. Precision Comparator with Hysteresis VBATT 12.1k VIN EN VOUT ADJ LM4121-ADJ GND + 0.022PF 10k 2.2PF 3.3: LED = ON @ LED = OFF @ Figure 43. Power Supply Splitter # 2.7V # 2.8V Figure 44. Li + Low Battery Detector 100k EN ADJ + +6V VIN VOUT LM4121-ADJ + GND 2.2PF 0.022PF 47PF TON TOFF # # ( 47PF 6 - 1.3 100k ) 47PF 1.3 ( 100k ) . (0.15) #4 7 1: . (0.15) Figure 45. Flasher Circuit 14 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 LM4121 www.ti.com SNVS073C - APRIL 2000 - REVISED APRIL 2013 REVISION HISTORY Changes from Revision B (April 2013) to Revision C * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 14 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM4121 15 PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM4121AIM5-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 R19A LM4121AIM5-ADJ/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 R20A LM4121AIM5X-ADJ/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 R20A LM4121IM5-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 R19B LM4121IM5-ADJ/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 R20B LM4121IM5X-ADJ/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 R20B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ SOT-23 DBV 5 1000 178.0 8.4 LM4121AIM5-ADJ/NOPB SOT-23 LM4121AIM5-1.2/NOPB Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM4121AIM5X-ADJ/NOP B SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM4121IM5-1.2/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM4121IM5-ADJ/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM4121IM5X-ADJ/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM4121AIM5-1.2/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM4121AIM5-ADJ/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM4121AIM5X-ADJ/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM4121IM5-1.2/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM4121IM5-ADJ/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM4121IM5X-ADJ/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 0.90 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. 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