PE4237-52 - Peregrine Semiconductor Corp.

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RF1

CTRL

RFC

CMOS

Control

Driver

ESD ESD

ESD

The PE 42 37 RF Swit c h is des ign ed to c ov er a bro ad r an ge of

applications from near DC to 4000 MHz. This reflective switch

integrates on-board CMOS contro l logic driven by a single-pin,

low voltage CMOS or TTL control input. Using a nominal +3-

volt power supply, a 1 dB compression point of +32 dBm can

be achieved. The PE4237 also exhibits outstanding isolation

of better than 43 dB at 1000 MHz and is

offe red in a small 3x3 mm DFN package.

The PE4237 is manufactured on Peregrine’s UltraCMOS™

pro c ess, a patented variation of silicon-on-in sulator (SO I)

technology on a sapphire substrate, offering the performance

of GaAs with the econom y an d i nte gr ation of conventi on al

CMOS.

Pro duct Specificat ion

SPDT UltraCMOS™ RF Switch

DC - 4000 MHz

Product Description

Figure 1. Functional Diagram

PE4237

Features

Single 3.0-volt power supply

Low insertion loss: 0.35 dB at

1000 MHz, 0.45 dB at 2000 MHz

High isolation of 43 dB at 1000 MHz,

35 dB at 2000 MHz

Typical 1 dB compression point of

+32 dBm

Single-pin CMOS or TTL logic control

Available in a 6-lead DFN package

Notes: 1. Device linearity will begin to degrade below 10 MHz.

2. Th e DC transien t at the output of any port of the switch when the control voltage is switched from Lo w to

High or High to Low in a 50 Ω test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.

Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 Ω)

Fig ure 2. Package Typ e

6-lead DFN

Parameter Conditions Minimum Typical Maximum Units

Operation Frequency1 DC 4000 MHz

Inser t io n Los s 1000 MH z

2000 MH z 0.35

0.45 0.50

0.60 dB

dB

Isolation – RFC to RF1/RF2 1000 MH z

2000 MH z 41

33 43

35 dB

dB

Isolati on – R F1 t o RF2 1000 MH z

2000 MH z 33.5

26.5 35

28 dB

dB

Return Loss 1000 MH z

2000 MH z 19

10.5 24

14 dB

dB

‘ON’ Switching Time 50% CTRL to 0.1 dB final value, 2 GHz 200 ns

‘OFF’ Switching Time 50% CTRL to 25 dB isolation, 2 GHz 90 ns

Video Feedth rough2 15 mVpp

Inp ut 1 dB C o mpress io n 2000 MH z 30 32 dB m

Inp ut IP 3 20 00 MHz , 17 dBm 50 dBm

Product Specification

PE4237

Page 2 of 8

Table 2 . Pin Descriptions

Table 4. Absolute Maximum Ratings

Electrostatic Discharge (ESD) Precautions

When hand ling this UltraCMOS ™ devi ce, obs erve

the same precautions that you would use with

other ESD-sensitive devices. Although this device

contains circuitry to protect it from damage due to

ESD, precautions should be taken to avoid

exceeding the rating specified in Table 4.

Latc h-Up Avoidance

Unlike conventional CMO S device s, UltraCMOS™

devices are immune to latch-up.

Table 3. Operating Ranges

Notes: 1. All RF pins must be DC blocked with an external series

capacitor or held at 0 VDC.

Figure 3. Pin Configur ation

Table 5. Control Logic Truth Table

Exceeding absolute maximum ratings may cause

permanent damage. Operation should be

restricted to the limits in the Operating Rang es

tabl e. Oper ation betw e en op er a ti ng ran ge

maxi mum and abs olute maximum fo r extended

periods may redu ce reliability.

Exposed Solder

Pad - Shorted

to Pin 2

(bottom side)

RF2

GND

RF1

RFC

CTRL

V

DD

4

5

6

3

2

1

No. Pin

Name Description

1 RF2 RF2 port.1

2 GND

Ground Connection. Traces should be

physically short and connected to the

ground plane. This pin is connected to

the expo sed solde r pad that al so must

be sold ered t o th e gr o un d pl an e f or bes t

performance.

3 RF1 RF1 port.1

4 VDD Nominal 3 V supply connection.

5 CTRL

CMOS or TTL logic level:

High = RFC to RF 1 signal path

Low = RFC to RF2 signal path

6 RFC Common RF port for switch.1

Symbol Parameter/Conditions Min Max Units

VDD Power supply voltage -0.3 4.0 V

VI Voltage on any input

except for the CTRL input -0.3 VDD+

0.3 V

VCTRL Voltage on CTRL input 5.0 V

TST Storage temperature range -65 150 °C

PIN Input po wer ( 5 0 Ω) 35 dBm

VESD ESD voltage (Human Body

Model) 250 V

Parameter Min Typ Max Units

VDD Power Supply Voltage 2.7 3.0 3.3 V

IDD Power Su pply Cur r ent

(VDD = 3V, VCNTL = 3V) 29 35 µA

Control Voltage High 0.7xVDD V

Control Voltage Low 0.3xVDD V

TOP Opera ti ng te m perat u re

range -40 85 °C

Control Voltage Signal Path

CTRL = CMOS or TTL High RFC to RF1

CTRL = CMOS or TTL Low RFC to RF2

Control Logic Input

The control logic input pin (CTRL) is typically

driven by a 3-volt CMOS logic level signal. For

flexibility to support systems that have 5-volt

control logic drivers, the control logic input has

been designed to handle a standard 5-volt TTL

control signal. This TTL control signal input must

not exceed 5-volts or damage to the switch could

result.

Moist u re Sen sit i vit y L evel

The Moisture Sensitivity Level rating for the

PE4237 in the 6-lead 3x3 DFN package is MSL1.

Product Specification

PE4237

Page 3 of 8

-100

-80

-60

-40

-20

0

0 500 1000 1500 2000 2500 3000 3500 4000

Isolation (dB)

Frequency (MHz)

-1.5

-1.25

-1

-0.75

-0.5

-0.25

0

0 500 1000 1500 2000 2500 3000 3500 4000

Insertion Loss (dB)

Frequency (MHz)

-40 C

85 C

25 C

0

10

20

30

40

0 500 1000 1500 2000 2500 3000

1dB Compression Point (dBm)

Frequency (MHz)

-40 8C

85 8C25 8C

-1.5

-1.25

-1

-0.75

-0.5

-0.25

0

0 500 1000 1500 2000 2500 3000 3500 4000

Insertion Loss (dB)

Frequency (MHz)

-40 C

85 C

25 C

Typical Performance Data @ -40 °C to 85 °C (Unless Otherwise Noted)

Figure 4. Insertion Loss - RFC to RF1 Figure 5. Input 1dB Compression Point

Figure 6. Insertion Loss - RFC to RF2 Figure 7. Isolation - RFC to RF1

T = 25 °C

Product Specification

PE4237

Page 4 of 8

-40

-30

-20

-10

0

0 500 1000 1500 2000 2500 3000 3500 4000

Return Loss (dB)

Frequency (MHz)

RF1

RF2

-40

-30

-20

-10

0

0 500 1000 1500 2000 2500 3000 3500 4000

Return Loss (dB )

Frequency (MHz)

-100

-80

-60

-40

-20

0

0 500 1000 1500 2000 2500 3000 3500 4000

Isolation (dB)

Frequency (MHz)

RF1

RF2

-100

-80

-60

-40

-20

0

0 500 1000 1500 2000 2500 3000 3500 4000

Isolation (dB)

Frequency (MHz)

Typical Performance Data @ 25 °C

Figure 8. Isolation – RFC to RF2 Figure 9. Isolation – RF1 to RF2, RF2 to RF1

Figure 10. Re tur n Loss – RFC to RF1, RF2 Figure 11. Return Loss – RF1, RF2

Product Specification

PE4237

Page 5 of 8

Evaluation Kit

The SPDT Switch Evaluation Kit board was

designed to ease customer evaluation of the

PE4237 SPDT switch. The RF common port is

connected through a 50 Ω transmission line to the

top left SMA connector, J1. Port 1 and Port 2 are

connected through 50 Ω transmission lines to the top

two SMA connectors on the right side of the board,

J2 and J3. A through transmission line connects

SMA connectors J4 and J5. This transmission line

can be used to estimate the loss of the PCB over the

environmental conditions being evaluated.

The board is constructed of a two metal layer FR4

material with a total thickness of 0.031”. The bottom

layer provides ground for the RF transmission lines.

The transmission lines were designed using a

coplanar waveguide with ground plane model using

a trace width of 0.0476”, trace gaps of 0.030”,

dielectric thickness of 0.028”, metal thickness of

0.0021” and εr of 4.4.

J6 provides a means for controlling DC and digital

inputs to the device. Starting from the lower left pin,

the second pin to the right (J6-3) is connected to the

device CNTL input. The fourth pin to the right (J6-7)

is connected to the device VDD input. A decoupling

capacitor (100 pF) is provided on both CTRL and

VDD trace s . It is the re s pons ibility of the customer to

determine proper supply decoupling for their design

application. Removing these components from the

evaluation board has not been shown to degrade RF

performance.

Figure 12. Evaluati on Board Layouts

Figure 13. Evaluati on Board Schematic

Peregr ine S pec ificat ion 102/0110

Peregr ine S pec ificat ion 101/0085

Product Specification

PE4237

Page 6 of 8

6-lead DFN

Figure 14. Package Drawing

NOTE: The exposed solder pad (on the bottom of the package) is electrically connected to pin 2 (fused.)

06L SLP

(3x3mm)

Figure 15. Marking Specifications

4237

YYWW

ZZZZZ

YYWW = Date Code (last two digits of year and work week)

ZZZZZ = Last five digits of Lot Number

Product Specification

PE4237

Page 7 of 8

Table 6. Dimensions

Dimensio n DFN 3x3 mm

Ao 3.23 ± 0.1

Bo 3.17 ± 0.1

Ko 1.37 ± 0.1

P 4 ± 0.1

W 8 +0.3, -0.1

T 0.254 ± 0.02

R7 Quantity 3000

R13 Quantity N.A.

Note: R7 = 7 inch Lock Reel, R13 = 13 inch Lock Ree l

6-lead DFN

Table 7. Ordering Information

Or der Code Part Marking Description Package Shipping Method

4237-51 4237 PE423 7G - 0 6DF N 3x 3m m-128 00F Gr ee n 6-le ad 3x 3 mm DFN Tap e or lo ose

4237-52 4237 PE4237G-06DFN 3x3mm-3000C Green 6-lead 3x3 mm DFN 3000 units / T&R

4237-00 PE4237-EK PE4237-06DFN 3x3mm-EK Evaluation Kit 1 / Box

Figure 16. Tape and Reel Specifications

Device Orientation in Tape

Top of

Device

Pin 1

Tape Feed Dire c t ion

Product Specification

PE4237

Page 8 of 8

Sales Offices

The Americas

Peregrine Semiconductor Corporation

9380 Carroll Park Drive

San Diego, CA 92121

Tel: 858-731-9400

Fax: 858-731-9499

Europe

Peregrine Semiconductor Europe

Bâtiment Maine

13-15 rue des Q uatre Vent s

F-92380 Garches , France

Tel: +33-1-4741-9173

Fax : +33-1 -4741 -917 3

For a list of representatives in your area, please r efer to our Web site at: ww w.psemi.com

Data Sheet Identification

Advance Information

The product is in a formative or design stage. The data

sheet contains design target specificat ions for product

development. Specif ications and features may change in

any manner without notice.

Preliminary Specification

The data sheet contains preliminar y data. Additional data

may be added at a later date. Peregrine reserves the right

to change specifications at any time without notice in order

to supply t he best possible product.

Product Specification

The data sheet contains final data . In the event Peregrine

dec ide s to cha nge the spe c ific a tions, Pereg rine will not ify

cust omers of the intended changes by issuing a DCN

(Document Change Notice).

The information in this dat a sheet is believed to be reliable.

Howeve r, Peregrine assum es no liability f or th e use of this

information. Use shall be entir ely at the user’s own risk.

No patent rights or licenses to any cir cuits descr ibed in t his

data sheet are implied or granted to any third party.

Peregrine’s pr oducts are not designed or intended f or use in

devices or systems intended for surgical implant, or in other

applications intended to support or sust ain life, or in any

application in which the failure of the Peregrine product could

create a situat ion in which personal injury or death m ight occur.

Peregr ine assumes no liability for damages, including

consequential or incident al dam ages, arising out of the use of

its products in such applications.

The Peregrine name, logo, and UTSi are registered trademarks

and UltraCMOS, HaRP, MultiSwitch and DuNE ar e trademarks

of Peregrine Semiconductor Corp.

High-Reliability and Defens e Products

Americas

San Diego, CA, USA

Phone: 858- 731-9475

Fax: 848-731-9499

Europe/Asia-Pacific

Aix-En-Provence Cedex 3, France

Phone: +33- 4-4239-3361

Fax: +33-4-4239-7227

Peregri ne Semiconduc tor, Asia Pacific (AP AC)

Shanghai, 200040, P.R. China

Tel: +86-21-5836-8276

Fax: +86-21-5836-7652

Peregrine Semiconductor, Korea

#B-2607, Kolon Tripolis, 210

Geumgok-dong, Bundang- gu, Seongnam-si

Gyeonggi-do, 463-943 Sout h Korea

Tel: +82-31-728-3939

Fax: +82-31-728-3940

Peregrine Semiconductor K.K., Japan

Teiko k u Hote l Tower 10B-6

1- 1-1 Uchisa iwa i-ch o, Ch iy o da-k u

Tokyo 100-0011 Japan

Tel: +81-3-3502-5211

Fax: +81-3-3502-5213