71342SA70JGI - INTEGRATED DEVICE TECHNOLOGY

May 2006 Rev 3 1/23

M27V322

32 Mbit (2Mb ×16) low-voltage UV EPROM and OTP EPROM

Feature summary

■3.3V ± 10% supply voltage in Read operation

■Read access time

– 100ns at VCC = 3.0V to 3.6V

■Pin compatible with M27C322

■Word-wide configurable

■32 Mbit Mask ROM replacement

■Low power consumption

– Active Current 30mA at 5MHz

– Stand-by Current 60µA

■Programming voltage: 12V ± 0.25V

■Programming time: 50µs/word

■Electronic signature

– Manufacturer Code: 0020h

– Device Code: 0034h

■ECOPACK® packages available

FDIP42W (F)

PDIP42 (B)

SDIP42 (S)

www.st.com

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Contents M27V322

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Contents

1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.4 System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.5 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.6 PRESTO III programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.7 Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.8 Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.9 On-Board programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.10 Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.11 Erasure operation (applies to UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 10

3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

6 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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M27V322 List of tables

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List of tables

Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 3. Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 5. AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 6. Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 7. Read mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 8. Programming mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 9. Read mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 10. Margin mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 6

Table 11. Programming mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 12. FDIP42W - 42 pin Ceramic Frit-seal DIP, with window (0.315" × 0.630"),

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 13. PDIP42 - 42 pin Plastic DIP, 600 mils width, package mechanical data . . . . . . . . . . . . . . 19

Table 14. SDIP42 - 42 lead Shrink Plastic DIP, 600 mils width, package mechanical data. . . . . . . . 20

Table 15. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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List of figures M27V322

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List of figures

Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Programming flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 4. AC testing input output waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2

Figure 5. AC testing load circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Read mode AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 7. Margin mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 8. Programming and Verify modes AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 9. FDIP42W - 42 pin Ceramic Frit-seal DIP, with window (0.315" × 0.630"),

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 10. PDIP42 - 42 pin Plastic DIP, 600 mils width, package outline . . . . . . . . . . . . . . . . . . . . . . 19

Figure 11. SDIP42 - 42 pin Shrink Plastic DIP, 600 mils width, package outline. . . . . . . . . . . . . . . . . 20

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M27V322 Summary description

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1 Summary description

The M27V322 is a 32 Mbit EPROM of fered in the UV range (ultra vio let erase) an d OTP

range. It is ideally suited for microprocessor systems requiring large data or program

storage . It is organised as 2 MW ords of 16 bit. The pin-out is compat ible with a 32 Mbit Mask

ROM.

The FDIP42W (window ceramic frit-seal package) has a transparent lid whic h allows the

user to e xpo se the chip to ultr a violet light to erase the bit pattern. A new pat tern can then be

written rapidly to the device by following the programming procedure.

For applications where the content is programmed only one time and erasure is not

required, the M27V322 is offered in PDIP42 and SDIP42 package s.

In order to meet environmental requiremen ts, ST offers the M27V322 in ECOPACK®

packages.

ECOPACK packages are Lead-free. The category of second Level Interconnect is marked

on the package and on the inner box label, in compliance with JEDEC Standard JESD97.

The maximum ratings related to soldering conditions are also marked on the inner box label.

ECOPACK is an ST trademark. ECOPACK specif ications are available at: www.st.com.

Figure 1. Logic diagram

Table 1. Signal names

A0-A20 Address Inputs

Q0-Q15 Data Outputs

EChip Enable

GVPP Output Enable / Program Supply

VCC Supply Voltage

VSS Ground

AI03050

A0-A20

GVPP

Q0-Q15

VCC

M27V322

VSS

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Summary description M27V322

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Figure 2. DIP connections

GVPP

VSS

A13

VSS

A14

A15

A12

A16

A20

Q15

Q5Q2

Q3 VCC

Q11 Q4

Q14

A8A17

A18 A19

AI03051

M27V322

Q13

A11

A10

Q10

Q12

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M27V322 Device operation

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2 Device operation

The operating modes of the M27V322 are listed in the Operating Modes Table. A single

pow er supply is requir ed in the read mode. All inputs are TTL compatib le except f or V PP and

12V on A9 for the Electronic Signature.

2.1 Read mode

The M27V322 has a word-wide organization. Chip Enable (E) is the power control and

should be used for device select ion. Output Enable (G) is the output control and should be

used to gate data to the output pins independent of device selection. Assuming that the

addresses are sta b le, the addr ess access time ( tAVQV) is equal to the delay from E to output

(tELQV). Data is available at the output after a delay of tGLQV from the falling edge of GVPP

assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV.

2.2 Standby mode

The M27V322 has a standby mode which reduces the supply current from 30mA to 30µA.

The M27V322 is placed in the standby mode by applying a CMOS high signal to the E

input.When in t he stand b y mode, the outputs are in a high imped ance state , independ ent o f

the GVPP input.

2.3 Two Line Output Control

Because EPROMs are usually used in larger memory arrays, this product features a 2 line

control function which accommodates the use of multiple memory connection. The two line

control function allows:

●the lowest possible memory power dissipa tion,

●complete assurance that output bus contention will not occur.

For the most efficient use of these two control lines, E should be decoded and used as the

primary device selecting function, while GVPP should be made a common connection to all

devices in the array and connected to the READ line from the system control bus. This

ensures that all deselected memory devices are in their low power standby mode and that

the output pins are only active when data is required from a particular memory device.

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Device operation M27V322

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2.4 System considerations

The power switching characteristics of Adv anced CMOS EPROMs require careful

decoupling of the supplies to the devices. The supply current ICC has three segments of

importance to the system designer: the standby current, the activ e current and the tr ansient

peaks that are produce d by the f a lling and rising edges of E. The ma gnitude of t he tr a nsient

current peaks is depende nt on the capacitive and inductive loading of the device outputs.

The associated transient v oltage peaks can be suppressed by complying with the two line

output control and by prope rly selected decoupling capacitors. It is recommended that a

0.1µF ceramic capacitor is used on every device between VCC and VSS. This should be a

high frequency type of low inherent inducta nce and should be placed as close as possib le to

the device. In addition, a 4.7µF electrol ytic capacitor should be used between VCC and VSS

f or e ve ry eight devices . This capacitor shou ld be mounted near th e power supply connection

point. The purpose of this capacitor is to o v ercome t he v oltage drop caused b y the indu ctiv e

effects of PCB traces.

2.5 Programming

When delivered (and after each erasure for UV EPROM), all bits of the M27V322 are in the

"1" state. Data is introduced by selectively programming "0"s into the desired bit locations.

Although only "0"s will be programmed, both "1"s and "0"s can be present in the data word.

The only way to change a "0" to a "1" is by die exposition to ultraviolet light (UV EPROM).

The M27V322 is in the programming mode when VPP input is at 12.V, GVPP is at VIH and E

is pulsed to VIL. The data to be programmed is applied to 16 bits in parallel to the data

output pins. The le vels required for the address and da ta inp uts ar e TTL. V CC is specified to

be 6.25V ± 0.25V.

2.6 PRESTO III programming algorithm

The PRESTO III Programming Algorithm allows the whole array to be programed with a

guarant eed margin in a typical time of 100 seconds . Progr amming with PREST O III consists

of applying a sequence of 50µs program pulses to each word until a correct verify occurs

(see Figure 3). During programing and verify operation a MARGIN MODE circuit must be

activated to guarantee th at each cell is programed with enough margin. No overprogram

pulse is applied since the verify in MARGIN MODE provides the necessary margin to each

programmed cell.

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M27V322 Device operation

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Figure 3. Programming flowchart

2.7 Program Inhibit

Programming of multiple M27V322s in parallel with different data is also easily

accomplished. Except for E, all like inputs including GVPP of the parallel M27V3 2 2 may be

common. A TTL lo w le vel pulse applie d to a M27V322's E input and VPP at 12V, will program

that M27V322. A high level E input inhibits the other M27V322s from being programmed.

2.8 Program Verify

A verify (read) should be performed on the programmed bits to determine that they were

correctly prog ra mmed. The verify is accomplished with GVPP at V IL. Data should be v erified

with tELQV after the falling edge of E.

2.9 On-Board programming

The M27V322 can be directly programmed in the application circuit. See the relevant

Application Note AN620.

AI03059B

n = 0

Last

Addr

VERIFY

E = 50µs Pulse

++n

= 25 ++ Addr

VCC = 6.25V, VPP = 12V

FAIL

CHECK ALL WORDS

1st: VCC = 5V

2nd: VCC = 3V

YES

SET MARGIN MODE

RESET MARGIN MODE

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Device operation M27V322

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2.10 Electronic Signature

The Electronic Signature (ES) mode allows the reading out of a binary code from an

EPROM that will identify its manufacturer and type. This mode is intended for use by

programming equipment to automatically match the device to be programmed with its

corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C

ambient temperature range that is required when programming the M27V322. To activate

the ES mode , th e p rog ramming equipment must force 11.5V to 12.5V on add ress line A9 of

the M27V322, with VPP = VCC = 5V. Two identifier bytes may then be sequenced from the

device outputs by toggling address line A0 from VIL to VIH. All other address lines must be

held at VIL during Electronic Signature mode.

Byte 0 (A0 = VIL) represent s the manufacturer code and byte 1 (A0 = VIH) the device

identifier code. For the STMicroelectronics M27V322, these two identifier bytes are given in

Table 3 and can be read -out on outputs Q0 to Q7.

2.11 Erasure operation (applies to UV EPROM)

The eras ure characteristics of the M27V322 is such that er asure begins when the cells are

exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted

that sunlight and some type of fluorescent lamps ha ve wavelengths in the 3000-4000 Å

range. Research shows that constant exposure to room level fluorescent lighting could

erase a typical M27V322 in ab ou t 3 years, while it would take approximately 1 week to

cause erasu re when exposed to direct sunlight. If the M27V322 is to be exposed to these

types of lighting conditions for extended periods of time, it is suggested that opaque labels

be put o ver the M27V322 window to prevent unintentional erasure. The recommended

erasure procedure for M27V322 is ex posure to short wave ultraviolet light which has a

wavelength of 2537 Å. The integrated dose (i.e. UV inten sity x exposure time) for erasure

should be a minimum of 30 W-sec/cm2. The erasure time with this dosage is approximately

30 to 40 minu tes using an ultraviolet lamp with 12000 µW/cm2 power rating. The M27V322

should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. Some lamps

have a filter on their tubes which should be removed before erasure.

Table 2. Operating modes(1)

1. X = VIH or VIL, VID = 12V ± 0.5V.

Mode E GVPP A9 Q15-Q0

Read VIL VIL X Data Out

Output Disable VIL VIH X Hi-Z

Program VIL Pulse VPP X Data In

Program Inhibit VIH VPP X Hi-Z

Standby VIH X X Hi-Z

Electronic Signature VIL VIL VID Codes

Table 3. Electronic signature(1)

1. Outputs Q15-Q8 are set to '0'.

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

Manufacturer’s Code VIL 00100000 20h

Device Code VIH 00110100 34h

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M27V322 Maximum rating

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3 Maximum rating

Stressing the device above the rating listed in the Absolute Maximum Ratings table may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditio ns above those indicated in the Operating sections of

this specification is not implied. Exposure to Absolute Maximum Rating conditions for

extended periods may affect device reliability. Refer also to the STMicroelectronics SURE

Program and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

TAAmbient Operating Tempe rature(1)

1. Depends on range.

–40 to 125 °C

TBIAS Tempe rature Under Bias –50 to 125 °C

TSTG Storage Temperature –65 to 150 °C

VIO(2)

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than

20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less

than 20ns.

Input or Output Voltage (except A9) –2 to 7 V

VCC Supply Voltage –2 to 7 V

VA9(2) A9 Voltage –2 to 13.5 V

VPP Program Supply Voltage –2 to 14 V

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DC and AC parameters M27V322

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4 DC and AC parameters

This section summarizes the operating and measurement conditions, and the DC and AC

characteristics of the device. The parameters in the DC and AC Characteristic tables that

follow are derived from tests performed under the Measurement Conditions summarized in

the relevant tables. Designers should check that the operating conditions in their circuit

match the measurem ent conditions when relying on the quoted parameters.

Figure 4. AC testing input output waveform

Table 5. AC measurement conditions

High Speed Standard

Input Rise and Fa ll Times ≤ 10ns ≤ 20ns

Input Pulse Voltages 0 to 3V 0.4V to 2.4V

Input and Output Timing Ref . Voltages 1.5V 0.8V and 2V

AI01822

High Speed

1.5V

2.4V

Standard

0.4V

2.0V

0.8V

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M27V322 DC and AC parameters

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Figure 5. AC testing load circuit

Table 6. Capacitance(1) (2)

1. TA = 25 °C, f = 1 MHz

2. Sampled only, not 100% tested.

Symbol Parameter Test Condition Min Max Unit

CIN Input Capacitance VIN = 0V 10 pF

COUT Output Capacitance VOUT = 0V 12 pF

AI01823B

1.3V

OUT

CL = 30pF for High Speed

CL = 100pF for Standard

CL includes JIG capacitance

3.3kΩ

1N914

DEVICE

UNDER

TEST

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DC and AC parameters M27V322

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Table 7. Read mode DC characteristics(1) (2)

1. TA = –40 to 85 °C or 0 to 70 °C; VCC = 3.3V ± 10%; VPP = V CC

2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

Symbol Parameter Test Condition Min Max Unit

ILI Input Leakage Current 0V ≤ VIN ≤

VCC ±1 µA

ILO Output Leakage Current 0 V ≤ VOUT ≤

VCC ±10 µA

ICC Supply Current E = VIL, GVPP = VIL,

IOUT = 0mA, f = 5MHz 30 mA

ICC1 Supply Current (Standby)

TTL E = VIH 1mA

ICC2 Supply Current (Standby)

CMOS E > VCC – 0.2V 60 µA

IPP Progra m Current VPP = VCC 10 µA

VIL Input Low Voltage –0.6 0.2VCC V

VIH(3)

3. Maximum DC voltage on Output is VCC +0.5V.

Input High Voltage 0.7VCC VCC + 0.5 V

VOL Output Low Voltage IOL = 2.1mA 0.4 V

VOH Output High Voltage TTL IOH = –400µA 2.4 V

Table 8. Programming mode DC characteristics(1) (2)

1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12V ± 0.25V

2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

Symbol Parameter Test Condition Min Max Unit

ILI Input Leakage Current VIL ≤ VIN ≤ VIH ±10 µA

ICC Supply Current 50 mA

IPP Program Current E = VIL 50 mA

VIL Input Low Voltage –0.3 0.8 V

VIH Input High Vol tage 2.4 VCC + 0.5 V

VOL Output Low Voltage IOL = 2.1mA 0.4 V

VOH Output High Voltage TTL IOH = –2.5mA 3.5 V

VID A9 Voltage 11.5 12.5 V

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M27V322 DC and AC parameters

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Figure 6. Read mode AC waveforms

Table 9. Read mode AC characteristics(1) (2)

1. TA = –40 to 85 °C or 0 to 70 °C; VCC = 3.3V ± 10%; VPP = V CC

2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP

Symbol Alt Parameter Test

Condition

M27V322

Unit-100(3)

3. Speed obtained with High Speed measurement conditions.

-120 -150

Min Max Min Max Min Max

tAVQV tACC Address Valid to Output

Valid E = VIL,

G = VIL 100 120 150 ns

tELQV tCE Chip Enable Low to Output

Valid G = VIL 100 120 150 ns

tGLQV tOE Output Enable Low to

Output Valid E = VIL 50 60 60 ns

tEHQZ(4)

4. Sampled only, not 100% tested.

tDF Chip Enable High to Output

Hi-Z G = VIL 045050050ns

tGHQZ(4) tDF Output Enable High to

Output Hi-Z E = VIL 045050050ns

tAXQX tOH Address Transition to

Output Transition E = VIL,

G = VIL 555ns

AI02207

tAXQX

tEHQZ

A0-A20

GVPP

Q0-Q15

tAVQV

tGHQZ

tGLQV

tELQV

VALID

Hi-Z

VALID

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DC and AC parameters M27V322

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Figure 7. Margin mode AC waveforms

1. A8 High level = 5V; A9 High level = 12V.

Table 10. Margin mode AC characteristics(1) (2)

1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12V ± 0.25V

2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

Symbol Alt Parameter Test

Condition Min Max Unit

tA9HVPH tAS9 VA9 High to VPP High 2 µs

tVPHEL tVPS VPP High to Chip Enable Low 2 µs

tA10HEH tAS10 VA10 High to Chip Enable High (Set) 1 µs

tA10LEH tAS10 VA10 Low to Chip Enable High (Reset) 1 µs

tEXA10X tAH10 Chip Enable Transition to VA10 Transition 1 µs

tEXVPX tVPH Chip Enable Transition to VPP Transition 2 µs

tVPXA9X tAH9 VPP Transition to VA9 Transition 2 µs

AI00736B

tA9HVPH tVPXA9X

GVPP

A10 Set

VCC

tVPHEL

tA10LEH

tEXVPX

tA10HEH

A10 Reset

tEXA10X

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M27V322 DC and AC parameters

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Figure 8. Programming and Verify modes AC waveforms

1. BYTE = VIH.

Table 11. Pr ogramming mode AC characteristics(1) (2)

1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12V ± 0.25V

2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

Symbol Alt Parameter Test

Condition Min Max Unit

tAVEL tAS Address Valid to Chip Ena ble Low 1 µs

tQVEL tDS Input Valid to Chip Enable Low 1 µs

tVCHEL tVCS VCC High to Chip Enable Low 2 µs

tVPHEL tOES VPP High to Chip Enable Low 1 µs

tVPLVPH tPRT VPP Rise Time 50 ns

tELEH tPW Chip Enable Program Pulse Width

(Initial) 45 55 µs

tEHQX tDH Chip Enable High to Input Transition 2 µs

tEHVPX tOEH Chip Enable High to VPP Transition 2 µs

tVPLEL tVR VPP Low to Chip Enable Low 1 µs

tELQV tDV Chip Enable Low to Output Valid 1 µs

tEHQZ(3)

3. Sampled only, not 100% tested.

tDFP Chip Enable High to Output Hi-Z 0 130 ns

tEHAX tAH Chip Enable High to Address Transition 0 ns

tAVEL

VALID

AI02205

A0-A20

Q0-Q15

VCC

DATA IN DATA OUT

tQVEL

tVCHEL

tVPHEL

tEHQX

tEHVPX tELQV

tELEH

tEHQZ

tVPLEL

PROGRAM VERIFY

GVPP

tEHAX

Obsolete Product(s) - Obsolete Product(s)

Package mechanical M27V322

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5 Package mechanical

Figure 9. FDIP42W - 42 pin Ceramic Frit-seal DIP, with window (0.315" × 0.630"),

package outline

1. Drawing is not to scale.

Table 12. FDIP42W - 42 pin Ceramic Frit-se al DIP, with window (0.315" × 0.63 0"),

mechanical data

Symbol millimeters inches

Typ Min Max Typ Min Max

A 5.72 0.225

A1 0.51 1.40 0.020 0.055

A2 3.91 4.57 0.154 0.180

A3 3.89 4.50 0.153 0.177

B 0.41 0.56 0.016 0.022

B1 1.45 – – 0.057 – –

C 0.23 0.30 0.009 0.012

D 54.41 54.86 2.142 2.160

D250.80– –2.000– –

E 15.24 – – 0.600 – –

E1 14.50 14.90 0.571 0.587

e2.54– –0.100– –

eA 14.99 – – 0.590 – –

eB 16.18 18.03 0.637 0.710

L 3.18 4.10 0.125 0.161

S 1.52 2.49 0.060 0.098

K8.00– –0.315– –

K116.00– –0.630– –

α4° 11° 4° 11°

N42 42

FDIPW-b

B1 B e1

E1 E

Obsolete Product(s) - Obsolete Product(s)

M27V322 Package mechanical

19/23

Figure 10. PDIP42 - 42 pin Plastic DIP, 600 mils width, package outline

1. Drawing is not to scale.

Table 13. PDIP42 - 42 pin Plastic DIP, 600 mils width, package mechanical data

Symbol millimeters inches

Typ Min Max Typ Min Max

A – 5.08 – 0.200

A1 0.25 – 0.010 –

A2 3.56 4.06 0.140 0.160

B 0.38 0.53 0.015 0.021

B1 1.27 1.65 0.050 0.065

C 0.20 0.36 0.008 0.014

D 52.20 52.71 2.055 2.075

D2 50.80 – – 2.000 – –

E 15.24 – – 0.600 – –

E1 13.59 13.84 0.535 0.545

e1 2.54 – – 0.100 – –

eA 14.99 – – 0.590 – –

eB 15.24 17.78 0.600 0.700

L 3.18 3.43 0.125 0.135

S 0.86 1.37 0.034 0.054

α0° 10° 0° 10°

N42 42

PDIP

B1 B e1

E1 E

Obsolete Product(s) - Obsolete Product(s)

Package mechanical M27V322

20/23

Figure 11. SDIP42 - 42 pin Shrink Plastic DIP, 600 mils width, packa ge outline

1. Drawing is not to scale.

Table 14. SDIP42 - 42 lead Shrink Plastic DIP, 600 mils width, package mechanical

data

Symbol millimeters inches

Typ Min Max Typ Min Max

A5.080.200

A1 0.51 0.020

A2 3.81 3.05 4.57 0.150 0.120 0.180

b 0.46 0.38 0.56 0.018 0.015 0.022

b2 1.02 0.89 1.14 0.040 0.035 0.045

c 0.25 0.23 0.38 0.010 0.009 0.015

D 36.83 36.58 37.08 1.450 1.440 1.460

D235.60– –1.402– –

e1.78– –0.070– –

E 15.24 16.00 0.600 0.630

E1 13.72 12.70 14.48 0.540 0.500 0.570

eA 15.24 0.600

eB 18.54 0.730

L 3.30 2.54 3.56 0.130 0.100 0.140

S0.64 0.025

N42 42

SDIP

b2 b e

E1 E

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M27V322 Part numbering

21/23

6 Part numbering

F or a list of a vailable option s (Speed, Package , et c.) or for further inf ormation on an y aspect

of this device, please contact the STMicroelectronics Sales Office nearest to you.

Table 15. Ordering information scheme

Example: M27V322 -100 X F 1

Device Type

M27

Supply Voltage

V = 3.3V ±10%

Device Function

322 = 32 Mbit (2Mb x16)

Speed

-100 = 100 ns(1)

1. High Speed, see AC Characteristics section for further information.

-120 = 120 ns

-150 = 150 ns

VCC Tolerance

blank = 3.3V ±10%

X = 3.3V ±5%

Package

F = FDIP42W

B = PDIP42

S = SDIP42

Temperature Range

1 = 0 to 70 °C

6 = –40 to 85 °C

Obsolete Product(s) - Obsolete Product(s)

Revision history M27V322

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7 Revision history

Table 16. Document revision history

Date Revision Revision Details

July 1999 0.1 First Issue

02/09/00 1 Programming Flowchart changed (Figure 3)

PRESTO III Programming Algorithm paragraph changed

FDIP42W Package Dimension, L Max added (Table 12)

03/01/01 2 SDIP42 Pa ckage added (Figure 11, Table 14)

22-May-2006 3

Document converted to new template (sections added, information

moved).

Packages are ECOPACK® compliant. SDIP42 package specifications

updated (see Table 14 and Figure 11).

Obsolete Product(s) - Obsolete Product(s)

M27V322

23/23

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