S-8242B Series
www.sii-ic.com
BATTERY PROTECTION IC
FOR 2-SERIAL-CELL PACK
© Seiko Instruments Inc., 2006-2010 Rev.2.1_00
Seiko Instruments Inc. 1
The S-8242B Series are protection ICs for 2-serial-cell lithium-ion/lithium polymer rechargeable batteries and include high-
accuracy volt age de tecto rs and de lay circuits.
These ICs are suitable for protecting 2-cell rechargeable lithium-ion / lithium polymer battery packs from overcharge,
overdischarge, and overcurrent.
Features
(1) High-accuracy voltage detecti on for each cell
• Overcharge detection voltage n (n = 1, 2) 3.9 V to 4.5 V (50 mV steps) Accuracy ±25 mV
• Overcharge release voltage n (n = 1, 2) 3.8 V to 4.5 V*1 Accuracy ±50 mV
• Overdischarge detection voltage n (n = 1, 2) 2.0 V to 3.0 V (100 mV steps) Accuracy ±50 mV
• Overdischarge release voltage n (n = 1, 2) 2.0 V to 3.4 V*2 Accuracy ±100 mV
(2) Two-level overcurrent detection (overcurrent 1, overcurrent 2)
• Overcurrent detection voltage 1 0.05 V, 0.08 V to 0.30 V (10 mV steps) Accuracy ±15 mV
• Overcurrent detection voltage 2 1.2 V (fixed) Accuracy ±300 mV
(3) Delay times (overcharge, ove r discharge, overcurrent) are generated by an internal circuit (external capacitors are
unnecessary).
(4) 0 V battery charge function available/unavailable are selectable.
(5) Charger detection function
• The overdischarge hysteresis is rele ased by detecting negative voltage at the VM pin ( −0 .7 V typ.) (Charger
detection function).
(6) High-withstand voltage devices Absolute maximum rating: 28 V
(7) Wide operating temperature range −40°C to +85°C
(8) Low current consumption
Operation mode 10 μA max. (+25°C)
Power-down mode 0.1 μA max. (+25°C)
(9) Lead-free, Sn 100%, halogen-free*3
*1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage
(Overcharge hysteresis voltage n (n = 1, 2) can be selected as 0 V or from a range of 0. 1 V to
0.4 V in 50 mV steps.)
*2. Overdischarge release voltage = Overdischarge detection voltage + Overd ischarge hysteresis voltage
(Overdischarge hysteresis voltage n (n = 1, 2) can be select ed as 0 V or from a range of 0.1 V to
0.7 V in 100 mV steps.)
*3. Refer to “ Product Name Structure” for details.
Applications
• Lithium-ion rechargeable battery packs
• Lithium polymer rechargeable b attery packs
Packages
• SNT-8A
• 8-Pin TSSOP
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
2
Block Diagram
CO
VDD
DO
VM
300 k
Ω
10 k
Ω
+
−
+
−
Delay circuit, controller,
0 V battery charge/
charge inhibition circuit
VC
−
+
+
−
−
+
+
−
VSS
Charger
detector
Remark All the diodes in the figure are parasitic diodes.
Figure 1
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 3
Product Name Structure
1. Product Name
Serial code
Sequentially set from AA to ZZ
S
-8242B xx - xxxx x
Environmental code
U : Lead-free (Sn 100%), halogen-free
S : Lead-free, halogen-free
G : Lead-free (for details, please contact our sales office)
Package name (abbreviation) and IC packing specifications
*1
I8T1 : SNT-8A, Tape
T8T1: 8-Pin TSSOP, Tape
*1. Refer to the tape specifications.
2. Package
Drawing Code
Package Name Package Tape Reel Land
SNT-8A PH008-A-P-SD PH008-A-C-SD PH008-A-R-SD PH008-A-L-SD
Environmental code = G, S FT008-A-P-SD FT008-E-C-SD FT008-E-R-SD
8-Pin TSSOP Environmental code = U FT008-A-P-SD FT008-E-C-SD FT008-E-R-S1 ⎯
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
4
3. Product Name List
(1) SNT-8A Package Table 1
Product Name
Overcharge
Detection
Voltage
[VCU]
Overcharge
Release
Voltage
[VCL]
Overdischarge
Detection
Voltage
[VDL]
Overdischarge
Release
Voltage
[VDU]
Overcurrent
Detection
Voltage 1
[VIOV1]
0 V Battery
Charge
S-8242BAB-I8T1x 4.325 V 4.075 V 2.2 V 2.9 V 0.21 V Unavailable
S-8242BAC-I8T1x 4.350 V 4.150 V 2.3 V 3.0 V 0.30 V Available
S-8242BAD-I8T1x 4.350 V 4.350 V 2.3 V 2.9 V 0.08 V Available
S-8242BAE-I8T1x 4.430 V 4.200 V 2.3 V 2.9 V 0.08 V Available
S-8242BAF-I8T1x 4.300 V 4.100 V 2.0 V 2.0 V 0.20 V Available
S-8242BAH-I8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.20 V Unavailable
S-8242BAI-I8T1x 4.250 V 4.050 V 2.4 V 3.0 V 0.15 V Available
S-8242BAM-I8T1x 4.300 V 4.100 V 2.6 V 3.0 V 0.28 V Unavailable
S-8242BAN-I8T1x 4.350 V 4.150 V 2.3 V 2.9 V 0.25 V Unavailable
S-8242BAO-I8T1x 4.350 V 4.150 V 2.3 V 2.9 V 0.10 V Available
S-8242BAQ-I8T1x 4.350 V 4.150 V 2.3 V 2.9 V 0.20 V Unavailable
S-8242BAR-I8T1x 4.300 V 4.100 V 2.6 V 3.0 V 0.21 V Unavailable
S-8242BAU-I8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.28 V Unavailable
S-8242BAV-I8T1x 4.350 V 4.150 V 2.2 V 2.9 V 0.20 V Unavailable
S-8242BAW-I8T1x 4.350 V 4.150 V 2.2 V 2.9 V 0.25 V Unavailable
S-8242BAX-I8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.21 V Unavailable
S-8242BAY-I8T1x 4.210 V 4.210 V 2.0 V 2.0 V 0.20 V Unavailable
S-8242BAZ-I8T1x 4.190 V 4.190 V 2.3 V 2.9 V 0.10 V Available
S-8242BBA-I8T1x 4.350 V 4.150 V 3.0 V 3.4 V 0.25 V Unavailable
S-8242BBB-I8T1x 4.270 V 4.070 V 2.3 V 2.3 V 0.20 V Available
S-8242BBC-I8T1x 4.250 V 4.050 V 2.4 V 3.0 V 0.10 V Available
S-8242BBD-I8T1x 4.310 V 4.110 V 2.0 V 2.0 V 0.20 V Available
S-8242BBF-I8T1x 4.350 V 4.150 V 2.0 V 2.4 V 0.25 V Unavailable
S-8242BBI-I8T1x 4.300 V 4.150 V 3.175 V 3.275 V 0.15 V Unavailable
(2) 8-Pin TSSOP Package Table 2
Product Name
Overcharge
Detection
Voltage
[VCU]
Overcharge
Release
Voltage
[VCL]
Overdischarge
Detection
Voltage
[VDL]
Overdischarge
Release
Voltage
[VDU]
Overcurrent
Detection
Voltage 1
[VIOV1]
0 V Battery
Charge
S-8242BAC-T8T1x 4.350 V 4.150 V 2.3 V 3.0 V 0.30 V Available
S-8242BAH-T8T 1x 4.300 V 4.100 V 2.4 V 3.0 V 0.20 V Unavailable
S-8242BAI-T8T1x 4.250 V 4.050 V 2.4 V 3.0 V 0.15 V Available
S-8242BAP-T8T1x 4.100 V 3.800 V 2.2 V 2.4 V 0.30 V Unavailable
S-8242BAR-T8T 1x 4.300 V 4.100 V 2.6 V 3.0 V 0.21 V Unavailable
S-8242BAU-T8T 1x 4.300 V 4.100 V 2.4 V 3.0 V 0.28 V Unavailable
S-8242BAV-T8T1x 4.350 V 4.150 V 2.2 V 2.9 V 0.20 V Unavailable
S-8242BAW-T8T1x 4.350 V 4.150 V 2.2 V 2.9 V 0.25 V Unavailable
S-8242BAX-T8T1x 4.300 V 4.100 V 2.4 V 3.0 V 0.21 V Unavailable
S-8242BBE-T8T1x 4.350 V 4.150 V 2.0 V 2.4 V 0.20 V Unavailable
S-8242BBF-T8T1x 4.350 V 4.150 V 2.0 V 2.4 V 0.25 V Unavailable
S-8242BBG-T8T1x 4.200 V 4.000 V 2.6 V 3.0 V 0.10 V Available
S-8242BBU-T8T1y 4.200 V 4.000 V 2.6 V 3.0 V 0.30 V Unavailable
S-8242BBV-T8T1y 4.250 V 4.050 V 2.2 V 2.6 V 0.30 V Unavailable
Remark 1. Please contact our sales office for the prod ucts with detection voltage value other than those specified above.
2. x: G or U
3. y: S or U
4. Please select products of environmental code = U for Sn 100%, halogen-free products.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 5
Pin Configurations
Table 3
Pin No. Symbol Description
1 CO
Connection of charge control FET gate
(CMOS output)
2 DO
Connection of discharge cont rol FET gate
(CMOS output)
3 NC*1 No connection
4 VSS
Connection for negative power supply input
and negative voltage of battery 2
5 VC
Connection for negative voltage of battery 1
and positive voltage of battery 2
6 VDD Connection for positive po wer suppl y input
and positive voltage of battery 1
7 NC*1 No connection
1
2
3
4
SNT-8A
Top vi e w
8
7
6
5
Figure 2
8 VM
Voltage detection bet ween VM and VSS
(overcurrent/charger detection pin)
*1. The NC pin is electrically open.
The NC pin can be connected to VDD or VSS.
Remark For the external views, refer to the package drawings.
Table 4
Pin No. Symbol Description
1 CO
Connection of charge control FET gate
(CMOS output)
2 DO
Connection of discharge cont rol FET gate
(CMOS output)
3 NC*1 No connection
4 VSS
Connection for negative power supply input
and negative voltage of battery 2
5 VC
Connection for negative voltage of battery 1
and positive voltage of battery 2
6 VDD Connection for positive po wer suppl y input
and positive voltage of battery 1
7 NC*1 No connection
8 VM
Voltage detection bet ween VM and VSS
(overcurrent/charger detection pin)
8-Pin TSSOP
Top vi ew
1
2
3
4
8
7
6
5
Figure 3
*1. The NC pin is electrically open.
The NC pin can be connected to VDD or VSS.
Remark For the external views, refer to the package drawings.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
6
Absolute Maximum Ratings
Table 5 (Ta = 25°C unless otherwise specified)
Item Symbol Applied pin Absolute Maximum Ratin gs Unit
Input voltage between VDD and VSS VDS VDD
VSS−0.3 to VSS+12 V
VC input pin voltage VVC VC
VSS−0.3 to VDD+0.3 V
VM pin input voltage VVM VM VDD−28 to VDD+0.3 V
DO pin output voltage VDO DO VSS−0.3 to VDD+0.3 V
CO pin output voltage VCO CO VVM−0.3 to VDD+0.3 V
SNT-8A 450*1 mW
Power dissipation 8-Pin TSSOP PD ⎯ 700*1 mW
Operating ambient temperature Topr ⎯ −40 to +85 °C
Storage temperature Tstg ⎯ −55 to +125 °C
*1. When mounted on board
[Mounted board]
(1) Board size: 114.3 mm × 76.2 mm × t1.6 mm
(2) Board name: JEDEC STANDARD 51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
050 100 150
800
400
0
Power Dissi
p
at ion
(
P
D
)
[
mW
]
Am bient Temperature (T a) [°C]
8 - Pin T S SO P
200
600
SNT-8
A
Figure 4 Power Dissipation of Packag e (When mounted on board)
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 7
Electrical Characteristics
Table 6
(Ta
=
25
°
C unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
condition Test
circuit
[DETECTION VOLTAGE]
Overcharge detection voltage n V
CUn
3.90 V to 4.50 V, Adjustable
V
CUn
–0.025 V
CUn
V
CUn
+0.025 V 1 1
Overcharge release voltage n V
CLn
3.80 V to 4.50 V, Adjustable
V
CLn
–0.05 V
CLn
V
CLn
+0.05 V 1 1
Overdischarge detection voltage n V
DLn
2.0 V to 3.0 V, A d just ab le
V
DLn
–0.05 V
DLn
V
DLn
+0.05 V 2 2
Overdischarge release voltage n V
DUn
2.0 V to 3.40 V, A d justa b le
V
DUn
–0.10 V
DUn
V
DUn
+0.10 V 2 2
Overcurrent detection voltage 1 V
IOV1
0.05 V to 0.30 V, Adjustable
V
IOV1
–0.015 V
IOV1
V
IOV1
+0.015 V 3 2
Overcurrent detection voltage 2 V
IOV2
⎯
0.9 1.2 1.5 V 3 2
Charger detection voltage V
CHA
⎯
–1.0 –0.7 –0.4 V 4 2
Temperature coefficient 1
*1
T
COE1
Ta = 0°C to 50°C
*3
–1.0 0 1.0 mV/°C
⎯
⎯
Temperature coefficient 2
*2
T
COE2
Ta = 0°C to 50°C
*3
–0.5 0 0.5 mV/°C
⎯
⎯
[DELAY TIME]
Overcharge detection delay time t
CU
⎯
0.92 1.15 1.38 s 9 2
Overdischarge detection delay time t
DL
⎯
115 144 173 ms 9 2
Overcurrent detection delay time 1 t
IOV1
⎯
7.2 9 11 ms 10 2
Overcurrent detection delay time 2 t
IOV2
FET gate capacitance
=
2000 pF
220 300 380
μ
s 10 2
[0 V BATTERY CHA R G E FU NC TION]
0 V charge starting charger voltage
V
0CHA
0 V charge available
1.2
⎯
⎯
V 11 2
0 V battery charge inhibition battery voltage
V
0INH
0 V charge unavailable
⎯
⎯
0.5 V 12 2
[INTERNAL RESISTANCE]
Resistance between VM and VDD R
VMD
V1 = V2 = 1.5 V, V
VM
= 0 V
100 300 900 k
Ω
6 3
Resistance between VM and VSS R
VMS
V1 = V2 = 3.5 V, V
VM
= 1.0 V
5 10 20 k
Ω
6 3
[INPUT VOLTAGE]
Operating voltage between VDD and VSS
V
DSOP1
Internal circuit operating voltage
1.5
⎯
10 V
⎯
⎯
Operating voltage between VDD and VM
V
DSOP2
Internal circuit operating voltage
1.5
⎯
28 V
⎯
⎯
[INPUT CURRENT]
Current consumption during operation I
OPE
V1 = V2 = 3.5 V, V
VM
= 0 V
⎯
5 10
μ
A 5 3
Current consumption at power down I
PDN
V1 = V2 = 1.5 V, V
VM
= 3.0 V
⎯
⎯
0.1
μ
A 5 3
VC pin curre nt I
VC
V1 = V2 = 3.5 V, V
VM
= 0 V
–0.3 0 0.3
μ
A 5 3
[OUTPUT RESISTANCE]
CO pin H r e sist ance R
COH
V
CO
= V
DD
–0.5 V
2 4 8 k
Ω
7 4
CO pin L resi st a nc e R
COL
V
CO
= V
VM
+0.5 V
2 4 8 k
Ω
7 4
DO pin H r e sist ance R
DOH
V
DO
= V
DD
–0.5 V
2 4 8 k
Ω
8 4
DO pin L resi st a nc e R
DOL
V
DO
= V
SS
+0.5 V
2 4 8 k
Ω
8 4
*1. Voltage temperature coef ficient 1: Overcharge detection voltage
*2. Voltage temperature coef ficient 2: Overcurrent detection voltage 1
*3. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
8
Test Circuits
Caution Unless o therwise specified, th e output voltage levels “H” and “L” at CO pin (VCO) and DO pin (VDO) are
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
VVM and the DO pin level with respect to VSS.
1. Overcharge Detection Voltage, Overcharge Release Voltage
(Test Condition 1, Test Circuit 1)
Overcharge detection voltage 1 (V CU1) is defined as the voltage between the VDD pin and VC pin at which VCO goes
from “H” to “L” when the voltage V1 is gradually increase d from the starting condition of V1 = V2 = VCU
–
0.05 V, V3 = 0
V. Overcharge release voltage 1 (VCL1) is defined as the voltage bet ween the VDD and VC pins at which VCO goes
from “L” to “H” when setting V2 = 3.5 V and the voltage V1 is then gradually decreased. Overcharge hysteresis
voltage 1 (VHC1) is defined as the difference bet ween overcharge detection voltage 1 (VCU1) and overcharge release
voltage 1 (VCL1).
Overcharge detection voltage 2 (VCU2) is defined as the volt age between the VC pin and VSS pin at which VCO goes
from “H” to “L” when the voltage V2 is gradually increase d from the starting condition of V1 = V2 = VCU
–
0.05 V, V3 = 0
V. Overcharge release voltage 2 (VCL2) is defined as the voltage between the VC and VSS pins at which VCO goes
from “L” to “H” when setting V1 = 3.5 V and the voltage V2 is then gradually decreased. Overcharge hysteresis
voltage 2 (VHC2) is defined as the difference bet ween overcharge detection voltage 2 (VCU2) and overcharge release
voltage 2 (VCL2).
2. Overdischarge Detection Voltag e, Overdischarge Release Vo ltage
(Test Condition 2, Test Circuit 2)
Overdischarge detection voltage 1 (VDL1) is defined as the voltage between the VDD pin and VC pin at which VDO
goes from “H” to “L” when the voltage V1 is g raduall y decreased from the starting condition of V1 = V2 = 3.5 V, V3 = 0
V. Overdischarge release voltage 1 (VDU1) is defined as the voltage between the VDD pin and VC pin at which VDO
goes from “L” to “H” when setting V2 = 3.5 V and the voltage V1 is then gradually increased. Overdischarge
hysteresis voltage 1 (VHD1) is defined as the difference between overdischarge release voltage 1 (VDU1) and
overdischarge detection volta ge 1 (VDL1).
Overdischarge detection voltage 2 (VDL2) is defined as the voltage between the VC pin and VSS pin at which VDO
goes from “H” to “L” when the voltage V2 is g raduall y decreased from the starting condition of V1 = V2 = 3.5 V, V3 = 0
V. Overdischarge release voltage 2 (VDU2) is defined as the voltage between the VC pin and VSS pin at which VDO
goes from “L” to “H” when setting V1 = 3.5 V and the voltage V2 is then gradually increased. Overdischarge
hysteresis voltage 2 (VHD2) is defined as the difference between overdischarge release voltage 2 (VDU2) and
overdischarge detection volta ge 2 (VDL2).
3. Overcurrent Detection Voltage 1, Overcurrent Detectio n Voltage 2
(Test Condition 3, Test Circuit 2)
Overcurrent detection voltage 1 (VIOV1) is defined as the vo ltage between the VM pin and VSS pin whose dela y time
for changing VDO from “H” to “ L” lies between the minimum and the maximum value of overcurrent delay time 1 when
the voltage V3 is increased rapidly within 10 μs from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V.
Overcurrent detection voltage 2 (VIOV2) is defined as the vo ltage between the VM pin and VSS pin whose dela y time
for changing VDO from “H” to “ L” lies between the minimum and the maximum value of overcurrent delay time 2 when
the voltage V3 is increased rapidly within 10 μs from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V.
4. Charger Detection Voltage
(Test Condition 4, Test Circuit 2)
The charger detection voltage (VCHA) is defined as the voltage between the VM pin and VSS pin at which VDO goes
from “L” to “H” when the voltage V3 is gradually decreased from 0 V after the voltage V1 is gradually incr eased from
the starting condition of V1 = 1.8 V, V2 = 3.5 V, V3 = 0 V until the voltage V1 becomes VDL1 + (VHD1/2).
The charger detection voltage can be measure d only in a product whose over discharge hysteresis VHD ≠ 0 V.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 9
5. Operating Current Consumption, VC Pin Current, Power-down Current Consumption
(Test Condition 5, Test Circuit 3)
The operating current co nsumption (I OPE) is the current I SS that flows through the VSS pi n and th e VC pi n curre nt (IVC)
is the current IC that flows through the VC pin under the set conditions of V1 = V2 = 3.5 V and S1:OFF, S2:ON
(normal status).
The power-down current consumption (I PDN) is the current ISS that flows through the VSS pin under the set conditions
of V1 = V2 = 1.5 V and S1:ON, S2:OFF (overdischarge status).
6. Resistance between VM and VDD, Resistance between VM and VSS
(Test Condition 6, Test Circuit 3)
The resistance bet ween VM and VDD (R VMD) is the resistan ce bet ween VM and V DD pi ns under the s et conditions of
V1 = V2 = 1.5 V and S1:OFF, S2:ON.
The resistance between VM and VSS (RVMS) is the resistance bet ween VM and VSS pin s under the set cond itions of
V1 = V2 = 3.5 V and S1:ON, S2:OFF.
7. CO Pin H Resistance, CO Pin L Resistance
(Test Condition 7, Test Circuit 4)
The CO pin H resistance (RCOH) is the resistance at the CO pin under the set conditions of V1 = V2 = 3.5 V, V4 = 6.5 V.
The CO pin L resistance (RCOL) is the resistance at the CO pin under the set conditions of V1 = V2 = 4.5 V, V4 = 0.5 V.
8. DO Pin H Resistance, DO Pin L Resistance
(Test Condition 8, Test Circuit 4)
The DO pin H resistance (RDOH) is the resistance at the DO pin under the set conditions of V1 = V2 = 3.5 V, V5 = 6.5 V.
The DO pin L resistance (RDOL) is the resistance at the DO pin under the set conditions of V1 = V2 = 1.8 V, V5 = 0.5 V.
9. Overcharge Detection Delay Time, Overdischarge Detection Dela y Time
(Test Condition 9, Test Circuit 2)
The overcharge detection delay time (tCU) is the time needed for VCO to change from “H” to “L” just after the voltage
V1 momentarily increases within 10 μs from overcharge detection voltage 1 (VCU1) − 0.2 V to overcharge detection
voltage 1 (VCU1) + 0.2 V under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V.
The overdischarge detection del ay time (tDL) is the time needed for VDO to change from “H” to “L” just after the voltage
V1 momentarily decreases within 10 μs from overdischarge detection voltage 1 (VDL1) + 0.2 V to overdischarge
detection voltage 1 (VDL1) − 0.2 V under the set condition of V1 = V2 = 3.5 V, V3 = 0 V.
10. Overcurrent Detection Delay Time 1, Overcurrent Detection Delay Time 2
(Test Condition 10, Test Circuit 2)
Overcurrent detection delay time 1 (tIOV1) is the time needed for VDO to go to “L” after the voltage V3 momentarily
increases within 10 μs from 0 V to VIOV1 + 0.1 V under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V.
Overcurrent detection delay time 2 (tIOV2) is the time needed for VDO to go to “L” after the voltage V3 momentarily
increases within 10 μs from 0 V to 2.0 V under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V.
11. 0 V Charge Starting Charger Voltage (Products in Which 0 V Charge Is Available)
(Test Condition 11, Test Circuit 2)
The 0 V charge starting charger voltage (V 0CHA) is defined as the voltage between the V DD pin and VM pin at which
VCO goes to “H” (VVM + 0.1 V or higher) when the voltage V3 is grad ually decreased fro m the starting condition of V1
= V2 = V3 = 0 V.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
10
12. 0 V Charge Inhibition Battery Voltage (Products in Which 0 V Charge Is Unavailable)
(Test Condition 12, Test Circuit 2)
The 0 V charge inhibition charger voltage (V0INH) is defined as the voltage bet ween the VDD pin and VSS pin at which
VCO goes to “H” (VVM + 0.1 V or higher) when the voltages V1 and V2 are gradually increased from the starting
condition of V1 = V2 = 0 V, V3 = −4 V.
CO
VM
DO
S-8242B Series
V3
VDD
VC
VSS
R1 = 100
Ω
V1
V2
C1 = 1
μ
F
V
V
Figure 5 Test circuit 1
CO
VM
DO
S-8242B Series
V3
VDD
VC
VSS
V1
V2
V
V
A
A
Figure 6 Test circuit 2
CO
VM
DO
S-8242B Series
S1
S2
VDD
VC
VSS V2
V1
A
A
A
Figure 7 Test circuit 3
CO
VM
DO
S-8242B Series
V4
VDD
VC
VSS
V1
V2
V5
A
A A
A
Figure 8 Test circuit 4
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 11
Operation
Remark Refer to “ Battery Protection IC Connection Example”.
1. Normal Status
This IC monitors the voltage of the battery connected between the VDD and VSS pins and the voltage difference
between the VM and VSS pins to control charging and discharging. When the battery voltage is in the range from
overdischarge detection voltage n (VDLn) to overcharge detection voltage n (VCUn), and the VM pin voltage is in the
range from the charger detection voltage (VCHA) to overcurrent detection voltage 1 (VIOV1), the IC turns both the
charging and discharging control FET s on. This condition is called the normal status, and in this condition charging
and discharging can be carried out freel y.
Caution When the battery is connected for the first time, d ischarging may not be enabled . In this case,
Short the VM pin and VSS pin, or
Set the VM pin’s voltage at the level of the charger detection voltage (VCHA) or more and the
overcurrent detection voltage 1 (VIOV1) or less by connecting the charger
The IC returns to the normal status.
2. Overcharge Status
When the battery voltage becomes higher than overcharge detection voltage n (VCUn) during charging in the normal
status and detection continues for the overcharge detection delay time (tCU) or longer, the S-8242B Series turns the
charging control FET of f to stop charging. This condit ion is called the overcharge status.
The overcharge status is rele ased in the following two cases ((1) and (2)).
(1) When the battery voltage fa lls bel o w overchar ge releas e voltage n (VCLn), the S-8242B Series turns the ch argi ng
control FET on and returns to the normal status.
(2) When a load is connected and discharging starts, the S-8242B Series turns the charging control FET on and
returns to the normal status. Just after the load is connected and discharging starts, the discharging current
flows through the parasitic dio de in the charging control FET. At this moment the VM pin potential bec omes Vf,
the voltage for the parasitic diode, higher than the VSS level. When the battery voltage goes under overcharge
detection voltage n (VCUn) and provided that the VM pin voltage is higher than overcurrent detection voltage 1,
the S-8242B Series releases the overcharge condition.
Caution 1. If the battery is charged to a voltage higher than overcharge detection voltage n (VCUn) and the
battery voltage does not fall below overcharge detection voltage n (VCUn) even when a heavy
load is connected, o vercurrent 1 and o vercurrent 2 do not function until th e battery voltage falls
below overcharge detection voltage n (VCUn). Since an actual battery has an internal imped ance
of tens of mΩ, the battery voltage drops immediately after a heavy load that causes o vercurrent
is connected, and overcurrent 1 and overcurrent 2 function.
2. When a charger is connected after overcharge detection, the overcharge status is not released
even if the battery voltage is below overcharge release voltage n (VCLn). The overcharge status
is released when the VM pin voltage goes over the charger detectio n voltage (VCHA) by removing
the charger.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
12
3. Overdischarge Status
When the battery voltage f alls below overdischarge det ection voltage n (V DLn) during discharging in t he normal status
and detection continues for the overdischarge detection delay time (tDL) or longer, the S-8242B Series turns the
discharging control FET off to stop discharging. This condition is called the overdischarge status. When the
discharging control FET is turned off, the VM pin voltage is pulled up by the resistor between the VM and VDD pins in
the IC (RVMD). When the voltage difference between the VM and VSS pins is 1.3 V (typ.) or higher, the current
consumption is reduced to the power-down current consumption (IPDN). This condition is called the power-down
status.
The power-down status is released when a charger is connected and the voltage difference between the VM and
VSS pins becomes 1.3 V (typ.) or lower. Moreover, when the battery voltage becomes overdischarge detection
voltage n (VDLn) or higher, the S-8242B Series turns t he discharging FET on and retur ns to the normal status.
4. Charger Detection
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is lower
than the charger detect ion voltage (VCHA), the overdisc harge hysteresis is rele ased via the charge detection funct ion;
therefore, the S-824 2B Series releases the overd ischarge status and turns the discharging contro l FET on when the
battery voltage becomes equal to or high er than overdischar ge detection voltag e n (VDLn) since the char ger detection
function works. This action is called charger detection.
When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is not
lower than the charger detection voltage (VCHA), the S-8242B Series releases the overdischarge status when the
battery voltage reaches overdischarge rel ease voltage n (VDUn) or higher.
5. Overcurrent Status
When a battery in the normal status is in the status where the voltage of the VM pin is equal to or higher than the
overcurrent detection v olta ge beca use th e di scharg e curr ent is higher than the specif ied v alu e a nd th e st atus last s for
the overcurrent det ection delay time, the disc harge control FET is turned of f and discharging is stopped. This status
is called the overcurrent st atus.
In the overcurrent status, the VM and VSS pins are shorted by the resistor between VM and VSS (RVMS) in the IC.
However, the voltag e of t he VM pin is at the VDD potent ial due t o the load as long as t he load is conn ected. When t he
load is disconnected, t he VM pin returns to the VSS potential.
This IC detects the st atus when the impeda nce bet ween the EB+ pin and EB− pin (Refer t o Figure 13) increases and
is equal to the impedance that enables automatic restoration and the voltage at the VM pin returns to overcurrent
detection voltage 1 (VIOV1) or lower and the overcurrent status is restored to the normal status.
Caution The impedance that enables automatic restoration varies depending on the battery voltage and the
set value of overcurrent detection voltage 1.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 13
6. 0 V Battery Charge Function
This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V
battery charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB+ and EB− pins by
connecting a charger, t he charging control FET gate is fixed to the VDD pin voltage.
When the voltage between the gat e and source of the charging control FET becomes equal to or higher than the turn-
on voltage due to the charger voltage, the charging control FET is turned on to start charging. At this time, the
discharging control FET is off and the charging current flows through the internal parasitic diode in the discharging
control FET. W hen the battery voltage be comes equal to or higher tha n overdischarge release voltage n (V DUn), the
S-8242B Series enters the no rmal status.
Caution Some battery providers do not recommend charging for a completely self-discharged battery.
Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge
function.
7. 0 V Battery Charge Inhibition Function
This function inhibits recharging when a battery that is intern ally short-circuited (0 V) is co nnected. When the bat tery
voltage (The voltag e between VDD and VSS pins) is the 0 V batt ery charge inhibiti on batter y voltage (V0INH) or lower,
the charging control FET gate is fixed to the EB− pin voltage to inhibit charging. W hen the battery voltage is the 0 V
battery charge inhibition battery voltage (V0INH) or higher, charging can be performed.
Caution Some battery providers do not recommend charging for a completely self-discharged battery.
Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge
function.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
14
8. Delay Circuit
The detection delay times are determined by dividing a clock of approximately 3.5 kHz by the counter.
Remark 1. The overcurrent detection delay time 2 (tIOV2) starts when the overcurrent detection voltage 1 (VIOV1) is
detected. When the overcurrent detection voltage 2 (VIOV2) is detected over the overcurrent detection
delay time 2 (tIOV2) after the detection of overcurrent detection voltage 1 (VIOV1), the S-8242B turns the
discharging control FET off within tIOV2 from the time of detecting VIOV2.
DO pin
VM pin
V
DD
V
DD
Time
V
IOV1
V
SS
V
SS
V
IOV2
Overcurrent detection delay ti me 2 (t
IOV2
)
Time
t
D
0
≤
t
D
≤ t
IOV2
Figure 9
2. When the overcurrent is detected and continues for longer than the overdischarge detection delay time
(tDL) without releasing the load, the condition changes to the power-down condition when the battery
voltage falls below the overdischarge detection voltage n (VDLn). When the battery voltage falls below
the overdischarge detection voltage n (VDLn) due to the overcurrent, the S-8242B Series turns the
discharging control FE T off by the overcurrent detect ion. In this case the recovery of the bat tery voltage
is so slow that if the battery voltage after the overdischarge detection delay time (tDL) is still lower than
the overdischarge detection voltage n (VDLn), the S-8242B Series shif ts to the power-do wn condition.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 15
Timing Chart
1. Overcharge Detection, Overdischarge Detection
(n= 1, 2)
V
CUn
V
DUn
V
DLn
V
CLn
Battery
voltage
V
SS
CO pin
voltage
V
DD
DO pin
voltage
V
SS
Charger connection
Load connection
Status
*
Overcharge detection
delay time(t
CU
) Overdischarge detection
delay time (t
DL
)
(1) (2) (1) (3) (1)
V
IOV1
V
SS
VM pin
voltage
V
DD
V
EB−
V
DD
V
CHA
V
EB−
*1. (1) : Normal status
(2) : Overcharge status
(3) : Overdischarge status
Remark The charger is assumed to charg e with a constant current.
Figure 10
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
16
2. Overcurrent Detection
V
CUn
V
DUn
V
DLn
(n= 1, 2)
V
CLn
Battery
voltage
V
DD
DO pin
voltage
V
SS
V
DD
V
SS
CO pin
voltage
V
DD
V
SS
VM pin
voltage
Charger
connection
Status
*1
Overcurrent detection
delay time 1 (t
IOV1
)
(1) (2) (1) (1)
Overcurrent detection
delay time 2 (t
IOV2
)
(2)
V
IOV2
V
IOV1
*1. (1) : Normal status
(2) : Overcurrent status
Remark The charger is assumed to charg e with a constant current.
Figure 11
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 17
3. Charger Detection
V
CUn
V
DUn
V
DLn
(n= 1, 2)
V
CLn
Battery
voltage
V
DD
DO pin
voltage
V
SS
V
DD
V
SS
CO pin
voltage
V
DD
V
SS
VM pin
voltage
V
CHA
Load connection
Status
*1
Overdischarge detection delay time (t
DL
)
(1) (1) (2)
Charger connection
VM pin voltage
<
V
CHA
Overdischarge detection (V
DL
)
*1. (1) : Normal status
(2) : Overdischarge status
Remark The charger is assumed to charg e with a constant current.
Figure 12
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
18
Battery Protection IC Connection Example
R1
Battery 1 C1
VSS DO
VDD
CO VM
S-8242B Series
FET1 FET2 EB
−
EB
+
R3
R2 VC
Battery 2
C2
Figure 13
Table 7 Constants for External Components
Symbol Parts Purpose Typ. Min. Max. Remark
FET1 N-channel
MOS FET Discharge control
⎯
⎯
⎯
Threshold voltage
≤
Overdischarge detect ion voltage
*2
Gate to source with standing voltage
≥
Charger voltage
*3
FET2 N-channel
MOS FET Charge control
⎯
⎯
⎯
Threshold voltage
≤
Overdischarge detect ion voltage
*2
Gate to source with standing voltage
≥
Charger voltage
*3
R1 Resistor
ESD protection,
For power fluctuation 100
Ω
10
Ω
*1
220
Ω
*1
Resistance should be as small as possible to avoid lowering
the overcharge det ection accuracy due to current
consumption.
*4
C1 Capacitor For power fluctuation 1
μ
F 0.47
μ
F
*1
10
μ
F
*1
Connect a capacitor of 0.47
μ
F or higher between VDD and
VSS.
*5
R2 Resistor
ESD protection,
For power fluctuation 1 k
Ω
300
Ω
*1
1 k
Ω
*1
⎯
C2 Capacitor For power fluctuation 0.1
μ
F 0.022
μ
F
*1
1.0
μ
F
*1
⎯
R3 Resistor
Protection for reverse
connection of a charger 2 k
Ω
300
Ω
4 k
Ω
Select as large a resistance as possible to p revent current
when a charger is connected in reverse.
*6
*1. Please set up a filter constant to be R2 × C2 ≥ 20 μF • Ω, and to be R1 × C1 = R2 × C2.
*2. If the threshold volt age of a FET is low, the FET may not cut the charging current .
If a FET with a threshold volta ge equal to or higher than the overdischarge detection voltage is used, discharging may be
stopped before overdischarge is detected.
*3. If the withstand ing voltage between the gate and source is lower than the charger voltage, t he FET may be destroyed.
*4. If R1 has a high resistance, the voltage between VDD and VSS may exceed the absolute maximum rating when a
charger is connected in revers e since the current flows from the charger to the IC.
Insert a resistor of 10 Ω or higher to R1 for ESD protection.
*5. If a capacitor of less than 0.47 μF is connected to C1, DO pin may oscillate when load short-circuiting is detected. Be
sure to connect a capacitor of 0.47 μF or higher to C1.
*6. If R3 has a resistance higher than 4 kΩ, the charging current may not be cut when a high-volt age charger is connected.
Caution 1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do not
guarantee proper operation. Perform through evaluation using the actual application to set the constant.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 19
Precautions
• The application cond itions for the input vol tage, output vo ltage, and load current should not exce ed the package power
dissipation.
• When connecting a battery and the protection circuit, the output voltage of the DO pin (VDO) may become “L” (initial
state). In this case,
Short the VM and VSS pins or,
Set the VM pin’s voltage at the level of the charger detection voltage (VCHA) or more and the overcurrent detection
voltage 1 (VIOV1) or less by connecting the ch arger
The output voltage of t he DO pin (VDO) is set to “H” (normal status).
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
20
Characteristics (Typical Data)
(1) Current consumption
1. IOPE − VDD 2. IOPE − Ta
IOPE [μA]
2
3
4
5 6
12
10
8
6
4
2
0 7
8
910
IOPE [μA]
−
40
−
25 025
50
75 85
12
10
8
6
4
2
0
V
DD [V] Ta [°C]
3. IPDN − VDD 4. IPDN − Ta
IPDN [μA]
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0 2
3
4
5
6
7
8
910
IPDN [μA]
−
40
−
25 025
50
75 85
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
V
DD [V]
Ta [°C]
(2) Overcharge detect ion/release voltage, overdischarge detect ion/release voltage, overcurrent det ection voltage, an d
delay time
1. VCU − Ta 2. VCL − Ta
VCU [V]
4.350
4.345
4.340
4.335
4.330
4.325
4.320
4.315
4.310
4.305
4.300
−40 −25 0 25 50 75 85
VCL [V]
−
40
−
25 025
50
75 85
4.125
4.115
4.105
4.095
4.085
4.075
4.065
4.055
4.045
4.035
4.025
Ta [°C]
Ta [°C]
3. VDU − Ta 4. VDL − Ta
VDU [V]
−40 −25 0 25 50 75 85
3.00
2.95
2.90
2.85
2.80
VDL [V]
−40 −25 025
50
75 85
2.25
2.24
2.23
2.22
2.21
2.20
2.19
2.18
2.17
2.16
2.15
Ta [°C]
Ta [°C]
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 21
5. tCU − Ta 6. tDL − Ta
tCU [s]
−40
−25
0
25
50
75 85
1.42
1.37
1.32
1.27
1.22
1.17
1.12
1.07
1.02
0.97
0.92
tDL [ms]
−40 −25 025
50
75 85
185
175
165
155
145
135
125
115
Ta [°C] Ta [°C]
7. VIOV1 − VDD 8. VIOV1 − Ta
VIOV1 [V]
0.225
0.220
0.215
0.210
0.205
0.200
0.195 4
5
7
8 96
VIOV1 [V]
−40 −25 0
25
50
75 85
0.225
0.220
0.215
0.210
0.205
0.200
0.195
V
DD [V] Ta [°C]
9. VIOV2 − VDD 10. VIOV2 − Ta
VIOV2 [V]
1.5
1.4
1.3
1.2
1.1
1.0
0.9 4
5
7
8 9
6
VIOV2 [V]
−40 −25 0
25
50
75 85
1.5
1.4
1.3
1.2
1.1
1.0
0.9
V
DD [V] Ta [°C]
11. tIOV1 − VDD 12. tIOV1 − Ta
tIOV1 [ms]
4 5 7 8 96
10.8
10.4
10.0
9.6
9.2
8.8
8.4
8.0
7.6
7.2
tIOV1 [ms]
−40 −25 025
50
75 85
10.8
10.4
10.0
9.6
9.2
8.8
8.4
8.0
7.6
7.2
V
DD [V] Ta [°C]
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
22
13. tIOV2 − VDD 14. tIOV2 − Ta
tIOV2 [ms]
0.38
0.36
0.34
0.32
0.30
0.28
0.26
0.24
0.22
4
5
7
8 96
tIOV2 [ms]
−40 −25 025 50 75 85
0.38
0.36
0.34
0.32
0.30
0.28
0.26
0.24
0.22
V
DD [V] Ta [°C]
(3) CO/DO pin
1. ICOH − VCO 2. ICOL − VCO
ICOH [mA]
0
1
3
4
5
2
6
0
−0.2
−0.4
−0.6
−0.8
−1.0
−1.2
−1.4
−1.6 7
ICOL [mA]
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
00 1 3
4
5
2 6
7 8 9
V
CO [V]
VCO [V]
3. IDOH − VDO 4. IDOL − VDO
IDOH [mA]
0
1
3
4
5
2
6
0
−0.2
−0.4
−0.6
−0.8
−1.0
−1.2
−1.4 7
IDOL [mA]
0.30
0.25
0.20
0.15
0.10
0.05
0013
2
V
DO [V] VDO [V]
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
Rev.2.1_00 S-8242B Series
Seiko Instruments Inc. 23
Marking Specifications
(1) SNT-8A
(1) Blank
(2) to (4) Product code (Refer to Product name vs. Product code)
(5), (6) Blank
(7) to (11) Lot number
SNT-8A
Top view
1
4
8
5
(9)
(6)
(2)
(10)
(7)
(3)
(11)
(8)
(4)
(5)
(1)
Product Name vs. Product Code Product Code
Product Name (2) (3) (4)
S-8242BAB-I8T1x Q N B
S-8242BAC-I8T1x Q N C
S-8242BAD-I8T1x Q N D
S-8242BAE-I8T1x Q N E
S-8242BAF-I8T1x Q N F
S-8242BAH-I8T1x Q N H
S-8242BAI-I8T1x Q N I
S-8242BAM-I8T1x Q N M
S-8242BAN-I8T1x Q N N
S-8242BAO-I8T1x Q N O
S-8242BAQ-I8T1x Q N Q
S-8242BAR-I8T1x Q N R
S-8242BAU-I8T1x Q N U
S-8242BAV-I8T1x Q N V
S-8242BAW-I8T1x Q N W
S-8242BAX-I8T1x Q N X
S-8242BAY-I8T1x Q N Y
S-8242BAZ-I8T1x Q N Z
S-8242BBA-I8T1x Q O A
S-8242BBB-I8T1x Q O B
S-8242BBC-I8T1x Q O C
S-8242BBD-I8T1x Q O D
S-8242BBF-I8T1x Q O F
S-8242BBI-I8T1x Q O I
Remark 1. Please contact our sales office for the products with detection voltage value other than those specified
above.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK
S-8242B Series Rev.2.1_00
Seiko Instruments Inc.
24
(2) 8-Pin TSSOP
(1) to (5): Product Name : S8242 (Fixed)
(6) to (8): Function Code
(refer to Product Name vs. Function Code)
(9) to (14): Lot number
8-Pin TSSOP
Top view
(
1
)
(
2
)
(
3
)
(
4
)
(
5
)
(
6
)
(
7
)
(
8
)
(
11
)
(
12
)
(
13
)
(
14
)
(
9
)
(
10
)
1
4
8
5
Product Name vs. Function Code Function Code
Product Name (6) (7) (8)
S-8242BAC-T8T1x B A C
S-8242BAH-T8T1x B A H
S-8242BAI-T8T1x B A I
S-8242BAP-T8T1x B A P
S-8242BAR-T8T1x B A R
S-8242BAU-T8T1x B A U
S-8242BAV-T8T1x B A V
S-8242BAW-T8T1x B A W
S-8242BAX-T8T1x B A X
S-8242BBE-T8T1x B B E
S-8242BBF-T8T1x B B F
S-8242BBG-T8T1x B B G
S-8242BBU-T8T1y B B U
S-8242BBV-T8T1y B B V
Remark 1. Please contact our sales office for the products with detection voltage value other than those specified
above.
2. x: G or U
3. y: S or U
4. Please select products of environmental code = U for Sn 100%, halogen-free products.
1.97±0.03
0.2±0.05
0.48±0.02
0.08
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.0
No. PH008-A-P-SD-2.0
0.5
+0.05
-0.02
123 4
56
78
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
PH008-A-C-SD-1.0
SNT-8A-A-Carrier Tape
No. PH008-A-C-SD-1.0
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5±0.1
2.25±0.05
0.65±0.05
0.25±0.05
2134
7865
5°
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
Enlarged drawing in the central part
QTY.
PH008-A-R-SD-1.0
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-Reel
No. PH008-A-R-SD-1.0
5,000
No.
TITLE
SCALE
UNIT mm
SNT-8A-A-Land Recommendation
Seiko Instruments Inc.
PH008-A-L-SD-3.0
0.3
0.20.3
0.20.3
0.52
2.01
0.52
No. PH008-A-L-SD-3.0
0.3 0.2
Caution Making the wire pattern under the package is possible. However, note that the package
may be upraised due to the thickness made by the silk screen printing and of a solder
resist on the pattern because this package does not have the standoff.
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
TSSOP8-E-PKG Dimensions
No. FT008-A-P-SD-1.1
FT008-A-P-SD-1.1
0.17±0.05
3.00 +0.3
-0.2
0.65
0.2±0.1
14
5
8
mm
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
ø1.55±0.05
2.0±0.05
8.0±0.1 ø1.55 +0.1
-0.05
(4.4)
0.3±0.05
1
45
8
4.0±0.1
Feed direction
TSSOP8-E-Carrier Tape
No. FT008-E-C-SD-1.0
FT008-E-C-SD-1.0
+0.4
-0.2
6.6
mm
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
Enlarged drawing in the central part
No. FT008-E-R-SD-1.0
2±0.5
ø13±0.5
ø21±0.8
13.4±1.0
17.5±1.0
3,000
QTY.
TSSOP8-E-Reel
FT008-E-R-SD-1.0
mm
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
Enlarged drawing in the central part
2±0.5
ø13±0.5
ø21±0.8
13.4±1.0
17.5±1.0
4,000
QTY.
TSSOP8-E-Reel
FT008-E-R-S1-1.0
mm
No. FT008-E-R-S1-1.0
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