1/23December 2004
■VO1 = 1.5, 1.8, 2.5, 2.8, 3.0, 3.3V FIXED
■VO2 = 1.5, 1.8, 2.5, 2.8, 3.0, 3. 3V FIXED OR
ADJUSTABLE FROM 1.2 5 T O VI - VDROP
■GUARANT EED OUTPUT1 CURRENT: 1A
■GUARANT EED OUTPUT2 CURRENT: 1A
■± 2% OUTPUT TOLERANCE (AT 25°C)
■± 3% OUTPUT TOLERANCE OVER TEMP.
■TYPICAL DROPOUT 1.1V (IO1 = IO2 = 1A)
■INTERNAL POWER AND THERMAL LIMIT
■STABLE WITH LOW ESR OUTPUT
CAPACITOR
■OPERATING TEMPERATURE RANGE:
0°C TO 125°C
■VERY LOW QUIESCENT CURRENT: 7mA
MAX OVER TEMP.
■AVAILABLE IN SPAK AND IN DFN 5x6mm
PACKAGE
DESCRIPTION
Specifically designed for data storage
applications, this device integrates two voltage
regulators, each one able to supply 1A and it is
assembled in SPAK and in a new 8-PIN surface
moun ting package na med DFN 5x6mm at 8 pins.
The fi rst regulator block supplies 1.5V, 1.8V, 2. 5V,
2.8V, 3.0V, 3.3V depending on the chosen
version. The second one may be fixed to the same
values or adjustable from 1.25V to VI - V DROP that
could power several kind of different
micro-cont rollers. Both outputs are current limited
and over temperature protected. It is worth
underlin ing the v ery good thermal perf orman ce of
the packages SPAK and DFN with only 2°C/W of
Thermal Resistance Junction to Case.
Applications are HARD DISK, CD/DVD-ROM, CD/
DVD-R/RW, COMB O (DVD-ROM+CD-R/RW).
ST2L05
VERY LOW QUIESCENT CURRENT
DUAL VOLTAGE REGULATO R
Figur e 1: Block Diagram Of Fixed/adj Version
DFNSPAK-5L
Rev. 6
ST2L05
2/23
Figur e 2: Block Diagram Of Fixed/fixed Versi on
ST2L05
3/23
Table 1: Order Codes
(* ) A vailable on reque st .
(1) Fo r T ube Shipm ent, change "R " wi th "-" in t he relevant order i ng code, DF N i s ava i l abl e on l y in Tape & Reel.
VO1 VO2 SPAK DFN SHIPMENT (1)
1.5 V 1.5 V ST2L05R1515K5 (*) ST2L05R1515PS (*) Tape & Reel
1.5 V 1.8 V ST2L05R1518K5 (*) ST2L05R1518PS (*) Tape & Reel
1.5 V 2.5 V ST2L05R1525K5 (*) ST2L05R1525PS (*) Tape & Reel
1.5 V 2.8 V ST2L05R1528K5 (*) ST2L05R1528PS (*) Tape & Reel
1.5 V 3.0 V ST2L05R1530K5 (*) ST2L05R1530PS (*) Tape & Reel
1.5 V 3.3 V ST2L05R1533K5 (*) ST2L05R1533PS (*) Tape & Reel
1.5 V ADJ ST2L05R1500K5 (*) ST2L05R1500PS (*) Tape & Reel
1.8 V 1.5 V ST2L05R1815K5 (*) ST2L05R1815PS (*) Tape & Reel
1.8 V 1.8 V ST2L05R1818K5 (*) ST2L05R1818PS (*) Tape & Reel
1.8 V 2.5 V ST2L05R1825K5 (*) ST2L05R1825PS (*) Tape & Reel
1.8 V 2.8 V ST2L05R1828K5 (*) ST2L05R1828PS (*) Tape & Reel
1.8 V 3.0 V ST2L05R1830K5 (*) ST2L05R1830PS (*) Tape & Reel
1.8 V 3.3 V ST2L05R1833K5 (*) ST2L05R1833PS (*) Tape & Reel
1.8 V ADJ ST2L05R1800K5 (*) ST2L05R1800PS (*) Tape & Reel
2.5 V 1.5 V ST2L05R2515K5 (*) ST2L05R2515PS (*) Tape & Reel
2.5 V 1.8 V ST2L05R2518K5 (*) ST2L05R2518PS (*) Tape & Reel
2.5 V 2.5 V ST2L05R2525K5 (*) ST2L05R2525PS (*) Tape & Reel
2.5 V 2.8 V ST2L05R2528K5 (*) ST2L05R2528PS (*) Tape & Reel
2.5 V 3.0 V ST2L05R2530K5 (*) ST2L05R2530PS (*) Tape & Reel
2.5 V 3.3 V ST2L05R2533K5 (*) ST2L05R2533PS (*) Tape & Reel
2.5 V ADJ ST2L05R2500K5 (*) ST2L05R2500PS (*) Tape & Reel
2.8 V 1.5 V ST2L05R2815K5 (*) ST2L05R2815PS (*) Tape & Reel
2.8 V 1.8 V ST2L05R2818K5 (*) ST2L05R2818PS (*) Tape & Reel
2.8 V 2.5 V ST2L05R2825K5 (*) ST2L05R2825PS (*) Tape & Reel
2.8 V 2.8 V ST2L05R2828K5 (*) ST2L05R2828PS (*) Tape & Reel
2.8 V 3.0 V ST2L05R2830K5 (*) ST2L05R2830PS (*) Tape & Reel
2.8 V 3.3 V ST2L05R2833K5 (*) ST2L05R2833PS (*) Tape & Reel
2.8 V ADJ ST2L05R2800K5 (*) ST2L05R2800PS (*) Tape & Reel
3.0 V 1.5 V ST2L05R3015K5 (*) ST2L05R3015PS (*) Tape & Reel
3.0 V 1.8 V ST2L05R3018K5 (*) ST2L05R3018PS (*) Tape & Reel
3.0 V 2.5 V ST2L05R3025K5 (*) ST2L05R3025PS (*) Tape & Reel
3.0 V 2.8 V ST2L05R3028K5 (*) ST2L05R3028PS (*) Tape & Reel
3.0 V 3.0 V ST2L05R3030K5 (*) ST2L05R3030PS (*) Tape & Reel
3.0 V 3.3 V ST2L05R3033K5 (*) ST2L05R3033PS (*) Tape & Reel
3.0 V ADJ ST2L05R3000K5 (*) ST2L05R3000PS (*) Tape & Reel
3.3 V 1.5 V ST2L05R3315K5 (*) ST2L05R3315PS (*) Tape & Reel
3.3 V 1.8 V ST2L05R3318K5 (*) ST2L05R3318PS (*) Tape & Reel
3.3 V 2.5 V ST2L05R3325K5 (*) ST2L05R3325PS Tape & Reel
3.3 V 2.8 V ST2L05R3328K5 (*) ST2L05R3328PS (*) Tape & Reel
3.3 V 3.0 V ST2L05R3330K5 (*) ST2L05R3330PS (*) Tape & Reel
3.3 V 3.3 V ST2L05R3333K5 (*) ST2L05R3333PS (*) Tape & Reel
3.3 V ADJ ST2L05R3300K5 ST2L05R3300PS Tape & Reel
ST2L05
4/23
Table 2: Absolute Maximum Ratings
(* ) S torage t em peratu res > 125°C are onl y acc eptable i f the Dual Regulator is soldered to a PCBA.
Absolut e M aximum Rat i ngs are th ose beyon d whi ch dam age to the device m ay occ ur. Functi onal ope ration under thes e condition is not im-
plied.
Table 3: Recommen ded Operating Conditions
Table 4: Therm al Data
Fi gure 3: Pin Connection (top view for SPAK, top through view for DFN8)
Table 5: Pin Descrip tion
Symbol Parameter Value Unit
VIOperating Input Voltage 10 V
PDPower Dissipation Internally Limited
IOSH Short Circuit Output Current - 3.3 V and adjustable output Internally Limited
Top Operating Junction Temperature Range 0 to 150 °C
Tstg Storage Temperature Range(*) -65 to 150 °C
TLEAD Lead Temperature (Soldering) 10 Sec. 260 °C
Symbol Parameter Value Unit
VIInput Voltage 4.5 to 7 V
∆VIInput Voltage Ripple ± 0.15 V
tRISE Input Voltage Rise Time (from 10% to 90%) ≥ 1 µsec
tFALL Input Voltage Fall Time (from 10% to 90%) ≥ 1 µsec
Symbol Parameter SPAK DFN Unit
Rthj-case Thermal Resistance Junction-case 22°C/W
Rthj-amb Thermal Resistance Junction-ambient 26 36 °C/W
SPAK DFN Symbol Name and Function
13V
IBypass with a 4.7µF capacitor to GND
2 4 ADJ/N.C. Resistor divider connection/Not Connected
3 8 GND Ground
45V
O2 Adjustable output voltage: bypass with a 4.7µF capacitor to GND
57V
O1 Fixed output voltage: bypass with a 4.7µF capacitor to GND
1, 2, 6 NC Not Connected
DFN8SPAK
ST2L05
5/23
Figure 4: Application Circuit Of Fixed/fixed Version
Figure 5: Application Circuit Of Fixed/adj Ve rsion
NOT E: The regulator is des ig n ed to be stable wit h ei ther tantalum or ce ramic ca pacitors on the input and out puts. Th e expect ed values of
the in put and output X7R ceramic capacit ors are fr om 4. 7µF to 22µF w i th 4.7µF ty pi cal. The i nput cap acitor must be connect ed within 0.5
inches of the VI terminal. The output capacitors must also be connected wit hin 0.5 i nches of output pins V O1 and VO2. There is no upper limit
to the size of the input capacitor (for more details see the Application Hi nts section).
NOT E : In t h e F i x e d/ADJ ve r s i o n, t h e adjust able ou t put vol tage VO2 is des i gned to sup port output volta ges from 1. 25V to VI - VDROP. The
adj ustable out put vol t a ge VO2 is set by a resistor di vi der con nected be tw een VO2 (pin 4) and Ground (pin 3) with its centre tap connec te d to
VO2 ADJ (pi n2). The voltage divi der resistors are: R1 conne ct ed to VO2 an d V O2 ADJ and R2 connect ed to VO2 ADJ and GN D. VO2 is deter-
mined by VREF, R 1, R2, and IADJ as follows (for m ore details see t he Applic at i on Hints sec tion):
VO2 = VREF (1+R1/R2) + IADJR1
ST2L05
6/23
Table 6: Output1 And Ou tput2 Dual Sp ecification (IO = 10mA t o 1A, TJ = 0 t o 125°C, VI = 4.5V to 7V,
CI = 4. 7µ F, CO1 = CO2 = 4.7µF, otherwise specified)
Table 7: Electrical Character istics Of Fixed Output 1.5V (IO = 10mA to 1A, TJ = 0 to 125°C,
VI = 4.5V to 7V, CI = 4.7µF, CO1 = CO2 = 4.7µF , otherwise specified)
NOT E 1: Bandwidth of 10 Hz t o 10KHz .
NO TE 2: 120 Hz inpu t ripple.
NOTE 3: CI = 20µF, C1 and CO2 = 10µF. CI, CO1 and CO2 are a l l X7R cera m ic capacitors.
NOT E 4: Guaranteed by de si gn, not tes ted in productio n.
NOT E 5: % undershoot or overshoot of VO.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
IGND Quiescent Current (Fixed/ADJ) VI ≤ 7V IOUT1,2 = 5mA to 1A 5 mA
IGND Quiescent Current (Fixed/Fixed) VI ≤ 7V IOUT1,2 = 5mA to 1A 7 mA
IST Total Current Limit IO1 + IO2 2A
TSHDN Thermal Shutdown 175 °C
DTSHDN Thermal Shutdown Hysteresis 5 °C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VOOutput Voltage 1.5V IO = 5mA to 1A, VI = 4.75 to 5.25V
T = 25°C 1.47 1.5 1.53 V
VOOutput Voltage 1.5V IO = 5mA to 1A, VI = 4.75 to 5.25V 1.455 1.5 1.545 V
∆VOLine Regulation VI = 4.75 to 5.25V, IO = 5mA to 1A 15 mV
∆VOLoad Regulation VI = 4.75V, IO = 10mA to 1A 12 mV
VDDropout Voltage ∆VO = -1% IO = 1A 1.3 V
ISCurrent Limit VI = 5.5V 1 A
IOMIN Min. Output Current for
regulation 0mA
eNRMS Output Noise (1)(4) T = 25°C 0.003 %
SVR Supply Voltage
Rejection (2)(4) VI = 5V 60 dB
∆VO/∆IOT ransient Response
Change of VO with step
load change(3)(4)
VI = 5V, IO = 1mA to 1A, tr ≥ 1µs 10(5) %
VI = 5V, IO = 1A to 1mA, tf ≥ 1µs 10(5)
∆VO1/∆VITransient Response
Change of VOUT1 with
application of VI (3)(4)
0 to 5V step input, IO = 1mA to 1A,
tr ≥ 1µs 10(5) %
∆VO/∆IOTransient Response Short
Circuit Removal
Response (3)(4)
VI = 5V, IO = short to IO = 10mA 20(5) %
TRThermal Regulation (4) IO = 1A, tPULSE = 30ms 0.1 %/W
STemperature Stability (4) 0.5 %
SLong Term Stability (4)
(1000Hrs) TJ = 125°C 0.3 %
ST2L05
7/23
Table 8: Electrical Character istics Of Fixed Output 1.8V (IO = 10mA to 1A, TJ = 0 to 125°C,
VI = 4.5V to 7V, CI = 4.7µF, CO1 = CO2 = 4.7µF , otherwise specified)
NOT E 1: Bandwidth of 10 Hz t o 10KHz .
NO TE 2: 120 Hz inpu t ripple.
NOTE 3: CI = 20µF, C1 and CO2 = 10µF. CI, CO1 and CO2 are a l l X7R cera m ic capacitors.
NOT E 4: Guaranteed by de si gn, not tes ted in productio n.
NOT E 5: % undershoot or overshoot of VO.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VOOutput Voltage 1.8V IO = 5mA to 1A, VI = 4.75 to 5.25V
T = 25°C 1.764 1.8 1.836 V
VOOutput Voltage 1.8V IO = 5mA to 1A, VI = 4.75 to 5.25V 1.746 1.8 1.854 V
∆VOLine Regulation VI = 4.75 to 5.25V, IO = 5mA to 1A 15 mV
∆VOLoad Regulation VI = 4.75V, IO = 10mA to 1A 12 mV
VDDropout Voltage ∆VO = -1% IO = 1A 1.3 V
ISCurrent Limit VI = 5.5V 1 A
IOMIN Min. Output Current for
regulation 0mA
eNRMS Output Noise (1)(4) T = 25°C 0.003 %
SVR Supply Voltage
Rejection (2)(4) VI = 5V 60 dB
∆VO/∆IOT ransient Response
Change of VO with step
load change(3)(4)
VI = 5V, IO = 1mA to 1A, tr ≥ 1µs 10(5) %
VI = 5V, IO = 1A to 1mA, tf ≥ 1µs 10(5)
∆VO1/∆VITransient Response
Change of VOUT1 with
application of VI (3)(4)
0 to 5V step input, IO = 1mA to 1A,
tr ≥ 1µs 10(5) %
∆VO/∆IOTransient Response Short
Circuit Removal
Response (3)(4)
VI = 5V, IO = short to IO = 10mA 20(5) %
TRThermal Regulation (4) IO = 1A, tPULSE = 30ms 0.1 %/W
STemperature Stability (4) 0.5 %
SLong Term Stability (4)
(1000Hrs) TJ = 125°C 0.3 %
ST2L05
8/23
Table 9: Electrical Character istics Of Fixed Output 2.5V (IO = 10mA to 1A, TJ = 0 to 125°C,
VI = 4.5V to 7V, CI = 4.7µF, CO1 = CO2 = 4. 7µF , otherwise specified)
NOT E 1: Bandwidth of 10 Hz t o 10KHz .
NO TE 2: 120 Hz inpu t ripple.
NOTE 3: CI = 20µF, C1 and CO2 = 10µF. CI, CO1 and CO2 are a l l X7R cera m ic capacitors.
NOT E 4: Guaranteed by de si gn, not tes ted in productio n.
NOT E 5: % undershoot or overshoot of VO.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VOOutput Voltage 2.5V IO = 5mA to 1A, VI = 4.75 to 5.25V
T = 25°C 2.45 2.5 2.55 V
VOOutput Voltage 2.5V IO = 5mA to 1A, VI = 4.75 to 5.25V 2.425 2.5 2.575 V
∆VOLine Regulation VI = 4.75 to 5.25V, IO = 5mA to 1A 15 mV
∆VOLoad Regulation VI = 4.75V, IO = 10mA to 1A 12 mV
VDDropout Voltage ∆VO = -1% IO = 1A 1.3 V
ISCurrent Limit VI = 5.5V 1 A
IOMIN Min. Output Current for
regulation 0mA
eNRMS Output Noise (1)(4) T = 25°C 0.003 %
SVR Supply Voltage
Rejection (2)(4) VI = 5V 60 dB
∆VO/∆IOT ransient Response
Change of VO with step
load change(3)(4)
VI = 5V, IO = 1mA to 1A, tr ≥ 1µs 10(5) %
VI = 5V, IO = 1A to 1mA, tf ≥ 1µs 10(5)
∆VO1/∆VITransient Response
Change of VOUT1 with
application of VI (3)(4)
0 to 5V step input, IO= 1mA to 1A,
tr ≥ 1µs 10(5) %
∆VO/∆IOTransient Response Short
Circuit Removal
Response (3)(4)
VI = 5V, IO = short to IO = 10mA 20(5) %
TRThermal Regulation (4) IO = 1A, tPULSE = 30ms 0.1 %/W
STemperature Stability (4) 0.5 %
SLong Term Stability (4)
(1000Hrs) TJ = 125°C 0.3 %
ST2L05
9/23
Table 10: Electrical Characte ristics Of Fixed Output 2.8V (IO = 10mA to 1A , TJ = 0 t o 125°C,
VI = 4.5V to 7V, CI = 4.7µF, CO1 = CO2 = 4.7µF , otherwise specified)
NOT E 1: Bandwidth of 10 Hz t o 10KHz .
NO TE 2: 120 Hz inpu t ripple.
NOTE 3: CI = 20µF, C1 and CO2 = 10µF. CI, CO1 and CO2 are a l l X7R cera m ic capacitors.
NOT E 4: Guaranteed by de si gn, not tes ted in productio n.
NOT E 5: % undershoot or overshoot of VO.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VOOutput Voltage 2.8V IO = 5mA to 1A, VI = 4.75 to 5.25V
T = 25°C 2.744 2.8 2.856 V
VOOutput Voltage 2.8V IO = 5mA to 1A, VI = 4.75 to 5.25V 2.716 2.8 2.884 V
∆VOLine Regulation VI = 4.75 to 5.25V, IO = 5mA to 1A 15 mV
∆VOLoad Regulation VI = 4.75V, IO = 10mA to 1A 12 mV
VDDropout Voltage ∆VO = -1% IO = 1A 1.3 V
ISCurrent Limit VI = 5.5V 1 A
IOMIN Min. Output Current for
regulation 0mA
eNRMS Output Noise (1)(4) T = 25°C 0.003 %
SVR Supply Voltage
Rejection (2)(4) VI = 5V 60 dB
∆VO/∆IOT ransient Response
Change of VO with step
load change(3)(4)
VI = 5V, IO = 1mA to 1A, tr ≥ 1µs 10(5) %
VI = 5V, IO = 1A to 1mA, tf ≥ 1µs 10(5)
∆VO1/∆VITransient Response
Change of VOUT1 with
application of VI (3)(4)
0 to 5V step input, IO= 1mA to 1A,
tr ≥ 1µs 10(5) %
∆VO/∆IOTransient Response Short
Circuit Removal
Response (3)(4)
VI = 5V, IO = short to IO = 10mA 20(5) %
TRThermal Regulation (4) IO = 1A, tPULSE = 30ms 0.1 %/W
STemperature Stability (4) 0.5 %
SLong Term Stability (4)
(1000Hrs) TJ = 125°C 0.3 %
ST2L05
10/23
Table 11: Electrical Characte ristics Of Fixed Output 3.0V (IO = 10mA to 1A , TJ = 0 t o 125°C,
VI = 4.5V to 7V, CI = 4.7µF, CO1 = CO2 = 4.7µF , otherwise specified)
NOT E 1: Bandwidth of 10 Hz t o 10KHz .
NO TE 2: 120 Hz inpu t ripple.
NOTE 3: CI = 20µF, C1 and CO2 = 10µF. CI, CO1 and CO2 are a l l X7R cera m ic capacitors.
NOT E 4: Guaranteed by de si gn, not tes ted in productio n.
NOT E 5: % undershoot or overshoot of VO.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VOOutput Voltage 3.0V IO = 5mA to 1A, VI = 4.75 to 5.25V
T = 25°C 2.94 3.0 3.06 V
VOOutput Voltage 3.0V IO = 5mA to 1A, VI = 4.75 to 5.25V 2.91 3.0 3.09 V
∆VOLine Regulation VI = 4.75 to 5.25V, IO = 5mA to 1A 15 mV
∆VOLoad Regulation VI = 4.75V, IO = 10mA to 1A 12 mV
VDDropout Voltage ∆VO = -1% IO = 1A 1.3 V
ISCurrent Limit VI = 5.5V 1 A
IOMIN Min. Output Current for
regulation 0mA
eNRMS Output Noise (1)(4) T = 25°C 0.003 %
SVR Supply Voltage
Rejection (2)(4) VI = 5V 60 dB
∆VO/∆IOT ransient Response
Change of VO with step
load change(3)(4)
VI = 5V, IO = 1mA to 1A, tr ≥ 1µs 10(5) %
VI = 5V, IO = 1A to 1mA, tf ≥ 1µs 10(5)
∆VO1/∆VITransient Response
Change of VOUT1 with
application of VI (3)(4)
0 to 5V step input, IO= 1mA to 1A,
tr ≥ 1µs 10(5) %
∆VO/∆IOTransient Response Short
Circuit Removal
Response (3)(4)
VI = 5V, IO = short to IO = 10mA 20(5) %
TRThermal Regulation (4) IO = 1A, tPULSE = 30ms 0.1 %/W
STemperature Stability (4) 0.5 %
SLong Term Stability (4)
(1000Hrs) TJ = 125°C 0.3 %
ST2L05
11/23
Table 12: Electrical Characte ristics Of Fixed Output 3.3V (IO = 10mA to 1A , TJ = 0 t o 125°C,
VI = 4.5V to 7V, CI = 4.7µF, CO1 = CO2 = 4.7µF , otherwise specified)
NOT E 1: Bandwidth of 10 Hz t o 10KHz .
NO TE 2: 120 Hz inpu t ripple.
NOTE 3: CI = 20µF, C1 and CO2 = 10µF. CI, CO1 and CO2 are a l l X7R cera m ic capacitors.
NOT E 4: Guaranteed by de si gn, not tes ted in productio n.
NOT E 5: % undershoot or overshoot of VO.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VOOutput Voltage 3.3V IO = 5mA to 1A, VI = 4.75 to 5.25V
T = 25°C 3.234 3.3 3.366 V
VOOutput Voltage 3.3V IO = 5mA to 1A, VI = 4.75 to 5.25V 3.2 3.3 3.4 V
∆VOLine Regulation VI = 4.75 to 5.25V, IO = 5mA to 1A 15 mV
∆VOLoad Regulation VI = 4.75V, IO = 10mA to 1A 12 mV
VDDropout Voltage ∆VO = -1% IO = 1A 1.3 V
ISCurrent Limit VI = 5.5V 1 A
IOMIN Min. Output Current for
regulation 0mA
eNRMS Output Noise (1)(4) T = 25°C 0.003 %
SVR Supply Voltage
Rejection (2)(4) VI = 5V 60 dB
∆VO/∆IOT ransient Response
Change of VO with step
load change(3)(4)
VI = 5V, IO = 1mA to 1A, tr ≥ 1µs 10(5) %
VI = 5V, IO = 1A to 1mA, tf ≥ 1µs 10(5)
∆VO1/∆VITransient Response
Change of VOUT1 with
application of VI (3)(4)
0 to 5V step input, IO= 1mA to 1A,
tr ≥ 1µs 10(5) %
∆VO/∆IOTransient Response Short
Circuit Removal
Response (3)(4)
VI = 5V, IO = short to IO = 10mA 20(5) %
TRThermal Regulation (4) IO = 1A, tPULSE = 30ms 0.1 %/W
STemperature Stability (4) 0.5 %
SLong Term Stability (4)
(1000Hrs) TJ = 125°C 0.3 %
ST2L05
12/23
Table 13: Electrical Characteristics Of Adjustable Output (IO = 10mA to 1A, TJ = 0 to 125°C,
VI = 4.5V to 7V, CI = 4.7µF, CO1 = CO2 = 4.7µF , otherwise specified)
NOT E 1: Bandwidth of 10 Hz t o 10KHz .
NO TE 2: 120 Hz inpu t ripple.
NOTE 3: CI = 20µF, C1 and CO2 = 10µF. CI, CO1 and CO2 are a l l X7R cera m ic capacitors.
NOT E 4: Guaranteed by de si gn, not tes ted in productio n.
NOT E 5: % undershoot or overshoot of VO.
APPLICATION HINTS
EXTERNAL CAPACITORS
Like any low-dropout regulator, the ST2L05 requires external capacitors for stability. We suggest
soldering both ca pacitor s as close as possible to the relative pins (1, 4 and 5).
INPUT CAPACITOR
An input capacitor, whose value is, at least , 2.2µF is requir ed; t he amount of the input c apacitance can be
increased wi thout limit if a good qual ity tantalum or aluminium capacitor is used.SMD X7R or Y5V ceramic
mult ilayer c apacitors could not ensure sta bility i n any condition b ecaus e of their varia ble c haracteristics
with Frequency and Temperature; the use of this capacitor is strictly related to the use of the output
capacitors. For more details read the “OUTPUT CAPACITOR SECTION”.The input capacitor must be
located at a dist ance of not more than 0.5" from the input pin of the device and returned to a clean analog
ground.
OUTPUT CAPACITOR
The ST 2L05 is designed specificall y to work with Ceramic and Tantalum capacitors.Special care must be
taken when a Cerami c multilayer capacitor is used.Due to their characteristics they can sometimes hav e
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VOReference Voltage IO = 5mA to 1A, VI = 4.75 to 5.25V,
T = 25°C 1.225 1.25 1.275 V
VOReference Voltage IO = 5mA to 1A, VI = 4.75 to 5.25V 1.212 1.25 1.287 V
∆VO2 Line Regulation 2 VI = 4.75 to 5.25V, IO = 5mA to 1A 0.35 %
∆VO2 Load Regulation 2 VI = 4.75V, IO = 10mA to 1A 0.4 %
VDDropout Voltage ∆VO = -1% IO = 1A 1.3 V
ISCurrent Limit VI = 5.5V 1 A
IADJ Adjustable Current (sinking) 1 µA
I∆ADJ Adjustable Current Change IO = 10mA to 1A 200 nA
IOMIN Min. Output Current for
regulation 2mA
eNRMS Output Noise (1)(4) T = 25°C 0.003 %
SVR Supply Voltage
Rejection (2)(4) VI = 5V 60 dB
∆VO2/∆IO2 Transient Response
Change of VO1 with step
load change(3)(4)
VI = 5V, IO = 1mA to 1A, tr ≥ 1µs 10(5) %
VI = 5V, IO = 1A to 1mA, tf ≥ 1µs 10(5)
∆VO2/∆VITransient Response
Change of VOUT1 with
application of VI (3)(4)
0 to 5V step input, IO= 1mA to 1A,
tr ≥ 1µs 10(5) %
∆VO2/∆IO2 Transient Response Short
Circuit Removal
Response (3)(4)
VI = 5V, IO = short to IO = 10mA 20(5) %
TRThermal Regulation (4) IO = 1A, tPULSE = 30ms 0.1 %/W
STemperature Stability (4) 0.5 %
SLong Term Stability (4)
(1000Hrs) TJ = 125°C 0.3 %
ST2L05
13/23
an ESR value lower than the minimum requi red by the ST2L05 and their relatively large capacitance can
change a lot depending on the ambient temperature.The test results of the ST2L05 stability using
multilayer ceramic capacitors show that a minimum value of 2.2µF is needed for both regulators. This
value can be i ncreased without limit i f the input capacitor value is maj or or equal to 4.7µF, and up to 10µF
if the input capacitor is minor than 4.7µF.Surface-mountable solid tantalum capacitors offer a good
combination of small physical size for the capacitance value and ESR in the range needed by the ST2L05.
The test results show good stability for both outputs with values of at least 1µF. The value can be
increas ed without limit for even better performan ce such as transient response and noise.
IMPORTANT:
The output capacitor must maintain its ESR in the stable region over the full operating temperature to
assure st ability. More over, capacitor tolerance an d variations due to tem perature must be cons idered to
assure that the m inimum amount of capacitance is provided at al l t imes. For this reason, when a Ceramic
multilayer capacitor i s used, the better choice for temperature coefficient is the X7R type, which holds the
capacit ance within ±15%. The output capaci tor should be located not more t han 0.5" from the output pins
of the device and returned to a clean analog ground.
ADJUST ABL E REGUL AT OR
The ST 2L05 has a 1.25V reference voltage between the output and the adjust pins (respectively pin 4 and
2). When a resistor R1 is place d between t hese two terminal s, a con stant current flows through R1 and
down to R2 to set the overall (VO2 to GND) output voltage. Minimum load current is 2mA max in all
temperature conditions.
Fi gure 6: Application Cir cuit
VO = VREF(1+R1/R2)+IADJR1
IADJ is very small (typically 35µA) and constant: i n the VO calculat ion it can be ignored.
ST2L05
14/23
TYPICA L CHARACTERISTICS
Fi gure 7: Reference Voltage vs Temperature
Fi gure 8: Reference Line Regulation vs
Temperature
Fi gure 9: Reference Load Regulation vs
Temperature
Fi gure 10: Reference Vo ltage vs Input Voltage
Fi gure 11: Dropou t Voltage vs Temperature
(Adjustable Output)
Fi gure 12: Dropou t Voltage vs Input Voltage
(Adjustable Output)
ST2L05
15/23
Fi gure 13: Minimum Load Current vs
Temperature (Adjustable Output)
Fi gure 14: Adjust Pin Current vs Temperature
(Adjustable Output)
Fi gure 15: Ou tput Volta ge vs Temperature
Fi gure 16: Line Regulation vs Temperature
Fi gure 17: Load Regulation vs Temperature
Fi gure 18: Ou tput Vo ltage vs Input Voltage
ST2L05
16/23
Fi gure 19: Dropou t Voltage vs Temperature
(Fixed Output )
Fi gure 20: Dropou t Voltage vs Input Voltage
Fi gure 21: Supply V oltage Rejection vs
Temperature
Fi gure 22: Suppl y Voltage Rejection vs
Frequency
Fi gure 23: Qu iescent Current vs Temperature
(Fixed/AD J Version)
Fi gure 24: Qu iescent Current vs Temperature
(Fixed/Fixed Version)
ST2L05
17/23
Fi gure 25: Short Circuit Removal Response
Fi gure 26: Change of VO with Step Load
Change
Fi gure 27: Change of VO with Step Load
Change
Fi gure 28: Change of VO with Step Load
Change
Fi gure 29: Short Circuit Removal Response
Fi gure 30: Change of VO with Step Load
Change
VI=5V, IO=short circuit to 10mA, CO=10µF, CI=22µF all cera mi c
X5R, TJ=25°C
VI=5V, IO=1mA to 1A, CO=10µF, CI=22µF all ceramic X5R,
TJ=25°C
VI=5V, IO=1mA to 1A, CO=10µF, CI=22µF all ceramic X5R,
TJ=25°C, tRISE=1µs
VI=5V, IO=1A to 1mA, CO=10µF, CI=22µF all ceramic X5R,
TJ=25°C, tFALL=1µs
VI=5V, IO=short circuit to 10mA, CO=10µF, CI=22µF all cera mi c
X5R, TJ=25°C
VI=5V, IO=1mA to 1A, CO=10µF, CI=22µF all ceramic X5R,
TJ=25°C, tRISE=1µs
ST2L05
18/23
Fi gure 31: Change of VO with Step Load
Change
Fi gure 32: Change of VO with Step Load
Change
Fi gure 33: Start-Up Transient
Fi gure 34: Start-Up Transient
VI=5V, IO=1mA to 1A, CO=10µF, CI=22µF all ceramic X5R,
TJ=25°C, tRISE=tFALL=1µs
VI=5V, IO=1A to 1mA, CO=10µF, CI=22µF all ceramic X5R,
TJ=25°C, tFALL=1µs
VI=0 to 5V, IO=1mA, CO=10µF, CI=22µF all ceramic X5R, TJ=25°C,
tRISE ≤ 1µs
VI=0 to 5V, IO=1 A , CO=10µF, CI=22µF all ceramic X5R, TJ=25°C,
tRISE ≤ 1µs
ST2L05
19/23
DIM. mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 1.78 2.03 0.070 0.080
A2 0.03 0.13 0.001 0.005
C 0.25 0.010
C1 0.25 0.010
D 1.02 1.27 0.040 0.050
D1 7.87 8.13 0.310 0.320
F 0.63 0.79 0.025 0.031
G 1.69 0.067
G1 6.8 0.268
H1 5.59 0.220
H2 9.27 9.52 0.365 0.375
H3 8.89 9.14 0.350 0.360
L 10.41 10.67 0.410 0.420
L1 7.49 0.295
L2 8.89 9.14 0.350 0.360
M 0.79 1.04 0.031 0.041
N 0.25 0.010
V3˚ 6˚3˚ 6˚
SPAK-5L MECHANICAL DATA
PO13F1/B
ST2L05
20/23
DIM. mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 0.80 0.90 1.00 0.032 0.035 0.039
b 0.35 0.40 0.47 0.014 0.016 0.018
D 5.00 0.197
D2 4.05 4.2 4.30 0.163 0.165 0.167
E 6.00 0.236
E2 3.40 3.55 3.65 0.134 0.140 0.144
e 1.27 0.049
L 0.70 0.80 0.90 0.028 0.031 0.035
DFN8 (5x6) MECHANICAL DATA
ST2L05
21/23
DIM. mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 180 7.086
C 12.8 13.0 13.2 0.504 0.512 0.519
D 20.2 0.795
N 60 2.362
T 14.4 0.567
Ao 9.70 9.80 9.90 0.382 0.386 0.390
Bo 10.85 10.95 11.05 0.423 0.427 0.431
Ko 2.30 2.40 2.50 0.090 0.094 0.098
Po 3.9 4.0 4.1 0.153 0.157 0.161
P 11.9 12.0 12.1 0.468 0.472 0.476
Tape & Reel SPAK-xL MECHANICAL DATA
ST2L05
22/23
Table 14: Revision History
Date R evisio n Descrip tion of Change s
18-Nov-2004 4 Remove PPAK Version.
24-Nov-2004 5 New Mechanical Data Release.
06-Dec-2004 6 New Mechanical Data Release.
ST2L05
23/23
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