83947I-147 Data Sheet
©2016 Integrated Device Technology, Inc Revision A March 18, 20164
TABLE 5A. AC CHARACTERISTICS, VDD = VDDO = 3.3V±0.3V, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
fMAX Output Frequency 250 MHz
tPD Propagation Delay, NOTE 1 f ≤ 250MHZ 2 4.2 ns
tsk(o) Output Skew; NOTE 2, 5 Measured on
rising edge @VDDO/2 115 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 5 Measured on
rising edge @VDDO/2 500 ps
tjit(Ø)
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jitter Section
(12KHz to 20MHz)
0.2 ps
tR / tFOutput Rise/Fall Time 0.8V to 2.0V 0.2 1 ns
tPW Output Pulse Width f > 133MHz tPeriod/2 - 1 tPeriod/2 + 1 ns
odc Output Duty Cycle f ≤ 133MHz 40 60 %
tEN Output Enable Time; NOTE 4 10 ns
tDIS Output Disable Time; NOTE 4 10 ns
tSClock Enable Setup Time 0 ns
tSClock Enable Hold Time 1 ns
All parameters measured at frequencies less than or equal to 250MHz unless noted otherwise.
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defi ned as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2.
NOTE 3: Defi ned as skew between outputs on different devices operating at the same supply voltages and with
equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
NOTE 5: This parameter is defi ned in accordance with JEDEC Standard 65.
TABLE 5B. AC CHARACTERISTICS, VDD = VDDO = 2.5V ± 5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
fMAX Output Frequency 250 MHz
tPD Propagation Delay, NOTE 1 f ≤ 250MHZ 2.4 4.5 ns
tsk(o) Output Skew; NOTE 2, 5 Measured on
rising edge @VDDO/2 130 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 5 Measured on
rising edge @VDDO/2 600 ps
tjit(Ø)
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jitter Section
(12KHz to 20MHz) 0.1 ps
tR / tFOutput Rise/Fall Time 20% - 80% 300 800 ps
tPW Output Pulse Width tPeriod/2 - 1.2 tPeriod/2 + 1.2 ns
tEN Output Enable Time; NOTE 4 10 ns
tDIS Output Disable Time; NOTE 4 10 ns
tSClock Enable Setup Time 0 ns
tSClock Enable Hold Time 1 ns
All parameters measured at frequencies less than or equal to 250MHz unless noted otherwise.
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defi ned as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2.
NOTE 3: Defi ned as skew between outputs on different devices operating at the same supply voltages and with
equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
NOTE 5: This parameter is defi ned in accordance with JEDEC Standard 65.