07889 November 28, 2012 Rev: A
EL711DI
1A Fast Transient DC-DC Buck Converter
With Integrated Silicon Magnetics
www.enpirion.com
Description
The EL711DI is the first of a brand new Linear Direct
Replacement (LDR™) buck regulator family designed
for the economical replacement of Low Drop-Out
(LDO) linear voltage regulators. The EL711DI is a
1000mA Power System-on-Chip, (PowerSoC) switch-
mode DC-DC regulator with integrates MOSFETs,
controller, compensation circuit and a proprietary on-
chip silicon inductor. Utilizing a 3x4.5x0.9mm DFN
package, the EL711DI offers high efficiency at an
excellent solution size and is a cost-effective
alternative to LDOs. With an 18MHz switching
frequency, the EL711DI is the fastest in-class buck
regulator with the lowest output ripple. Due to its all-
silicon PowerSoC construction, the EL711DI also
offers superior reliability over standard discrete
DCDC solutions.
The EL711DI showcases Enpirion’s proprietary
monolithic magnetics-on-silicon inductor technology
and is designed to meet the demand of high
performance digital ASICs, DSPs, and FPGAs found
in servers, routers, switches, and base stations.
Enpirion’s PowerSoC solution improves system
design and productivity by offering simple board
layout, small solution size, low cost, high efficiency,
ultra-fast transient response and high performance.
Features
• Output Current up to 1000mA
• High Efficiency
• 3 x 4.5 x 0.9 mm DFN package
• Ultra-Fast Transient Response
• 2% Initial Output Voltage Accuracy
• Input Voltage Range: 2.7V to 5.5V
• Output Voltage Range 0.6V to VIN – VDO
• 18MHz Switching Frequency for Ultra Low Ripple
(8mVpp)
• 100% IC-level Reliability in a PowerSoC Solution
• Short-Circuit, UVLO and Thermal Protection
• RoHS compliant, MSL level 3, 260 °C reflow
Applications
• Voltage Rails Using LDO with Thermal Issues
• Cost-Effective Compliance Energy Star Initiative
• High Density Applications with Limited LDO
Footprint
• Very Low Noise and Noise Sensitive Applications
• CPU, GPU, DSP, FPGA or Memory Core Voltage
Figure 1. Simplified Applications Circuit
Figure
2.
Highest Efficiency in Smallest Solution Size
0
10
20
30
40
50
60
70
80
90
100
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 1.0V
CONDITIONS
VIN = 3.6V
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 2
Ordering Information
Part Number
Package Markings
T
AMBIENT
Rating (°C)
Package
Description
EL711DI L711 -40 to +85 16-pin (3.0mm x 4.5mm x 0.9mm) DFN T&R
EL711DI-E L711 DFN Evaluation Board
Packing and Marking Information: http://www.enpirion.com/resource-center-packing-and-marking-information.htm
Pin Assignments (Top View)
Figure 3: Pin Out Diagram (Top View)
NOTE A: NC pins are not to be electrically connected to each other or to any external signal, ground, or voltage.
However, they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or damage.
NOTE B: White ‘dot’ on top left is pin 1 indicator on top of the device package.
Pin Description
PIN
NAME
FUNCTION
1 PVIN Input power supply. Connect to input power supply and place input filter capacitor(s) between
this pin and the PGND pin. Refer to Layout Recommendations section for details.
2 PGND Power ground. Connect this pin to the ground electrode of the output filter capacitor(s).
4 BGND Connect to GND plane at all times.
8 VOUT Regulated converter output. Connect to the load and place output filter capacitor(s) between
this pin and the PGND pin. Refer to Layout Recommendations section for details.
13 AGND Analog ground. This is the quiet ground for the internal control circuits and the ground return
for external feedback voltage divider.
14 VFB
This is the external feedback input pin. A resistor divider connects from the output to AGND.
The mid-point of the resistor divider is connected to VFB. A feed-forward capacitor (CA) is
required parallel to the upper feedback resistor (RA). The output voltage regulation is based on
the VFB node voltage equal to 0.6V.
15 AVIN Analog input voltage for the control circuits. Connect this pin to the input power supply (PVIN)
at a quiet point.
16 ENABLE
Device enable pin. A high level or floating this pin enables the device while a low level disables
the device. A voltage ramp from another power converter may be applied for precision enable.
Refer to Power Up Sequencing.
3, 5, 6,7,
9, 10, 11,
12
NC
NO CONNECT: These pins must be soldered to PCB but not electrically connected to each
other or to any external signal, voltage, or ground. These pins may be connected internally.
Failure to follow this guideline may result in device damage.
17 PGND
Not a perimeter pin. Device thermal pad to be connected to the ground electrode of the input
filter capacitor(s) with a wide trace. From that point, vias conduct heat to the system GND
plane. Refer to Layout Recommendation section.
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 3
Absolute Maximum Ratings
CAUTION: Absolute Maximum ratings are stress ratings only. Functional operation beyond the recommended operating
conditions is not implied. Stress beyond the absolute maximum ratings may impair device life. Exposure to absolute
maximum rated conditions for extended periods may affect device reliability.
PARAMETER
SYMBOL
MIN
MAX
UNITS
Supply Voltage: PVIN, AVIN, VOUT VIN -0.3 6.0 V
Voltages on: ENABLE -0.3 VIN+ 0.3 V
Voltages on: VFB -0.3 2.7 V
Maximum Operating Junction Temperature TJ-ABS 150 °C
Storage Temperature Range TSTG -65 150 °C
Reflow Temp, 10 Sec, MSL3 JEDEC J-STD-020C 260 °C
ESD Rating (based on Human Body Model) 2000 V
ESD Rating (Charge Device Model) 500 V
Recommended Operating Conditions
PARAMETER
SYMBOL
MIN
MAX
UNITS
Input Voltage Range VIN 2.7 5.5 V
Output Voltage Range (Note 1) VOUT 0.6 V
IN
-V
DO
V
Operating Ambient Temperature TA -40 +85 °C
Operating Junction Temperature TJ -40 +125 °C
Thermal Characteristics
PARAMETER
SYMBOL
TYP
UNITS
Thermal Resistance: Junction to Ambient –0 LFM (Note 2) θJA 60 °C/W
Thermal Overload Trip Point TJ-TP +155 °C
Thermal Overload Trip Point Hysteresis 15 °C
Note 1: VDO (dropout voltage) is defined as (ILOAD x Max Dropout Resistance) / 0.375. Maximum VOUT = VIN - VDO. Low VIN
operation beyond the dropout region is not guaranteed. Please refer to Electrical Characteristics Table and Typical
Performance Curves.
Note 2: Based on 2oz. external copper layers and proper thermal design in line with EIJ/JEDEC JESD51-7 standard for
high thermal conductivity boards.
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 4
Electrical Characteristics
NOTE: VIN=5.5V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted.
Typical values are at TA = 25°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Operating Input
Voltage Range VIN 2.7 5.5 V
Under Voltage Lock-
out – VIN Rising VUVLO_R 2.35 2.5 2.65 V
Under Voltage Lock-
out – VIN Falling VUVLO_F 2.2 2.35 2.5 V
Drop Out Resistance RDO Input to Output Resistance 340 500 mΩ
VFB Voltage Initial
Accuracy VFB TA = 25°C 0.588 0.600 0.612 V
Operating Output
Voltage Range VOUT Note 1 0.6 V
IN
-V
DO
V
Line Regulation ∆VOUT_LINE 2.7V ≤ VIN ≤ 5.5V 0.2 %/V
Load Regulation ∆VOUT_LOAD 0A ≤ ILOAD ≤ 1A 0.2 %/A
Temperature Variation ∆VOUT_TEMPL -40°C ≤ TA ≤ +85°C 24 ppm/°C
Output Current IOUT Note 1
Subject to Dropout Voltage Limit 0 1.0 A
Shut-down Current ISD ENABLE = Low 1.5 µA
Over Current
Protection (OCP)
Threshold
ILIM 2.7V ≤ VIN ≤ 5.5V
0.6V ≤ VOUT ≤ 3.3V 1.5 2.2 A
Feedback Pin Input
Current IFB Note 3 <100 nA
Enable Pin Logic Low VENLO 0 0.3 V
Enable Pin Logic High VENHI 1.4 AVIN V
Enable Pin Current IENABLE Note 3 <100 nA
Operating Frequency FOSC 18.5 MHz
VOUT Rise Time TRISE (Note 3 and 4) 850 µs
Note 3: Parameter not production tested but is guaranteed by design.
Note 4: Rise time calculation begins when AVIN > VUVLO and ENABLE = HIGH.
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 5
Typical Performance Curves
0
10
20
30
40
50
60
70
80
90
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VIN = 3.3V
VIN = 4.3V
VIN = 5.0V
VIN = 5.5V
CONDITIONS
VOUT = 1.8V
0
10
20
30
40
50
60
70
80
90
100
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 1.0V
CONDITIONS
VIN = 3.3V
0
10
20
30
40
50
60
70
80
90
100
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 1.0V
CONDITIONS
V
IN
= 3.6V
0
10
20
30
40
50
60
70
80
90
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 1.0V
CONDITIONS
V
IN
= 4.2V
0
10
20
30
40
50
60
70
80
90
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 1.0V
CONDITIONS
VIN = 5.0V
1.180
1.185
1.190
1.195
1.200
1.205
1.210
1.215
1.220
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
Output Voltage vs. Output Current
VOUT = 1.2V
CONDITIONS
VIN = 3.3V
07889 November 28, 2012 Rev: A
EL711DI
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Typical Performance Curves (Continued)
1.180
1.185
1.190
1.195
1.200
1.205
1.210
1.215
1.220
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
Output Voltage vs. Output Current
VOUT = 1.2V
CONDITIONS
V
IN
= 5.0V
1.780
1.785
1.790
1.795
1.800
1.805
1.810
1.815
1.820
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
Output Voltage vs. Output Current
VOUT = 1.8V
CONDITIONS
V
IN
= 3.3V
1.780
1.785
1.790
1.795
1.800
1.805
1.810
1.815
1.820
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
Output Voltage vs. Output Current
VOUT = 1.8V
CONDITIONS
VIN = 5.0V
1.160
1.170
1.180
1.190
1.200
1.210
1.220
1.230
1.240
-40 -15 10 35 60 85
OUTPUT VOLTAGE (V)
AMBIENT TEMPERATURE ( C)
Output Voltage vs. Temperature
LOAD = 0mA
LOAD = 200mA
LOAD = 400mA
LOAD = 800mA
LOAD = 1000mA
CONDITIONS
VIN = 3.3V
VOUT_NOM = 1.2V
1.160
1.170
1.180
1.190
1.200
1.210
1.220
1.230
1.240
-40 -15 10 35 60 85
OUTPUT VOLTAGE (V)
AMBIENT TEMPERATURE ( C)
Output Voltage vs. Temperature
LOAD = 0mA
LOAD = 200mA
LOAD = 400mA
LOAD = 800mA
LOAD = 1000mA
CONDITIONS
VIN = 5V
VOUT_NOM = 1.2V
1.760
1.770
1.780
1.790
1.800
1.810
1.820
1.830
1.840
-40 -15 10 35 60 85
OUTPUT VOLTAGE (V)
AMBIENT TEMPERATURE ( C)
Output Voltage vs. Temperature
LOAD = 0mA
LOAD = 200mA
LOAD = 400mA
LOAD = 800mA
LOAD = 1000mA
CONDITIONS
VIN = 3.3V
VOUT_NOM = 1.8V
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 7
Typical Performance Curves (Continued)
1.760
1.770
1.780
1.790
1.800
1.810
1.820
1.830
1.840
-40 -15 10 35 60 85
OUTPUT VOLTAGE (V)
AMBIENT TEMPERATURE ( C)
Output Voltage vs. Temperature
LOAD = 0mA
LOAD = 200mA
LOAD = 400mA
LOAD = 800mA
LOAD = 1000mA
CONDITIONS
VIN = 5V
VOUT_NOM = 1.8V
1.760
1.765
1.770
1.775
1.780
1.785
1.790
1.795
1.800
1.805
1.810
1.815
1.820
3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Output Voltage vs. Input Voltage
CONDITIONS
Load = 0A
1.760
1.765
1.770
1.775
1.780
1.785
1.790
1.795
1.800
1.805
1.810
1.815
1.820
3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Output Voltage vs. Input Voltage
CONDITIONS
Load = 200mA
CONDITIONS
Load = 600mA
1.760
1.765
1.770
1.775
1.780
1.785
1.790
1.795
1.800
1.805
1.810
1.815
1.820
3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
OUTPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Output Voltage vs. Input Voltage
CONDITIONS
Load = 200mA
CONDITIONS
Load = 1000mA
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 8
Typical Performance Characteristics
ENABLE
Enable Startup Waveform (0A)
CONDITIONS
VIN = 3.3V, VOUT = 1.8V, Load = 0A
VOUT
LOAD
Enable Shutdown Waveform (0A)
CONDITIONS
VIN = 3.3V, VOUT = 1.8V, Load = 0A
VOUT
LOAD
ENABLE
Enable Startup Waveform (1A)
CONDITIONS
VIN = 3.3V, VOUT = 1.8V, Load = 1A
VOUT
LOAD
ENABLE
Enable Shutdown Waveform (1A)
CONDITIONS
VIN = 3.3V, VOUT = 1.8V, Load = 1A
VOUT
LOAD
ENABLE
Enable Startup Waveform (0A)
CONDITIONS
VIN = 5V, VOUT = 1.8V, Load = 0A
VOUT
LOAD
ENABLE
Enable Shutdown Waveform (0A)
CONDITIONS
VIN = 5V, VOUT = 1.8V, Load = 0A
VOUT
LOAD
ENABLE
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 9
Typical Performance Characteristics (Continued)
Enable Startup Waveform (1A)
CONDITIONS
VIN = 5V, VOUT = 1.8V, Load = 1A
VOUT
LOAD
ENABLE
Enable Shutdown Waveform (1A)
CONDITIONS
VIN = 5V, VOUT = 1.8V, Load = 1A
VOUT
LOAD
ENABLE
Output Ripple at 20MHz Bandwidth
CONDITIONS
VIN = 3.3V, VOUT = 1.8V
No Load
VOUT = 1.8V
(AC Coupled)
10mV / DIV
Load
500mA / DIV
Output Ripple at 20MHz Bandwidth
CONDITIONS
VIN = 3.3V, VOUT = 1.8V
Load = 1A
VOUT = 1.8V
(AC Coupled)
10mV / DIV
Load
500mA / DIV
Output Ripple at 20MHz Bandwidth
CONDITIONS
VIN = 5V, VOUT = 1.8V
Load = 0A
VOUT = 1.8V
(AC Coupled)
10mV / DIV
Load
500mA / DIV
Output Ripple at 20MHz Bandwidth
CONDITIONS
VIN = 5V, VOUT = 1.8V
Load = 1A
VOUT = 1.8V
(AC Coupled)
10mV / DIV
Load
500mA / DIV
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 10
Typical Performance Characteristics (Continued)
Load Transient from 0 to 500mA
VOUT = 1.8V
(AC Coupled)
50mV / DIV
Load
500mA / DIV CONDITIONS
VIN = 3.3V, VOUT = 1.8V
CIN = 4.7µF (0603)
COUT = 10µF (0603) + 0.22µF (0402)
Load Transient from 0 to 1A
CONDITIONS
VIN = 3.3V, VOUT = 1.8V
CIN = 4.7µF (0603)
COUT = 10µF (0603) + 0.22µF (0402)
VOUT = 1.8V
(AC Coupled)
50mV / DIV
Load
500mA / DIV
Load Transient from 0 to 500mA
VOUT = 1.8V
(AC Coupled)
20mV / DIV
Load
500mA / DIV CONDITIONS
VIN = 5V, VOUT = 1.8V
CIN = 4.7µF (0603)
COUT = 10µF (0603) + 0.22µF (0402)
Load Transient from 0 to 1A
VOUT = 1.8V
(AC Coupled)
20mV / DIV
Load
500mA / DIV CONDITIONS
VIN = 5V, VOUT = 1.8V
CIN = 4.7µF (0603)
COUT = 10µF (0603) + 0.22µF (0402)
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 11
Functional Block Diagram
Soft Start
VREF
(+)
(-)
Error
Amp
VOUT
P-Drive
N-Drive
UVLO
Thermal Limit
Current Limit
Sawtooth
Generator
(-)
(+)
PWM
Comp
PVIN
PGND
Logic
Control
Compensation
Network
AVIN AGND
Gate Drive
VFB
ENABLE
BGND
Figure 4: Functional Block Diagram
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 12
Functional Description
Functional Overview
The EL711DI integrates MOSFET switches, the
PWM controller, gate-drive, controller
compensation, and a magnetics-on-silicon inductor
into a small 3.0mm x 4.5mm x 0.9mm DFN
package. Advanced package design, along with the
high level of integration, provides low output ripple
and noise. The EL711DI uses voltage mode
control for high noise immunity and load matching
to advanced sub-90nm digital-chip loads. An
external resistor divider is used to set the output
voltage over the 0.6V to 5.0V range. The EL711DI
provides exceptional power density for a 1000mA
DC-DC converter solution.
The key enabler of this revolutionary integration is
Enpirion’s proprietary high speed power MOSFET
technology combined with Enpirion’s latest
advanced magnetics-on-silicon inductor
technology. The advanced MOSFET switches are
implemented in deep sub-micron CMOS generating
very low switching loss at ultra-high switching
frequencies while allowing monolithic integration.
The semiconductor process allows seamless
integration of all switching, control, and inductive
energy storage functions.
The proprietary magnetic-on-silicon technology
provides high-density, high-inductance in a very
small footprint on a silicon die. Enpirion magnetics
are carefully matched to the control and
compensation circuits yielding an optimal solution
with assured performance over the entire operating
range.
Protection features include under-voltage lock-out
(UVLO), over-current protection (OCP), short circuit
protection, and thermal overload protection.
Integrated Inductor: Low-Loss, Low
Noise
The EL711DI utilizes a proprietary low loss
integrated inductor technology. The integration of
the inductor greatly simplifies the power supply
design process. Its inductor on silicon is
manufactured with ultra-low loss alloys capable of
operating in the 10-20 MHz regime. Alloy shielding
and compact die construction of the inductor silicon
die reduces the conducted and radiated noise that
can couple into the traces of the printed circuit
board. Further, the package layout is optimized to
reduce the electrical path length for the high di/dt
currents that are a major source of radiated
emissions from DC-DC converters. The unique,
leading-edge integrated inductor technology
provides the optimal solution to complexity, output
ripple, and costs that plague low power DC-DC
converter design with a viable LDO alternative.
Controller Topology
The EL711DI utilizes on-chip Type III Voltage-Mode
control. Voltage-Mode control is properly
impedance matched to digital loads in the sub-
90nm process technologies that are used in today’s
advanced ICs. It also provides a high degree of
noise immunity at light load currents so that low
ripple and high accuracy are maintained over the
entire load range. The very high switching
frequency allows for a very wide control loop
bandwidth and hence excellent transient
performance.
Soft Start
Internal soft start circuits limit in-rush current when
the device starts up from a power down condition or
when the “ENABLE” pin is asserted “high”. Digital
control circuitry limits the V
OUT
ramp rate to levels
that are safe for the Power MOSFETS and the
integrated inductor.
The EL711DI has a pre-set, fixed V
OUT
ramp time.
Therefore, the ramp rate will vary with the output
voltage setting. V
OUT
ramp time is given in the
Electrical Characteristics Table.
Due to this fixed startup ramp time, large and
excessive bulk capacitance on the output of the
device can cause an over-current trip condition at
startup. The maximum total capacitance on the
output, including the output filter capacitor and bulk
and decoupling capacitances, at the load, is given
as:
C
OUT_TOTAL_MAX
(µF) = 718 / V
OUT
(V)
The nominal value for C
OUT
is 10µF. See the
applications section for more details.
Over-Current and Short-Circuit
Protections (OCP and SCP)
The current limit function is achieved by sensing
the current flowing in the high-side switch through a
sense P-MOSFET which is compared to a
reference current. When this level is exceeded the
high-side P-FET is turned off and the low-side N-
FET is turned on, pulling V
OUT
low. This condition is
maintained for approximately 0.2 – 0.5 ms followed
by a normal soft start procedure. If the over-current
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 13
condition still persists after soft start, this hiccup
cycle will repeat itself indefinitely until the over-
current condition is removed.
Figure 5. Hiccup Over-Current Protection
Under-Voltage-Lockout (UVLO)
During initial power-up the under-voltage-lockout
circuit will hold-off the switching circuitry until the
input voltage reaches a sufficient level to insure
proper operation. If the voltage drops below the
UVLO threshold, the lockout circuitry will again
disable switching. Hysteresis is included to prevent
chattering between states.
Power-Up Sequencing
During power-up, ENABLE should not be asserted
before PVIN, and PVIN should not be asserted
before AVIN. Tying all three pins together meets
these requirements.
Pre-Bias Precaution
The EL711DI is not designed to be turned on into a
pre-biased output voltage. Be sure the output
capacitors are not charged or the output of the
EL711DI is not pre-biased when the EL711DI is
first enabled.
Enable
The ENABLE pin provides a means to enable
normal operation or to shut down the device. A
logic high will enable the converter into normal
operation. When the ENABLE pin is asserted (high)
the device will undergo a normal soft-start, allowing
the output voltage to rise monotonically into
regulation. A logic low will disable the converter and
the device will power down in a controlled manner.
Floating the ENABLE pin will cause the regulator to
be in an indeterminate state. The ENABLE should
not be left floating.
Thermal Shutdown
When excessive power is dissipated in the chip, the
junction temperature rises. Once the junction
temperature exceeds the internal thermal shutdown
temperature, the thermal shutdown circuit turns off
the converter output voltage thus allowing the
device to cool down. When the junction
temperature decreases by 15°C, the device will
initiate a normal startup process. This process will
repeat itself if the thermal overload condition is not
removed.
Hiccup Mode Over-Current Protection
VOUT = 1.0V
500mV / DIV
Output Current
2A / DIV
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 14
Application Information
Output Voltage Programming
Figure 6: Typical Application Circuit
The EL711DI uses a simple resistor divider to set
the output voltage. In Figure 6, use 100kΩ for the
upper resistor (R
A
). The value of the bottom
resistor, R
B
in kΩ is then given by:
,
Figure 7: Feedback Resistor Network
where, V
FB
= 0.6V nominal and V
OUT
is the desired
output voltage. A 22pF MLCC capacitor is required
in parallel with R
a
for proper control loop
compensation.
Input Filter Capacitor Selection
The input capacitor, C
IN
, should be at least 4.7µF in
a 0603 MLCC capacitor case. It must be either X5R
or X7R or of an equivalent dielectric formulation.
Since Y5V or equivalent dielectric formulations
severely lose capacitance with frequency, bias, and
temperature, they are NOT suitable for high
frequency switch-mode DC-DC converter input filter
applications such as the EL711DI.
MFG
P/N
4.7µF, 10V, X5R,
10%, 0603 Murata GRM188R61A475KE15D
4.7µF, 10V, X5R,
10%, 0603
Taiyo
Yuden LMK107BBJ475MKLT
4.7µF, 10V, X5R,
10%, 0603 AVX 0603ZD475KAT2A
0.1µF, 10V, X5R,
10%, 0402
Taiyo
Yuden LMK105BJ104KV-F
Table 1
. Recommended Input Capacitors
Output Filter Capacitor Selection
The output filter is designed as an impedance
network to provide both bulk (low frequency)
filtering as well as impedance attenuation (high
frequency) switching noise filtering. While only
physical capacitors comprise the network, its high
frequency equivalent circuit including ESR and ESL
are taken into account in the design. For bulk
charge and stability requirements, the minimum
value of C
OUT
must be 10µF in a minimum 0603
MLCC capacitor case. Peak-to-peak ripple
magnitude can be further reduced as needed by
adding additional 10µF 0603 and 0.22µF 0402
MLCC capacitors.
The maximum output filter capacitance permitted
directly at the output pins of the device depends on
V
OUT
and is calculated by the equation in the Soft
Start section. V
OUT
must be sensed at the last
output filter capacitor at the EL711DI output pins.
Wherever the sense location, it should not be at a
point where an additional secondary LC filter is
inadvertently created for example by placement of
capacitors at a distance from one another where
the intervening trace forms adequate inductance.
Down-stream filtering past the sense point is
perfectly acceptable and will not pose any stability
concerns. In fact the added benefit of the
EL711DI’s high operating frequency is that the
extra trace inductance will provide further ripple and
noise attenuation to exceptionally low levels. Of
course proper hardware design practices must be
followed to avoid resonances that naturally
increase noise levels in ANY switch-mode power
supply system.
Additional bulk capacitance for decoupling and
bypass can be placed at the point-of-load as long
as there is sufficient separation between the V
OUT
sense point and that bulk capacitance.
Excess total capacitance on the output (Output
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 15
Filter + Bulk) will cause an over-current condition at
startup. Refer to the section on Soft-Start for the
maximum total capacitance on the output.
The output capacitor must have an X5R or X7R or
equivalent dielectric formulation. Y5V or equivalent
dielectric formulations exhibit severe, unacceptable
loss of capacitance with frequency, bias, and
temperature, as much as 50% or more. They are
NOT suitable for high frequency, switch-mode, DC-
DC converter output filter applications such as the
EL711DI.
MFG
P/N
10µF, 10V, X5R,
10%, 0603 Murata GRM188R61A106KE69D
10µF, 10V, X5R,
10%, 0603
Taiyo
Yuden LMK107BBJ106MALT
10µF, 10V, X5R,
20%, 0603 AVX 0603ZD106MAT2A
0.22µF, 10v, X5R,
10%, 0402
Taiyo
Yuden LMK105BJ224KV-F
Table 2
. Recommended Output Capacitors
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 16
Thermal Considerations
Thermal considerations are important power supply
design facts that cannot be avoided in the real
world. Whenever there are power losses in a
system, the heat that is generated by the power
dissipation needs to be accounted for. The Enpirion
PowerSoC helps alleviate some of those concerns.
The Enpirion EL711DI DC-DC converter is
packaged in a 3x4.5x0.9mm 16-pin DFN package.
The DFN package is constructed with copper lead
frames that have exposed thermal pads. The
exposed thermal pad on the package should be
soldered directly on to a copper ground pad on the
printed circuit board (PCB) to act as a heat sink.
The recommended maximum junction temperature
for continuous operation is 125°C. Continuous
operation above 125°C may reduce long-term
reliability. The device has a thermal overload
protection circuit designed to turn off the device at
an approximate junction temperature value of
155°C.
The following example and calculations illustrate
the thermal performance of the EL711DI.
Example:
V
IN
= 3.3V
V
OUT
= 1.8V
I
OUT
= 1000mA
First calculate the output power.
P
OUT
= 1.8V x 1A = 1.8W
Next, determine the input power based on the
efficiency (η) shown in Figure 8.
Figure 8: Efficiency vs. Output Current
For V
IN
= 3.3V, V
OUT
= 1.8V at 1A, η ≈ 76%
η = P
OUT
/ P
IN
= 76% = 0.76
P
IN
= P
OUT
/ η
P
IN
≈ 1.8W / 0.76 ≈ 2.37W
The power dissipation (P
D
) is the power loss in the
system and can be calculated by subtracting the
output power from the input power.
P
D
= P
IN
– P
OUT
≈ 2.37W – 1.8W ≈ 0.57W
With the power dissipation known, the temperature
rise in the device may be estimated based on the
theta JA value (θ
JA
). The θ
JA
parameter estimates
how much the temperature will rise in the device for
every watt of power dissipation. The EL711DI has a
θ
JA
value of 60 ºC/W without airflow.
Determine the change in temperature (∆T) based
on P
D
and θ
JA
.
∆T = P
D
x θ
JA
∆T ≈ 0.57W x 60°C/W = 34.2°C ≈ 34°C
The junction temperature (T
J
) of the device is
approximately the ambient temperature (T
A
) plus
the change in temperature. We assume the initial
ambient temperature to be 25°C.
T
J
= T
A
+ ∆T
T
J
≈ 25°C + 34°C ≈ 59°C
The maximum operating junction temperature
(T
JMAX
) of the device is 125°C, so the device can
operate at a higher ambient temperature. The
maximum ambient temperature (T
AMAX
) allowed can
be calculated.
T
AMAX
= T
JMAX
– P
D
x θ
JA
≈ 125°C – 34°C ≈ 91°C
The maximum ambient temperature the device can
reach is 85°C given the input and output conditions.
Note that the efficiency will be slightly lower at
higher temperatures and this calculation is an
estimate.
0
10
20
30
40
50
60
70
80
90
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
EFFICIENCY (%)
OUTPUT CURRENT (A)
Efficiency vs. Output Current
CONDITIONS
VIN = 3.3V
VOUT = 1.8V
07889 November 28, 2012 Rev: A
Enpirion 2012 all rights reserved, E&OE
Engineering Schematic
Figure 9:
Engineering Schematic
Enpirion Confidential
www
Engineering Schematic
for Layout
Recommendation Section
EL711DI
ww.enpirion.com
, Page 17
Recommendation Section
07889 November 28, 2012 Rev: A
EL711DI
Enpirion 2012 all rights reserved, E&OE Enpirion Confidential www.enpirion.com, Page 18
Layout Recommendation
Figure 10: Top Layout with Critical Components Only
(Top View). See Figure 9 for corresponding schematic.
This layout only shows the critical components and
top layer traces for minimum footprint in single-
supply mode with ENABLE tied to AVIN. Alternate
ENABLE configurations need to be connected and
routed according to customer application. Please
see the Gerber files at www.enpirion.com for details
on all layers. Due to the high switching
frequency, the layout for this part is very
critical. To ensure success for this product,
these layout recommendations and the Enpirion
Gerbers must be followed exactly.
Recommendation 1:
Input and output filter
capacitors should be placed on the same side of
the PCB, and as close to the EL711 package as
possible. They should be connected to the device
with very short and wide traces. Do not use thermal
reliefs or spokes when connecting the capacitor
pads to the respective nodes. The +V and GND
traces between the capacitors and the EL711
should be as close to each other as possible so
that the gap between the two nodes is minimized,
even under the capacitors.
Recommendation 2:
The PGND connections for
the input and output capacitors on layer 1 need to
be separated with the input ground connected
directly to the thermal pad. The output ground
should be connected directly to the PGND (pin 2).
Both input and output ground should have vias to
the system ground planes below. The trace from
the thermal pad to the input capacitor also carries
heat from the thermal pad to the ground plane
through the vias next to CIN.
Recommendation 3:
The system ground plane
should be the first layer immediately below the
surface layer. This ground plane should be
continuous and un-interrupted below the input
capacitor and the traces leading up to the device.
There needs to be a copper void in layers 1, 2, and
layer 3 under the inductor portion of the EL711.
Please see the Gerber files for exact details.
Recommendation 4
: Multiple small vias should be
used to connect ground terminal of the input
capacitor and output capacitors to the system
ground plane. These vias connect the input/output
filter capacitors to the GND plane, and help reduce
parasitic inductances in the input and output current
loops.
Recommendation 5
: AVIN is the power supply for
the small-signal control circuits. It should be
connected to the input voltage at a quiet point. In
our recommended layout this connection is made
on the back side at the input vias just above CIN.
See the Gerber files for exact details. There is also
a need for a decoupling capacitor CAVIN right next
to the AVIN and AGND pins.
Recommendation 6
: In order to avoid
unnecessary ground loops, the copper from the
AGND pin should only connect to CAVIN, R
B
, and
the via going to the ground plane.
Recommendation 7
: The layer 1 metal under the
device must not be more than shown in Figure 10.
As with any switch-mode DC/DC converter, try not
to run sensitive signal or control lines underneath
the converter package on other layers.
Recommendation 8:
The V
OUT
sense point should
be just after the last output filter capacitor. Keep the
sense trace short in order to avoid noise coupling
into the node. In our recommended layout this trace
is on the back side. Please see the Gerber files.
Recommendation 9
: Keep R
A
, C
A
, and R
B
close to
the VFB pin (Refer to Figure 10). The VFB pin is a
high-impedance, sensitive node. Keep the trace to
this pin as short as possible. Whenever possible,
connect R
B
directly to AGND instead of going
through the GND plane.
Recommendation 10
: Follow all the layout
recommendations and the Gerber files exactly to
optimize performance. Verify with Enpirion any
deviations from our layout recommendations.
Contact Enpirion Applications Engineering for
detailed support (techsupport@enpirion.com).
07889 November 28, 2012 Rev: A
Enpirion 2012 all rights reserved, E&OE
Recommended PCB Footprint
Figure 1
Enpirion Confidential
www
Recommended PCB Footprint
Figure 1
1: EL711DI PCB Footprint (Top View)
EL711DI
ww.enpirion.com
, Page 19
07889 November 28, 2012 Rev: A
Enpirion 2012 all rights reserved, E&OE
Package and Mechanical
Figure 12
:
Packing and Marking Information:
http://www.enpirion.com/resource
Contact Information
Enpirion, Inc.
Perryville III Corporate Park
53 Frontage Road - Suite 210
Hampton, NJ 08827 USA
Phone: 1.908.894.6000
Fax: 1.908.894.6090
Enpirion reserves the right to make changes in circuit design and/or specifications at any time without
believed to be accurate and reliable. Enpirion assumes no responsibility for its use or for infringement of patents or other
result from its use. Enpirion products are not authorize
d for use in nuclear control systems, as critical components in life support systems or equipment
used in hazardous environment without the express written authority from Enpirion
Enpirion Confidential
www
:
EL711DI Package Dimensions (Bottom View)
http://www.enpirion.com/resource
-center-packing-and-
marking
Enpirion reserves the right to make changes in circuit design and/or specifications at any time without
notice. Information furnished by Enpirion is
believed to be accurate and reliable. Enpirion assumes no responsibility for its use or for infringement of patents or other
d for use in nuclear control systems, as critical components in life support systems or equipment
used in hazardous environment without the express written authority from Enpirion
EL711DI
ww.enpirion.com
, Page 20
marking
-information.htm
notice. Information furnished by Enpirion is
believed to be accurate and reliable. Enpirion assumes no responsibility for its use or for infringement of patents or other
third party rights, which may
d for use in nuclear control systems, as critical components in life support systems or equipment
