A2T07H310--24SR6
1
RF Device Data
Freescale Semiconductor, Inc.
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 47 W asymmetrical Doherty RF power LDMOS transistor is designed for
cellular base station applications covering the frequency range of 716 to
960 MHz.
870 MHz
•Typical Doherty Single--Carrier W--CDMA Performance: VDD =28Vdc,
IDQA = 700 mA, VGSB =0.7Vdc,P
out = 47 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
ηD
(%)
Output PAR
(dB)
ACPR
(dBc)
851 MHz 18.9 50.5 7.7 –29.8
865 MHz 18.9 51.6 7.7 –30.1
880 MHz 18.6 51.3 7.7 –30.9
800 MHz
•Typical Doherty Single--Carrier W--CDMA Performance: VDD =28Vdc,
IDQA = 700 mA, VGSB =0.7Vdc,P
out = 47 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
ηD
(%)
Output PAR
(dB)
ACPR
(dBc)
790 MHz 19.5 50.7 7.7 –30.2
806 MHz 19.3 50.8 7.7 –31.2
822 MHz 18.9 50.5 7.7 –32.3
Features
•Advanced High Performance In--Package Doherty
•Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
•Designed for Digital Predistortion Error Correction Systems
•In Tape and Reel. R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel.
Document Number: A2T07H310--24S
Rev. 0, 6/2014
Freescale Semiconductor
Technical Data
A2T07H310--24SR6
NI--1230S--4L2L
716–960 MHz, 47 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTOR
(Top View)
RFoutA/VDSA
RFoutB/VDSB
RFinA/VGSA
RFinB/VGSB
VBWA(1)
VBWB(1)
6
3
15
24
Carrier
Peaking
Figure 1. Pin Connections
1. Device cannot operate with the VDD current
supplied through pin 3 and pin 6.
©Freescale Semiconductor, Inc., 2014.
A
ll rights reserved.
2
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
Table 1. Maximum Ratings
Rating Symbol Value Unit
Drain--Source Voltage VDSS –0.5, +70 Vdc
Gate--Source Voltage VGS –6.0, +10 Vdc
Operating Voltage VDD 32, +0 Vdc
Storage Temperature Range Tstg –65 to +150 °C
Case Operating Temperature Range TC–40 to +150 °C
Operating Junction Temperature Range (1,2) TJ–40 to +225 °C
CW Operation @ TC=25°C
Derate above 25°C
CW 199
1.8
W
W/°C
Table 2. Thermal Characteristics
Characteristic Symbol Value (2,3) Unit
Thermal Resistance, Junction to Case
Case Temperature 71°C, 47 W W--CDMA, 28 Vdc, IDQA = 700 mA, VGSB = 0.7 Vdc, 865 MHz
RθJC 0.36 °C/W
Table 3. ESD Protection Characteristics
Test Methodology Class
Human Body Model (per JESD22--A114) 2
Machine Model (per EIA/JESD22--A115) B
Charge Device Model (per JESD22--C101) IV
Table 4. Electrical Characteristics (TA=25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Off Characteristics (4)
Zero Gate Voltage Drain Leakage Current
(VDS =70Vdc,V
GS =0Vdc)
IDSS — — 10 μAdc
Zero Gate Voltage Drain Leakage Current
(VDS =32Vdc,V
GS =0Vdc)
IDSS — — 1 μAdc
Gate--Source Leakage Current
(VGS =5Vdc,V
DS =0Vdc)
IGSS — — 1 μAdc
On Characteristics -- Side A (4) (Carrier)
Gate Threshold Voltage
(VDS =10Vdc,I
D= 174 μAdc)
VGS(th) 1.0 1.5 2.0 Vdc
Gate Quiescent Voltage
(VDD =28Vdc,I
DA = 700 mAdc, Measured in Functional Test)
VGS(Q) 1.5 2.0 2.5 Vdc
Drain--Source On--Voltage
(VGS =10Vdc,I
D=1.74Adc)
VDS(on) 0.1 0.2 0.3 Vdc
On Characteristics -- Side B (4) (Peaking)
Gate Threshold Voltage
(VDS =10Vdc,I
D= 224 μAdc)
VGS(th) 1.0 1.5 2.0 Vdc
Drain--Source On--Voltage
(VGS =10Vdc,I
D=2.24Adc)
VDS(on) 0.05 0.1 0.3 Vdc
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes -- AN1955.
4. Each side of device measured separately.
(continued)
A2T07H310--24SR6
3
RF Device Data
Freescale Semiconductor, Inc.
Table 4. Electrical Characteristics (TA=25°C unless otherwise noted) (continued)
Characteristic Symbol Min Typ Max Unit
Functional Tests (1,2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD =28Vdc,I
DQA = 700 mA, VGSB =0.7Vdc,P
out =47WAvg.,
f = 880 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in
3.84 MHz Channel Bandwidth @ ±5MHzOffset.
Power Gain Gps 17.7 18.6 20.7 dB
Drain Efficiency ηD48.0 51.3 — %
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF PAR 7.2 7.7 —dB
Adjacent Channel Power Ratio ACPR —–30.9 –26.9 dBc
Load Mismatch (2) (In Freescale Doherty Test Fixture, 50 ohm system) IDQA = 700 mA, VGSB =0.7Vdc,f=865MHz
VSWR 10:1 at 32 Vdc, 316 W CW (4) Output Power
(3 dB Input Overdrive from 126 W CW Rated Power)
No Device Degradation
Typical Performance (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD =28Vdc,I
DQA = 700 mA, VGSB =0.7Vdc,
851–880 MHz Bandwidth
Pout @ 1 dB Compression Point, CW P1dB —126 — W
Pout @ 3 dB Compression Point (3) P3dB —330 — W
AM/PM
(Maximum value measured at the P3dB compression point across
the 851–880 MHz frequency range)
Φ—–21 —°
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
VBWres —180 —MHz
Gain Flatness in 29 MHz Bandwidth @ Pout =47WAvg. GF—0.4 —dB
Gain Variation over Temperature
(–30°Cto+85°C)
∆G — 0.01 —dB/°C
Output Power Variation over Temperature
(–30°Cto+85°C) (4)
∆P1dB —0.2 —dB/°C
1. Part internally matched both on input and output.
2. Measurement made with device in an asymmetrical Doherty configuration.
3. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
4. Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table.
4
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
Figure 2. A2T07H310--24SR6 Test Circuit Component Layout — 851–880 MHz
--
--
CUT OUT AREA
A2T07H310--24S
Rev. 3
D58864
C10
C9
C
P
C7
R2
C5
C3
C1
Z1
R1
C2 C4 C6
R3
C8
C12
C13
C16
C15
C20
C34
C31 C32
C26
C27
C28
C25
C21
C29 C30
C19
C33
C18
C17
C22
C23 C24
VGGA VDDA
VGGB VDDB
C11
C14
Table 5. A2T07H310--24SR6 Test Circuit Component Designations and Values — 851–880 MHz
Part Description Part Number Manufacturer
C1, C2, C7, C8, C19, C20,
C23, C28
43 pF Chip Capacitors ATC100B430JT500XT ATC
C3, C4, C5, C6, C21, C22,
C25
6.8 pF Chip Capacitors ATC100B6R8CT500XT ATC
C9, C10, C12, C13 10 μF Chip Capacitors GRM31CR61H106KA12 Muruta
C11, C14, C26 5.6 pF Chip Capacitors ATC100B5R6CT500XT ATC
C15, C16, C17, C18, C29,
C30, C31, C32
10 μF Chip Capacitors C5750X7S2A106M230KB TDK
C24 2.7 pF Chip Capacitor ATC100B2R7BT500XT ATC
C27 4.7 pF Chip Capacitor ATC100B4R7CT500XT ATC
C33, C34 330 μF Electrolytic Capacitors MCRH63V337M13X21–RH Multicomp
R1 50 Ω, 10 W Termination 81A7031–50–5F Florida RF Labs
R2, R3 2.2 Ω,1/4 W Chip Resistors CRCW12062R20JNEA Vishay
Z1 800–1000 MHz Band, 90°, 3 dB Hybrid Coupler X3C09P1–03S Anaren
PCB Rogers RO4350B, 0.020″,εr=3.66 D58864 MTL
A2T07H310--24SR6
5
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS — 851–880 MHz
PARC (dB)
-- 4
-- 2
-- 2 . 5
-- 3
-- 3 . 5
-- 4 . 5
800
ACPR
f, FREQUENCY (MHz)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 47 Watts Avg.
13
23
22
21
-- 3 3
52
50
48
46
-- 2 8
-- 2 9
-- 3 0
-- 3 1
ηD, DRAIN
EFFICIENCY (%)
ηD
Gps, POWER GAIN (dB)
20
19
18
17
16
15
14
820 840 860 880 900 920 940 960
44
-- 3 2
ACPR (dBc)
PARC
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
TWO--TONE SPACING (MHz)
10
-- 6 0
-- 1 0
-- 2 0
-- 3 0
-- 5 0
1 100
IMD, INTERMODULATION DISTORTION (dBc)
-- 4 0
IM3--U
IM5--U
IM5--L
IM7--L
IM7--U
VDD =28Vdc,P
out = 20 W (PEP), IDQA = 700 mA
VGSB = 0.7 Vdc, Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 865 MHz
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
Pout, OUTPUT POWER (WATTS)
-- 1
-- 3
15
0
-- 2
-- 4
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
030 45 90
0
60
50
40
30
20
10
ηD,DRAIN EFFICIENCY (%)
-- 3 d B = 7 0 W
60
ηD
ACPR
PARC
ACPR (dBc)
-- 5 0
-- 2 0
-- 2 5
-- 3 0
-- 4 0
-- 3 5
-- 4 5
22
Gps, POWER GAIN (dB)
21
20
19
18
17
16
Gps
-- 1 d B = 1 8 W
-- 2 d B = 4 0 W
-- 5
Gps
IM3--L
1
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
VDD =28Vdc,P
out =47W(Avg.)
IDQA = 700 mA, VGSB =0.7Vdc
Single--Carrier W--CDMA
VDD =28Vdc,I
DQA = 700 mA, VGSB =0.7Vdc
f = 865 MHz, Single--Carrier W--CDMA, 3.84 MHz
Channel Bandwidth, Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
75
200
6
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
TYPICAL CHARACTERISTICS — 851–880 MHz
1
Pout, OUTPUT POWER (WATTS) AVG.
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
-- 1 0
-- 2 0
10
22
5
65
55
45
35
25
ηD, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
20
18
10 100 400
15
-- 6 0
ACPR (dBc)
16
14
12
0
-- 3 0
-- 4 0
-- 5 0
Figure 7. Broadband Frequency Response
8
20
f, FREQUENCY (MHz)
VDD =28Vdc
Pin =0dBm
IDQA = 700 mA
VGSB =0.7Vdc
16
14
12
GAIN (dB)
18
10
700 750 800 850 900 950 1000
Gain
ACPR
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
880 MHz
851 MHz
865 MHz 851 MHz
880 MHz
865 MHz
851 MHz
865 MHz
880 MHz
ηD
Gps
VDD =28Vdc,I
DQA = 700 mA
VGSB = 0.7 Vdc, Single--Carrier
W--CDMA
A2T07H310--24SR6
7
RF Device Data
Freescale Semiconductor, Inc.
Table 6. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD =28Vdc,I
DQA = 661 mA,Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P1dB
Zload (1)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
851 1.12 – j2.70 1.13 + j2.77 1.30 – j2.73 19.7 53.1 204 56.2 –8
865 1.16 – j2.79 1.21 + j2.89 1.24 – j2.80 19.5 53.2 210 56.8 –8
880 1.16 – j2.89 1.30 + j3.03 1.19 – j2.87 19.3 53.3 215 57.4 –8
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P3dB
Zload (2)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
851 1.12 – j2.70 1.12 + j2.86 1.29 – j3.01 17.5 54.1 258 59.8 –11
865 1.16 – j2.79 1.20 + j2.98 1.22 – j3.06 17.3 54.2 263 59.2 –11
880 1.16 – j2.89 1.29 + j3.11 1.12 – j3.12 16.9 54.3 268 58.6 –12
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 7. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD =28Vdc,I
DQA = 661 mA,Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P1dB
Zload (1)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
851 1.12 – j2.70 1.08 + j2.78 3.72 – j0.98 23.1 50.5 113 73.7 –16
865 1.16 – j2.79 1.16 + j2.91 3.74 – j0.62 23.2 50.1 101 74.2 –19
880 1.16 – j2.89 1.24 + j3.02 3.23 – j1.04 22.8 50.4 110 72.8 –18
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P3dB
Zload (2)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
851 1.12 – j2.70 1.09 + j2.86 4.40 – j1.30 21.3 50.9 124 75.8 –23
865 1.16 – j2.79 1.17 + j2.97 3.50 – j1.76 20.7 51.7 147 76.1 –21
880 1.16 – j2.89 1.25 + j3.10 3.36 – j1.39 20.7 51.3 135 75.8 –24
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin Zload
Output Load Pull
Tuner and Test
Circuit
8
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
Table 8. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD =28Vdc,V
GSB =0.7Vdc,Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P1dB
Zload (1)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
851 1.12 – j2.70 1.29 + j2.85 0.92 – j3.03 15.1 53.7 237 53.2 –15
865 1.16 – j2.79 1.38 + j2.99 0.94 – j3.06 15.2 53.9 245 55.4 –15
880 1.16 – j2.89 1.48 + j3.15 0.88 – j3.16 14.9 54.0 251 55.0 –15
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P3dB
Zload (2)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
851 1.12 – j2.70 1.28 + j2.95 0.92 – j3.10 13.0 54.8 302 56.8 –19
865 1.16 – j2.79 1.38 + j3.10 0.90 – j3.25 12.8 54.9 310 57.4 –18
880 1.16 – j2.89 1.48 + j3.26 0.88 – j3.26 12.8 55.1 320 58.9 –19
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 9. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD =28Vdc,V
GSB =0.7Vdc,Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P1dB
Zload (1)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
851 1.12 – j2.70 1.19 + j2.73 2.88 – j1.01 16.7 50.7 117 76.2 –26
865 1.16 – j2.79 1.28 + j2.87 2.60 – j1.20 16.6 50.8 121 76.0 –25
880 1.16 – j2.89 1.35 + j3.01 2.49 – j0.76 16.2 50.0 100 76.0 –29
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P3dB
Zload (2)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
851 1.12 – j2.70 1.20 + j2.84 3.23 – j1.20 14.6 51.3 134 77.1 –32
865 1.16 – j2.79 1.30 + j3.01 2.60 – j1.80 14.6 52.1 162 76.6 –29
880 1.16 – j2.89 1.41 + j3.18 2.28 – j2.21 14.4 52.6 183 77.0 –28
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin Zload
Output Load Pull
Tuner and Test
Circuit
A2T07H310--24SR6
9
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 865 MHz
2
0
123 7
1
-- 2
-- 3
4
-- 4
0
-- 5
56
-- 1
2
0
123 7
1
-- 2
-- 3
4
-- 4
0
-- 5
56
-- 1
2
0
123 7
1
-- 2
-- 3
4
-- 4
0
-- 5
56
-- 1
IMAGINARY (Ω)
IMAGINARY (Ω)
IMAGINARY (Ω)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Gain
Drain Efficiency
Linearity
Output Power
Figure 8. P1dB Load Pull Output Power Contours (dBm)
REAL (Ω)
2
0
IMAGINARY (Ω)
123 7
1
-- 2
-- 3
4
-- 4
0
Figure 9. P1dB Load Pull Efficiency Contours (%)
REAL (Ω)
Figure 10. P1dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 11. P1dB Load Pull AM/PM Contours (°)
REAL (Ω)
-- 5
56
-- 1
P
E
49
49.5
50
50.5
51
51.5
52
52.5
53
62
60 58
P
E
64
66
68
70
72
P
E
22
21
21.5
20.5
20 22.5
23
23.5
24
P
E
-- 1 0
-- 6
-- 1 6
-- 1 8
-- 2 0
-- 8 -- 1 2
-- 1 4
-- 2 2
10
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
P3dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 865 MHz
2
0
123 7
1
-- 2
-- 3
4
-- 4
0
-- 5
56
-- 1
IMAGINARY (Ω)
Figure 12. P3dB Load Pull AM/PM Contours (°)
REAL (Ω)
2
0
123 7
1
-- 2
-- 3
4
-- 4
0
-- 5
56
-- 1
2
0
123 7
1
-- 2
-- 3
4
-- 4
0
-- 5
56
-- 1
IMAGINARY (Ω)
IMAGINARY (Ω)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Gain
Drain Efficiency
Linearity
Output Power
Figure 13. P3dB Load Pull Output Power Contours (dBm)
REAL (Ω)
2
0
IMAGINARY (Ω)
123 7
1
-- 2
-- 3
4
-- 4
0
Figure 14. P3dB Load Pull Efficiency Contours (%)
REAL (Ω)
Figure 15. P3dB Load Pull Gain Contours (dB)
REAL (Ω)
-- 5
56
-- 1
-- 1 4 -- 1 6
-- 1 8
-- 2 0
-- 2 2
-- 2 4
-- 2 6
P
E50
50.5
51
51.5
52
52.5
53
53.5
54
62
60
P
E
64
66
68
70
72
P
E
19
18 20.5
17.5 19.5
20
21.5
21
P
E
74
18.5 -- 1 0 -- 1 2
A2T07H310--24SR6
11
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 865 MHz
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
IMAGINARY (Ω)
IMAGINARY (Ω)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Gain
Drain Efficiency
Linearity
Output Power
Figure 16. P1dB Load Pull Output Power Contours (dBm)
REAL (Ω)
-- 5
1
-- 1
IMAGINARY (Ω)
23406
0
-- 2
-- 3
5
-- 4
1
Figure 17. P1dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAGINARY (Ω)
Figure 18. P1dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 19. P1dB Load Pull AM/PM Contours (°)
REAL (Ω)
P
E
50
50.5
51
51.5
52
52.5
53
53.5
P
E
60
62
64
66
68
70
72
74
15.5
15
14.5
13.5
13
14
P
E
16
16.5
15.5
15
P
E
-- 2 6
-- 2 4
-- 2 2
-- 2 0
-- 1 8
-- 1 6
-- 1 4
-- 1 2
-- 2 8
12
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
P3dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 865 MHz
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
IMAGINARY (Ω)
IMAGINARY (Ω)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Gain
Drain Efficiency
Linearity
Output Power
Figure 20. P3dB Load Pull Output Power Contours (dBm)
REAL (Ω)
-- 5
1
-- 1
IMAGINARY (Ω)
23406
0
-- 2
-- 3
5
-- 4
1
Figure 21. P3dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAGINARY (Ω)
Figure 22. P3dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 23. P3dB Load Pull AM/PM Contours (°)
REAL (Ω)
P
E
60
P
E
51.5 51
P
E
11
10.5
12
11.5 12.5 13
13.5 14
14.5 13.5
P
E-- 2 6
-- 2 4 -- 2 2
-- 2 0
-- 1 8
-- 2 8
-- 3 0
-- 3 2
-- 3 4
52
52.5
53
53.5
54
54.5
62
6466
68
70
72
74
76
13.5
A2T07H310--24SR6
13
RF Device Data
Freescale Semiconductor, Inc.
790–822 MHz CHARACTERISTICS
Figure 24. A2T07H310--24SR6 Test Circuit Component Layout — 790–822 MHz
--
--
CUT OUT AREA
C
P
C9
C10
VGGA VDDA
VGGB VDDB
C7
R2
C5
C3
C1
J1
Z1
R1
J2 C4
C2
C11
C14
C6
R3
C8
C12
C13
C15 C16
C18
C17
C33
C19
C29
C30
C21 C22 C23 C24
C25 C26
C27
C28
C31 C32
J4 D59215
C34
C20
J3
A2T07H310--24S
790–821 MHz
Rev. 1
Table 10. A2T07H310--24SR6 Test Circuit Component Designations and Values — 790–822 MHz
Part Description Part Number Manufacturer
C1, C2, C7, C8, C19, C20,
C23, C28
43 pF Chip Capacitors ATC100B430JT500XT ATC
C3, C4, C5, C6, C21, C22,
C25
9.1 pF Chip Capacitors ATC100B9R1CT500XT ATC
C9, C10, C12, C13 10 μF Chip Capacitors GRM31CR61H106KA12 Muruta
C11, C14 7.5 pF Chip Capacitors ATC100B7R5CT500XT ATC
C15, C16, C17, C18, C29,
C30, C31, C32
10 μF Chip Capacitors C5750X7S2A106M230KB TDK
C24 2.7 pF Chip Capacitor ATC100B2R7BT500XT ATC
C26 6.8 pF Chip Capacitor ATC100B6R8CT500XT ATC
C27 4.7 pF Chip Capacitor ATC100B4R7CT500XT ATC
C33, C34 330 μF Electrolytic Capacitors MCRH63V337M13X21–RH Multicomp
J1, J2, J3, J4 Copper Foil
R1 50 Ω, 10 W Termination 81A7031–50–5F Florida RF Labs
R2, R3 2.2 Ω,1/4 W Chip Resistors CRCW12062R20JNEA Vishay
Z1 800–1000 MHz Band, 90°, 3 dB Hybrid Coupler X3C09P1–03S Anaren
PCB Rogers RO4350B, 0.020″,εr=3.66 D59215 MTL
14
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
TYPICAL CHARACTERISTICS — 790–822 MHz
PARC (dB)
-- 5
-- 1
-- 2
-- 3
-- 4
-- 6
760
ACPR
f, FREQUENCY (MHz)
Figure 25. Single--Carrier Output Peak--to--Average Ratio
Compression (PARC) Broadband Performance @ Pout = 47 Watts Avg.
11
21
19
-- 4 5
55
50
45
40
-- 2 0
-- 2 5
-- 3 0
-- 3 5
ηD, DRAIN
EFFICIENCY (%)
ηD
Gps, POWER GAIN (dB)
18
17
16
15
780 800 820 840 860 880 900 960
35
-- 4 0
ACPR (dBc)
PARC
VDD =28Vdc,P
out =47W(Avg.)
IDQA = 700 mA, VGSB =0.7Vdc
Gps
1
ACPR
Pout, OUTPUT POWER (WATTS) AVG.
Figure 26. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
-- 1 0
-- 2 0
16
22
5
65
55
45
35
25
ηD, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
21
20
10 100 200
15 -- 6 0
ACPR (dBc)
19
18
17
-- 3 0
-- 4 0
-- 5 0
Figure 27. Broadband Frequency Response
10
22
f, FREQUENCY (MHz)
VDD =28Vdc
Pin =0dBm
IDQA = 700 mA
VGSB =0.7Vdc
18
16
14
GAIN (dB)
20
12
650 700 750 800 850 900 950
Gain
20
12
13
14
-- 7 0
ηD
Gps
VDD =28Vdc,I
DQA = 700 mA
VGSB = 0.7 Vdc, Single--Carrier
W--CDMA, 3.84 MHz Channel
Bandwidth, Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
790 MHz
806 MHz
822 MHz
790 MHz
806 MHz
822 MHz
806 MHz
822 MHz
790 MHz
Single--Carrier W--CDMA
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
920 940
A2T07H310--24SR6
15
RF Device Data
Freescale Semiconductor, Inc.
Table 11. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD =28Vdc,I
DQA = 680 mA,Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P1dB
Zload (1)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
790 0.96 – j2.26 0.93 + j2.40 1.46 – j2.24 20.4 52.8 192 54.3 –9
806 0.95 – j2.37 0.97 + j2.49 1.43 – j2.35 20.2 52.3 171 50.8 –9
822 1.07 – j2.57 1.02 + j2.60 1.42 – j2.59 19.9 52.3 168 50.3 –8
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P3dB
Zload (2)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
790 0.96 – j2.26 0.90 + j2.48 1.32 – j2.47 18.0 53.8 240 55.5 –12
806 0.95 – j2.37 0.95 + j2.57 1.30 – j2.74 17.7 53.4 218 52.6 –13
822 1.07 – j2.57 1.00 + j2.68 1.36 – j2.90 17.7 53.4 220 53.9 –11
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 12. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD =28Vdc,I
DQA = 680 mA,Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P1dB
Zload (1)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
790 0.96 – j2.26 0.88 + j2.41 4.00 – j0.94 23.4 50.6 114 67.8 –17
806 0.95 – j2.37 0.93 + j2.49 3.65 – j1.48 23.0 50.5 111 63.5 –14
822 1.07 – j2.57 0.99 + j2.61 4.49 – j1.29 23.2 49.9 99 65.5 –13
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P3dB
Zload (2)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
790 0.96 – j2.26 0.87 + j2.49 4.15 – j1.31 21.4 51.3 135 70.7 –23
806 0.95 – j2.37 0.92 + j2.57 3.82 – j1.72 21.0 51.3 136 67.1 –20
822 1.07 – j2.57 0.99 + j2.70 4.56 – j1.89 21.2 51.0 127 69.4 –18
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin Zload
Output Load Pull
Tuner and Test
Circuit
16
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
Table 13. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD =28Vdc,V
GSB =0.7Vdc,Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P1dB
Zload (1)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
790 1.21 – j2.23 1.06 + j2.38 1.11 – j2.38 15.6 53.4 218 54.0 –16
806 1.18 – j2.27 1.11 + j2.50 1.15 – j2.52 15.2 53.1 202 52.6 –16
822 1.32 – j2.41 1.17 + j2.66 1.06 – j2.79 14.8 53.1 203 50.5 –13
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P3dB
Zload (2)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
790 1.21 – j2.23 1.05 + j2.48 1.04 – j2.59 13.3 54.4 275 55.2 –19
806 1.18 – j2.27 1.10 + j2.61 1.00 – j2.78 12.7 54.2 262 52.5 –19
822 1.32 – j2.41 1.16 + j2.76 1.01 – j2.97 12.5 54.2 263 52.5 –16
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 14. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD =28Vdc,V
GSB =0.7Vdc,Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P1dB
Zload (1)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
790 1.21 – j2.23 0.98 + j2.27 3.32 – j0.43 17.0 50.5 113 73.5 –28
806 1.18 – j2.27 1.04 + j2.41 3.04 – j0.87 16.6 50.6 114 69.7 –25
822 1.32 – j2.41 1.10 + j2.55 3.34 – j1.03 16.4 50.5 113 70.8 –21
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P3dB
Zload (2)
(Ω)Gain (dB) (dBm) (W)
ηD
(%)
AM/PM
(°)
790 1.21 – j2.23 0.99 + j2.39 3.41 – j0.81 15.0 51.3 135 73.9 –32
806 1.18 – j2.27 1.05 + j2.52 3.05 – j1.36 14.6 51.7 147 70.9 –29
822 1.32 – j2.41 1.10 + j2.67 3.46 – j1.34 14.3 51.4 138 72.2 –26
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin Zload
Output Load Pull
Tuner and Test
Circuit
A2T07H310--24SR6
17
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 806 MHz
IMAGINARY (Ω)
234075
16
-- 5
1
-- 1
0
-- 2
-- 3
-- 4
IMAGINARY (Ω)
234075
16
-- 5
1
-- 1
0
-- 2
-- 3
-- 4
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Gain
Drain Efficiency
Linearity
Output Power
Figure 28. P1dB Load Pull Output Power Contours (dBm)
REAL (Ω)
-- 5
1
-- 1
IMAGINARY (Ω)
23407
0
-- 2
-- 3
5
-- 4
1
Figure 29. P1dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAGINARY (Ω)
Figure 30. P1dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 31. P1dB Load Pull AM/PM Contours (°)
REAL (Ω)
P
E
50
50.5
51
51.5
48
6
234075
16
-- 5
1
-- 1
0
-- 2
-- 3
-- 4
48.5
48.5
49
49
49.5
52
P
E
60
62
50 52 54 56
58
20.5
20
P
E
21
21.5
22 22.5 23 23.5
24 P
E
-- 1 0
-- 4 -- 6 -- 8
-- 1 2
-- 1 4
-- 1 6
-- 1 8
-- 2 0
18
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
P3dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 806 MHz
IMAGINARY (Ω)
234075
16
-- 5
1
-- 1
0
-- 2
-- 3
-- 4
IMAGINARY (Ω)
234075
16
-- 5
1
-- 1
0
-- 2
-- 3
-- 4
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Gain
Drain Efficiency
Linearity
Output Power
Figure 32. P3dB Load Pull Output Power Contours (dBm)
REAL (Ω)
-- 5
1
-- 1
IMAGINARY (Ω)
23407
0
-- 2
-- 3
5
-- 4
1
Figure 33. P3dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAGINARY (Ω)
Figure 34. P3dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 35. P3dB Load Pull AM/PM Contours (°)
REAL (Ω)
6
234075
16
-- 5
1
-- 1
0
-- 2
-- 3
-- 4
P
E
50
50.5
51
51.5
52
49.5
53 52.5
P
E
60
52
66
54
56
58
62
64
18.5
18
P
E
19
19.5 20 20.5 21 21.5
22 P
E
-- 2 4
-- 2 2
-- 2 0
-- 1 8
-- 1 6
-- 1 0 -- 1 2
-- 8
-- 1 4
A2T07H310--24SR6
19
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 806 MHz
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
IMAGINARY (Ω)
IMAGINARY (Ω)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Gain
Drain Efficiency
Linearity
Output Power
Figure 36. P1dB Load Pull Output Power Contours (dBm)
REAL (Ω)
-- 5
1
-- 1
IMAGINARY (Ω)
23406
0
-- 2
-- 3
5
-- 4
1
Figure 37. P1dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAGINARY (Ω)
Figure 38. P1dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 39. P1dB Load Pull AM/PM Contours (°)
REAL (Ω)
49
50.5
51 49.5
52
52.5
50
51.5
50.5
P
E
60
62
64
66
P
E
54 56
58
68
13.5
13 14
P
E
16.5
12.5 14.5
15 15.5 16
16
P
E
-- 2 6
-- 2 4
-- 2 2
-- 2 0
-- 1 8
-- 1 6
-- 1 4
-- 2 8
-- 3 0
20
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
P3dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 806 MHz
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
-- 5
1
-- 1
23406
0
-- 2
-- 3
5
-- 4
1
IMAGINARY (Ω)
IMAGINARY (Ω)
NOTE: = Maximum Output Power
= Maximum Drain Efficiency
P
E
Gain
Drain Efficiency
Linearity
Output Power
Figure 40. P3dB Load Pull Output Power Contours (dBm)
REAL (Ω)
-- 5
1
-- 1
IMAGINARY (Ω)
23406
0
-- 2
-- 3
5
-- 4
1
Figure 41. P3dB Load Pull Efficiency Contours (%)
REAL (Ω)
IMAGINARY (Ω)
Figure 42. P3dB Load Pull Gain Contours (dB)
REAL (Ω)
Figure 43. P3dB Load Pull AM/PM Contours (°)
REAL (Ω)
P
E50.5 50
51
51.5
52
52.5
53
53.5
54 P
E
60
58
56
54
62
64
66
68
70
11
10.5 11.5 12.5
13 13.5 14
14.5
12
14
P
E-- 2 6 -- 2 4
-- 2 2
-- 2 0
-- 1 8
-- 2 8
-- 3 0
-- 3 2
-- 1 6
P
E
A2T07H310--24SR6
21
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
22
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
A2T07H310--24SR6
23
RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
•AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
•EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
•Electromigration MTTF Calculator
•RF High Power Model
•.s2p File
Development Tools
•Printed Circuit Boards
For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the
Software & Tools tab on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision Date Description
0June 2014 •Initial Release of Data Sheet
24
RF Device Data
Freescale Semiconductor, Inc.
A2T07H310--24SR6
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Document Number: A2T07H310--24S
Rev. 0, 6/2014
