IRF1310NS/L
HEXFET® Power MOSFET
PD - 91514B
lAdvanced Process Technology
lSurface Mount (IRF1310NS)
lLow-profile through-hole (IRF1310NL)
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRF1310NL) is available for low-
profile applications.
Description
VDSS =100V
RDS(on) = 0.036
ID = 42A
2
D P a k
TO-262
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.95
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** 4 0
Thermal Resistance
°C/W
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V42
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V30 A
IDM Pulsed Drain Current  140
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 160 W
Linear Derating Factor 1.1 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy 420 mJ
IAR Avalanche Current22 A
EAR Repetitive Avalanche Energy16 mJ
dv/dt Peak Diode Recovery dv/dt  5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
S
D
G
5/13/98
IRF1310NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 –– –– V VGS = 0V, ID = 250µA
V(BR)DSS/TJBreakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.036 VGS = 10V, ID = 22A
VGS(th) Gate Threshold Voltage 2.0 ––– 4. 0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 14 ––– ––– S VDS = 25V, ID = 22A
––– ––– 25 µA VDS = 100V, V GS = 0V
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -20V
QgTotal Gate Charge –– ––– 110 ID = 22A
Qgs Gate-to-Source Charge ––– ––– 15 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 58 VGS = 10V, See Fig. 6 and 13 
td(on) Turn-On Delay Time ––– 11 ––– VDD = 50V
trRise Time ––– 56 ––– ID = 22A
td(off) Turn-Off Delay Time ––– 45 –– RG = 3.6
tfFall Time –– 40 –– RD = 2.9Ω, See Fig. 10 
Between lead,
––– ––– and center of die contact
Ciss Input Capacitance ––– 1900 ––– VGS = 0V
Coss Output Capacitance ––– 450 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 230 ––– ƒ = 1.0MHz, See Fig. 5
IGSS
ns
IDSS Drain-to-Source Leakage Current
nH
7.5
LSInternal Source Inductance
Starting TJ = 25°C, L = 1.7mH
RG = 25, IAS = 22A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Notes:
ISD 22A, di/dt 180A/µs, V DD V(BR)DSS,
TJ 175°C
Pulse width 300µs; duty cycle 2%.
Uses IRF1310N data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended soldering techniques refer to application note #AN-994.
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) 
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS =22A, VGS = 0V
trr Reverse Recovery Time ––– 180 270 n s TJ = 25°C, IF = 22A
Qrr Reverse Recovery Charge ––– 1.2 1.8 µC di/dt = 100A/µs 
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S+LD)
Source-Drain Ratings and Characteristics
S
D
G
42
140 A
IRF1310NS/L
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
1000
0.1 1 10 100
20us PULSE WIDTH
T = 25 C
Jo
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
1000
0.1 1 10 100
20us PULSE WIDTH
T = 175 C
Jo
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
1000
4.0 5.0 6.0 7.0 8.0 9.0 10.0
V , Gate-to-Source Volta
g
e (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
Jo
T = 175 C
Jo
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
o
V =
I =
GS
D
10V
36A
Fig 4. Normalized On-Resistance
Vs. Temperature
VDS= 50V
20µS PULSE WIDTH
IRF1310NS/L
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1 10 100
0
500
1000
1500
2000
2500
3000
3500
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss
g
s
g
d , ds
rss
g
d
oss ds
g
d
Ciss
Coss
Crss
020 40 60 80 100 120
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
22A
V = 20V
DS
V = 50V
DS
V = 80V
DS
0.1
1
10
100
1000
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
V ,Source-to-Drain Volta
g
e (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS 1
10
100
1000
1 10 100 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T = 175 C
= 25 C
J
Co
o
V , Drain-to-Source Volta
g
e (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
IRF1310NS/L
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
10V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
25 50 75 100 125 150 175
0
10
20
30
40
50
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRF1310NS/L
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
25 50 75 100 125 150 175
0
200
400
600
800
1000
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
o
ID
TOP
BOTTOM
9.0A
16A
22A
IRF1310NS/L
Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
*
IRF1310NS/L
D2Pak Package Outline
D2Pak
Part Marking Information
10.16 (.400)
R EF.
6.47 (.255 )
6.18 (.243 )
2.61 (.1 0 3 )
2.32 (.0 9 1 )
8.89 (.350)
REF.
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
5 .28 (.208)
4 .78 (.188)
4.69 (.185)
4.20 (.165)
10.54 (.415)
10.29 (.405)
- A -
2
1 3 15 .4 9 (.6 10)
14 .7 3 (.5 80)
3X 0.93 (.037)
0.69 (.027)
5 .08 (.200)
3X 1.40 (.055)
1.14 (.045)
1.78 (.070)
1.27 (.050)
1.40 (.055)
MAX .
NOTES:
1 DIMENSIONS AFTER SOLDER DIP.
2 DIMENSIONING & TOLE RANCING PER ANSI Y14.5M, 1982.
3 CONTROLLING DIMENSION : INCH.
4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
0.55 (.022)
0.46 (.018)
0.25 ( .0 10 ) M B A M MINIMUM RECOMMENDE D FOOTPRINT
11.43 (.450)
8.89 (.3 5 0 )
17 .78 (.700)
3.81 (.150)
2.08 (.082)
2X
LEAD ASSIGNMENTS
1 - G AT E
2 - D RAIN
3 - SO UR CE
2.54 (.100)
2X
PAR T N UM BER
INTERNATIONAL
RE CTIFIE R
LO GO DATE CODE
(YYW W )
YY = YEAR
WW = WEEK
A S SEMBLY
LOT CO D E
F530S
9B 1 M
9246
A
IRF1310NS/L
Package Outline
TO-262 Outline
TO-262
Part Marking Information
IRF1310NS/L
Tape & Reel Information
D2Pak
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 5/98
3
4
4
TRR
FEED DIRECTION
1.85 (.07 3)
1.65 (.06 5)
1.60 (.063)
1.50 (.059)
4.10 (.16 1)
3.90 (.15 3)
TRL
FE ED D IRE CTIO N
10 .9 0 (.429)
10 .7 0 (.421) 16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.3 68 (.0145)
0.3 42 (.0135)
1 .60 (.063)
1 .50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
2 7.4 0 (1.079)
2 3.9 0 (.9 41)
60.00 (2.362)
MIN.
3 0.40 (1.197)
M A X .
26.40 (1.0 39)
24 .40 ( .961 )
NOT ES :
1. CO M F O R M S TO E IA -418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIM ENSIO N MEASUR ED @ HUB.
4. INCLUDES FLANGE D ISTOR TION @ OUTER EDGE.
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/