S-24C04C
www.sii-ic.com 2-WIRE SERIAL E2PROM
© Seiko Instruments Inc., 2010-2011 Rev.3.1_00_C
Seiko Instruments Inc. 1
The S-24C04C is a 2-wire, low current consumption and wide range operation serial E2PROM. The S-24C04C has the
capacity of 4 K-bit, and the organization is 512 words × 8-bit. Page write and sequential read are available.
Features
Operating voltage range Read: 1.6 V to 5.5 V
Write: 1.7 V to 5.5 V
Page write: 16 bytes / page
Sequential read
Operation frequency: 400 kHz (VCC = 1.6 V to 5.5 V)
Write time: 5.0 ms max.
Noise suppression: Schmitt trigger and noise filter on input pins (SCL, SDA)
Write protect function during the low power supply voltage
Endurance: 106cycles / word*1 (Ta = +25°C)
Data retention: 100 years (Ta = +25°C)
Memory capacity 4 K-bit
Write protect: 100%
Initial shipment data: FFh
Lead-free (Sn 100%), halogen-free*2
*1. For each address (Word: 8-bit)
*2. Refer to “ Product Name Structure” for details.
Packages
8-Pin SOP (JEDEC)
8-Pin TSSOP
TMSOP-8
SNT-8A
Caution This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or
automobile equipment including car audio, keyless entry and engine control unit, contact to SII is
indispensable.
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
2
Pin Configurations
1. 8-Pin SOP (JEDEC)
2. 8-Pin TSSOP
8-Pin SOP (JEDEC)
Top view Table 1
Pin No. Symbol Description
1 NC*1 No connection
2 A1 Slave address input
3 A2 Slave address input
4 GND Ground
5 SDA*2 Serial data I/O
6 SCL*2 Serial clock input
7 WP
Write protect input
Connected to VCC: Protection valid
Open or connected to GND: Protection invalid
8 VCC Power supply
*1. Connect to GND or VCC.
*2. Do not use it in high impedance.
7
6
5
8
2
3
4
1
Figure 1
S-24C04CI-J8T1U
8-Pin TSSOP
Top view Table 2
Pin No. Symbol Description
1 NC*1 No connection
2 A1 Slave address input
3 A2 Slave address input
4 GND Ground
5 SDA*2 Serial data I/O
6 SCL*2 Serial clock input
7 WP
Write protect input
Connected to VCC: Protection valid
Open or connected to GND: Protection invalid
8 VCC Power supply
*1. Connect to GND or VCC.
*2. Do not use it in high impedance.
7
6
5
8
2
3
4
1
Figure 2
S-24C04CI-T8T1U
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 3
3. TMSOP-8
4. SNT-8A
Remark Refer to the “Package drawings” for the details.
TMSOP-8
Top view Table 3
Pin No. Symbol Description
1 NC*1 No connection
2 A1 Slave address input
3 A2 Slave address input
4 GND Ground
5 SDA*2 Serial data I/O
6 SCL*2 Serial clock input
7 WP
Write protect input
Connected to VCC: Protection valid
Open or connected to GND: Protection invalid
8 VCC Power supply
*1. Connect to GND or VCC.
*2. Do not use it in high impedance.
7
6
5
8
2
3
4
1
Figure 3
S-24C04CI-K8T3U
SNT-8A
Top view Table 4
Pin No. Symbol Description
1 NC*1 No connection
2 A1 Slave address input
3 A2 Slave address input
4 GND Ground
5 SDA*2 Serial data I/O
6 SCL*2 Serial clock input
7 WP
Write protect input
Connected to VCC: Protection valid
Open or connected to GND: Protection invalid
8 VCC Power supply
*1. Connect to GND or VCC.
*2. Do not use it in high impedance.
7
6
5
8
2
3
4
1
Figure 4
S-24C04CI-I8T1U
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
4
Block Diagram
VCC
GND
SCL
SDA
DIN
DOUT
R / W
LOAD INC
COMP
LOAD
WP
Start / Stop
Detector
Serial Clock
Controller High-Voltage Generator
Voltage Detector
Device Address
Comparator
Address
Counter
Y Decoder
Data Register
Memory Cell Array
X Decoder
Selector
Data Output
ACK Output
Controller
A2
A1
Figure 5
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 5
Absolute Maximum Ratings
Table 5
Item Symbol Absolute Maximum Ratings Unit
Power supply volt age VCC 0.3 to +6.5 V
Input voltage VIN 0.3 to +6.5 V
Output voltage VOUT 0.3 to +6.5 V
Operation ambient temperature Topr 40 to +85 °C
Storage temperature Tstg 65 to +150 °C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
Recommended Operating Conditions
Table 6
Ta = 40°C to +85°C
Item Symbol Condition
Min. Max.
Unit
Read Operation 1.6 5.5 V
Power supply volt age VCC Write Operation 1.7 5.5 V
High level input voltage VIH VCC = 1.6 V to 5.5 V 0.7 × VCC 5.5 V
Low level input voltage VIL VCC = 1.6 V to 5.5 V 0.3 0.3 × VCC V
Pin Capacitance
Table 7 (Ta = +25°C, f = 1.0 MHz, V CC = 5.0 V)
Item Symbol Condition Min. Max. Unit
Input capacitance CIN VIN = 0 V (SCL, A1, A2, WP) 10 pF
I/O capacitance CI/O VI/O = 0 V (SDA) 10 pF
Endurance
Table 8
Item Symbol Operation Ambient Temperature Min. Max. Unit
Endurance NW Ta = +25°C 106 cycles / word*1
*1. For each address (Word: 8 bits)
Data Retention
Table 9
Item Symbol Operation Ambient Temperature Min. Max. Unit
Data retention Ta = +25°C 100 year
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
6
DC Electrical Characteristics
Table 10
Ta = 40°C to +85°C
VCC = 1.6 V to 5.5 V
fSCL = 400 kHz
Item Symbol Condition
Min. Max.
Unit
Current consumption (READ) ICC1 0.8 mA
Table 11
Ta = 40°C to +85°C
VCC = 1.7 V to 5.5 V
fSCL = 400 kHz
Item Symbol Condition
Min. Max.
Unit
Current consumption (WRITE ) ICC2 2.5 mA
Table 12
Ta = 40°C to +85°C
VCC = 2.5 V to 5.5 V VCC = 1.8 V to 5.5 V VCC = 1.6 V to 1.8 V
Item
Symbol
Condition
Min. Max. Min. Max. Min. Max.
Unit
Standby current
consumption ISB V
IN = VCC or GND 3.5 3.5 2.0 μA
Input leakage current 1 ILI1 SCL, SDA,
VIN = GND to VCC 1.0 1.0 1.0 μA
Input leakage current 2 ILI2 A1, A2
VIN > 0.7 × VCC
At standby mode 1.0 1.0 1.0 μA
Output leakage current ILO SDA
VOUT = GND to VCC 1.0 1.0 1.0 μA
Input current 1 IIL WP
VIN < 0.3 × VCC 50.0 50.0 50.0 μA
Input current 2 IIH WP
VIN > 0.7 × VCC 2.0 2.0 2.0 μA
Input Impedance 1 ZIL WP
VIN = 0.3 × VCC 30 30 30 kΩ
Input Impedance 2 ZIH WP
VIN = 0.7 × VCC 500 500 500 kΩ
IOL = 3.2 mA 0.4 V
IOL = 1.5 mA 0.3 0.3 0.3 V
Low level output voltage VOL IOL = 0.7 mA 0.2 0.2 0.2 V
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 7
AC Electrical Characteristics
Table 13 Measurement Conditions
Input pulse voltage 0.2 × VCC to 0.8 × VCC
Input pulse rising / falling time 20 ns or less
Output reference voltage 0.3 × VCC to 0.7 × VCC
Output load 100 pF
0.8 × VCC
Input pulse voltage Output reference voltage
0.2 × VCC
0.7 × VCC
0.3 × VCC
Figure 6
Input / Output Waveform during AC Measurement
Table 14
Ta = 40°C to +85°C
VCC = 1.6 V to 5.5 V
Item Symbol
Min. Max.
Unit
SCL clock frequency fSCL 0 400 kHz
SCL clock time “L” tLOW 1.3 μs
SCL clock time “H” tHIGH 0.6 μs
SDA output delay time tAA 0.1 0.9 μs
SDA output hold time tDH 50 ns
Start condition setup time tSU.STA 0.6 μs
Start condition hold time tHD.STA 0.6 μs
Data input setup time tSU.DAT 100 ns
Data input hold time tHD.DAT 0 ns
Stop condition setup time tSU.STO 0.6 μs
SCL, SDA rising time tR 0.3 μs
SCL, SDA falling time tF 0.3 μs
WP setup time tWS1 0 μs
WP hold time tWH1 0 μs
WP release setup time tWS2 0 μs
WP release hold time tWH2 0 μs
Bus release time tBUF 1.3 μs
Noise suppression time tI 50 ns
SCL
SDA
(input)
SDA
(output)
tBUF
tR
tSU.STO
tSU.DAT
tHD.DAT
tDH
tAA
tHIGH tLOW
tHD.STA
tSU.STA
tF
Figure 7 Bus Timing
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
8
Table 15
Ta = 40°C to +85°C
VCC = 1.7 V to 5.5 V
Item Symbol
Min. Max.
Unit
Write time tWR 5.0 ms
SCL
SDA D0
Write data Acknowledgment
Signal Stop Condition Start Condition
tWR
Start Condition
WP
(valid)
WP
(invalid)
tWS1 tWH1
tWS2 tWH2
Figure 8 Write Cycle Timing
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 9
Pin Functions
1. A1 and A2 (Slave address input) pins
In the S-24C04C, to set the slave address, connect each pin of A1, A2 to GND or VCC. Therefore the users can set 4
types of slave address by a combination of A1, A2 pins.
Comparing the slave address transmitted from the master device and one that you set, makes possible to select t he
S-24C04C from other devices connected onto the bus.
Each A1 and A2 pin has a pull-down resistor. In open, these pins have the status when they are connected to GND.
2. SDA (Serial data input / output) pin
The SDA pin is used for the bi-directional transmission of serial data. T his pin is a signal input pin, and an Nch open
drain output pin.
In use, generally, connect the SDA line to any other device which has the open-drain or open-collector output with
Wired-OR connection by pulling up to VCC by a resistor (Figure 9 shows the relation with an output load).
3. SCL (Serial clock input) pin
The SCL pin is used for the serial clock input. Since the signals are processed at a rising or falling edge of the SCL
clock, pay attention to the rising and falling time and comply with the specification.
4. WP (Write protect input) pin
The write protect is enabled by connecting the WP pin to VCC When not using the write protect, connect this pin to
GND or set in open.
Value of load capac it y
[pF]
100
10
0
2
4
6
8f
SCL
= 400 kHz
Maximum value of
pull-up resistor
[kΩ] 10
12
14
16
18
20
Figure 9 Output Load
Initial Shipment Data
Initial shipment data of all addresses is “FFh”.
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
10
Operation
1. Start condition
Start is identified by a high to low transition of the SDA line while the SCL line is stable at high.
Every operation begins from a start condition.
2. Stop condition
Stop is identified by a low to high transition of the SDA line while the SCL line is stable at high.
When a device receives a stop condition during a read sequence, the read operation is interrupted, and the device
enters standby mode.
When a device receives a stop condition during a write sequence, the reception of t he write data is halted, and the S-
24C04C initiates a write cycle.
tSU.STA tHD.STA tSU.STO
Start Condition Stop Condition
SCL
SDA
Figure 10 Start / Stop Conditions
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 11
3. Data transmission
Changing the SDA line while the SCL line is low, data is transmitted.
Changing the SDA line while the SCL line is high, a start or stop condition is recognized.
tSU.DAT tHD.DAT
SCL
SDA
Figure 11 Data Transmission Timing
4. Acknowledge
The unit of data t ransmission is 8 bits. During the 9th clo ck cycle period the receiver on the bus pulls down t he SDA
line to acknowledge the receipt of the 8-bit data.
When an internal write cycle is in progress, the device does not generate an acknowledge.
1 89
Acknowledge
Output
tAA tDH
Start Condition
SCL
(E2PROM Input)
SDA
(Master Output)
SDA
(E2PROM Output)
Figure 12 Acknowledge Output Timing
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
12
5. Device addressing
To start communication, the master device on t he system generates a start condit ion to the bus line. Next, the master
device sends 7-bit device address and a 1-bit read / write instruction code on to the SDA bus.
The higher 4 bits of t he device address are the “Device Code”, and are fixed to “1010”.
In the S-24C04C, successive 2 bits are the “Slave Address” . These 2 bits are used to identify a device on the system
bus and are compared with the predetermined value which is defined by the address input pins (A2, A1). When the
comparison result matches, the slave device responds with an acknowledge during t he 9th clock cycle.
The successive 1 bit (P0) is used to define a page address and choose the two 256-byte memory blocks (Address
000h to 0FFh and 100h to 1FFh).
Slave
Address
Device Code
MSB LSB
1 0 1 0 A2 A1 P0 R / W
S-24C04C
Figure 13 Device Address
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 13
6. Write
6. 1 Byte write
When the master sends a 7-bit device address and a 1-bit read / write instruction code set to “0”, f ollowing a start
condition, the S-24C04C acknowledges it. The S-24C04C then receives an 8-bit word address and responds with
an acknowledge. After the S-24C04C receives 8-bit write data and responds with an acknowledge, it receives a
stop condition and that initiates the write cycle at the addressed memory.
During the write cycle all operations are forbidden and no acknowledge is generated.
A2 A1
P0
S
T
A
R
T
1 0 1 0
W
R
I
T
E
DEVICE
ADDRESS
R
/
W
M
S
B
SDA LINE
A
C
K
L
S
B
WORD ADDRESS
A
C
K
0
S
T
O
P
DATA
W7 W6 W5 W4 W3 W2 W1 W0 D7 D6 D5
D4
D3
D2
D1
D0
A
C
K
A
C
K
Figure 14 Byte Write
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
14
6. 2 Page write
The page write mode allows up to 16 bytes to be writ ten in a single write operation in the S-24C04C.
Its basic process to transmit data is as same as byte write, but it operates page write by sequentially receiving 8-
bit write data as much data as the page size has.
When the S-24C04C receives a 7-bit device address and a 1-bit read / write instruction code set to “0”, following a
start condition, it generates an acknowledge. Then the S-24C04C receives an 8-bit word address, and responds
with an acknowledge. Af t er the S-24C04C receives 8-bit write data and responds with an acknowledge, it receives
8-bit write data corresponding to the next word address, and generates an acknowledge. The S-24C04C repeats
reception of 8-bit write data and generation of acknowledge in succession. The S-24C04C can receive as many
write data as the maximum page size.
Receiving a stop condition initiates a write cycle of the area starting from the designated memory address and
having the page size equal to the received write data.
R
/
W
S
T
A
R
T
1
0
1
0
W
R
I
T
E
S
T
O
P
DEVICE
ADDRESS DATA (n)
WORD ADDRESS (n)
M
S
B
SDA
LINE
A2
A1
P0
A
C
K
L
S
B
A
C
K
A
C
K
0
W7
W6
W5
W4
W3
W2
W1W0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D0
D7
D0
A
C
K
A
C
K
DATA (n + 1) DAT A (n + x)
Figure 15 Page Write
In the S-24C04C, the lower 4 bits of the word address are automatically incremented every time when the S-
24C04C receives 8-bit write data. If the size of the write data exceeds 16 bytes, the upper 4 bits of the word
address and page address (P0) remain unchanged, and the lower 4 bits are rolled over and t he last 16-byte data
that the S-24C04C received will be overwritten.
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 15
6. 3 Write protect
Write protect is available in the S-24C04C. When the WP pin is connected to the VCC, write operation to memory
area is forbidden at all.
When the WP pin is connected to GND or set in open, the write protect is invalid, and write operation in all
memory area is available.
Fix the level of the WP pin from start condition in the write operation (byte write, page write) until stop condition. If
the WP pin changes during this time, the address dat a being written at this time is not guaranteed. Regarding the
timing of write protect, refer to Figure 8.
In not using the write protect, connect the WP pin t o GND or set it open. The write protect is valid in the range of
operation power supply voltage.
As seen in Figure 16 when the write protect is valid, the S-24C 04C does not generate an acknowledgment signal
after data input.
A2 A1
P0
S
T
A
R
T
1 0 1 0
W
R
I
T
E
DEVICE
ADDRESS
R
/
W
M
S
B
SDA LINE
A
C
K
L
S
B
WORD ADDRESS
A
C
K
0
S
T
O
P
DATA
W7 W6 W5 W4 W3 W2 W1 W0 D7 D6 D5 D4
D3
D2
D1
D0
A
C
K
N
A
C
K
WP
Figure 16 Write Protect
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
16
6. 4 Acknowledge polling
Acknowledge polling is used to know the completion of the write cycle in the S-24C04C.
After the S-24C04C receives a stop condition and once st arts the write cycle, all operations are forbidden and no
response is made to the signal transmitted by the master device.
Accordingly the master device can recognize the completion of the write cycle in the S-24C04C by detecting a
response from the slave device after transmitting the start condition, the device address and the read / write
instruction code to the S-24C04C, namely to the slave devices.
That is, if the S-24C04C does not generate an acknowledge, the write cycle is in progress and if the S-24C04C
generates an acknowledge, the write cycle has been completed.
It is recommended to use the read instruction “1” as the read / write instruction code transmitted by the master
device.
S
T
A
R
T
A
C
K
N
A
C
K
Remark Users are able to input word address and data after ACK output in acknowledge polling during write.
Users are able to read data after AC K output in acknowledge polling during read. However, aft er that users input
the write instruction, a start condition may not be input during data output. Input a stop condition and the next
instruction af ter data out put and ACK output.
SDA
LINE
DEVICE
ADDRESS
DATA
D2
D1
D0
S
T
O
P
tWR
S
T
A
R
T
S
T
A
R
T
A
C
K
SDA
LINE
DATA
D2
D1
D0
S
T
O
P
tWR
S
T
A
R
T
N
A
C
K
S
T
O
P
D
A
TA
NO ACK from
Master Device
R
E
A
D
R
/
W
1
W
R
I
T
E
R
/
W
0
DEVICE
ADDRESS
W
R
I
T
E
R
/
W
0
DEVICE
ADDRESS
DEVICE
ADDRESS
R
E
A
D
R
/
W
1
Acknowledge polling during write
Acknowledge polling during read
A
C
K
S
T
A
R
T
DEVICE
ADDRESS
R
/
W
A
C
K
WORD
ADDRESS
Figure 17 Usage Example of Acknowledge Polling
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 17
7. Read
7. 1 Current address read
Either in writing or in reading the S-24C04C holds the last accessed memory address. The memory address is
maintained as long as the power voltage does not decrease less than the operating voltage.
The master device can read the data at the memory address of the current address pointer without assigning the
word address as a result, when it recognizes the position of the address pointer in the S-24C04C. This is called
“Current Address Read”.
In the following the address counter in the S-24C04C is assumed to be “n”.
When the S-24C04C receives a 7-bit device address and a 1-bit read / wr ite instruction code set to “1” following a
start condition, it responds with an acknowledge.
Next, an 8-bit data at the address “n” is sent from the S-24C04C synchronous to the SCL clock. The address
counter is incremented and the content of the address counter becomes n + 1.
The master device outputs stop condition not an acknowledge, the reading of S-24C04C is ended.
S
T
A
R
T
R
E
A
D
S
T
O
P
DEVICE
ADDRESS
R
/
W
M
S
B
SDA LINE A2 A1 X D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
L
S
B
1
DATA
NO ACK from
Master Device
0 1 0 1
Figure 18 Curren t Address Read
Attention should be paid to the following point on the recognition of the address pointer in the S-24C04C.
In Read, the memory address counter in the S-24C04C is automatically incremented after output of the 8th bit of
the data. In Write, on the other hand, the upper bits of the memory address (the upper bits of the word address
and the page address*1) are left unchanged and are not incremented.
1. In the S-24C04C, the upper 4 bits of the word address and the page address P0
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
18
7. 2 Random read
Random read is used to read the data at an arbitrary memory address.
A dummy write is performed to load the memory address into the address counter.
When the S-24C04C receives a 7-bit device address and a 1-bit read / wr ite instruction code set to “0” following a
start condition, it responds with an acknowledge.
And the S-24C04C receives 8-bit word address and responds with an acknowledge. The memory address is
loaded to the address counter in the S-24C04C by these operations. Reception of wr ite data does not follow in a
dummy write whereas reception of write data follows in byte write and in page write.
Since the memory address is loaded into the memory address counter by dummy write, the master device can
read the data starting from the arbitrary memory address by transmitting a new start condition and performing the
same operation in the current address read.
That is, when the S-24C04C receives a 7-bit device address and a 1-bit read / write instruction code set to “1”,
following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from the S-
24C04C in synchronous to the SCL clock. The master device outputs stop condition not an acknowledge, the
reading of S-24C04C is ended.
SDA
LINE
S
T
A
R
T
1 0 1 0
W
R
I
T
E
DEVICE
ADDRESS WORD ADDRESS (n)
R
/
W
M
S
B
A2 A1 P0
A
C
K
L
S
B
W7
W6
W5
W4 W3 W2 W1 W0
A
C
K
0
DUMMY WRITE
S
T
O
P
S
T
A
R
T
1 0 1 0
R
E
A
D
DEVICE
ADDRESS
R
/
W
M
S
B
A2 A1 X
A
C
K
L
S
B
1
NO ACK from
Master Device
DATA
D7 D6
D5
D4
D3
D2
D1 D0
Figure 19 Random Read
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 19
7. 3 Sequential read
When the S-24C04C receives a 7-bit device address and a 1-bit read / write instruction code set to “1” following a
start condition both in current address read and random read, it responds with an acknowledge.
When an 8-bit data is output from the S-24C04C synchronous to the SCL clock, the address counter is
automatically incremented.
When the master device responds with an acknowledge, the data at the next memory address is transmitted.
Response with an acknowledge by the master device has the memory address counter in the S-24C04C
incremented and makes it possible to read data in succession. This is called “Sequential Read”.
The master device outputs stop condition not an acknowledge, the reading of S-24C04C is ended.
Data can be read in succession in the sequential read mode. When t he memory address counter reaches the last
word address, it rolls over to the first word address.
R
E
A
D
S
T
O
P
DEVICE
ADDRESS
R
/
W
A
C
K
A
C
K
A
C
K
1
A
C
K
SDA
LINE
DATA (n)
D7
D0
D7
D0
D7
D0 D7 D0
DATA (n + 1) DAT A (n + 2) DATA (n + x)
NO ACK from
Master Device
Figure 20 Sequential Read
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
20
Write Protect Function during the Low Power Supply Voltage
The S-24C04C has a built-in detection circuit which operates with the low power supply voltage, cancels Write when the
power supply voltage drops and power-on. Its detection and release voltages are 1.20 V typ. (Refer to Figure 21).
The S-24C04C cancels Write by detecting a low power supply voltage when it receives a stop condit ion.
In the data trasmission and the Write operation, data in the address written during the low power supply voltage is not
assurable.
Release Voltage (+VDET)
1.20 V typ.
Power Supply Voltage
Detection Voltage (VDET)
1.20 V typ.
Write Instruction cancel
Figure 21 Operation during Low Power Supply Voltage
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 21
Using S-24C04C
1. Adding a pull-up resistor to SDA I/O pin and SCL input pin
In consideration of I2C-bus protocol f unction, the SDA I/O pins should be connected with a pull-up resistor.
The S-24C04C cannot transmit normally without using a pull-up resistor.
In case that the SCL input pin of the S-24C04C is connected to the Nch open drain output pin of the master device,
connect the SCL pin with a pull-up resistor. As well, in case the SCL input pin of the S-24C04C is connect ed t o the t ri-
state output pin of the master device, connect the SCL pin with a pull-up resistor in order not to set it in high
impedance. This prevents the S-24C04C from error caused by an uncertain output (high impedance) fr om the t ri-st ate
pin when resetting the master device during the voltage drop.
2. Equivalent circuit of input and I/O pin
Each pin (SCL, SDA) of the S-24C04C does not have a built-in pull-down or pull-up resistor. The WP, A1, A2 pin
includes a pull-down resistor. The SDA line has an open-drain output. The followings are equivalent circuits of the
pins.
SCL
Figure 22 SCL Pin
SDA
Figure 23 SDA Pin
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
22
WP
Figure 24 WP Pin
A1, A2
Figure 25 A1, A2 Pins
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 23
3. Phase adjustment during S-24C04C access
The S-24C04C does not have a pin to reset (the internal circuit). The users cannot forcibly reset it externally. If the
communication to the S-24C04C interrupted, the users need to handle it as you do for software.
In the S-24C04C, users are able to reset the internal circuit by inputting a start condition and a stop condition.
Although the reset signal is input to the master device, the S-24C04C’s internal circuit does not go in reset, but it does
by inputting a stop condition to the S-24C04C. The S-24C04C keeps the same status thus cannot do the next
operation. Especially, this case corresponds to that only the master device is reset when the power supply voltage
drops.
If the power supply voltage restored in this status, input the instruction after resetting (adjusting the phase with the
master device) the S-24C04C. How to reset is shown below.
[How to reset S-24C04C]
The S-24C04C is able to be reset by a start and stop instructions. When the S-24C04C is reading data “0” or is
outputting the acknowledgment signal, outputs “0” to the SDA line. In this status, the master device cannot output
an instruction to the SDA line. I n this case, terminate the acknowledgment output operation or the Read operation,
and then input a start instruction. Figure 26 shows this procedure.
First, input a start condition. Then transmit 9 clocks (dummy clock) of SCL. During this time, the master device sets
the SDA line to “H”. By this operation, the S-24C04C interrupts the acknowledgment output operation or data
output, so input a start condition*1. When a start condition is input, the S-24C04C is reset. To make doubly sure,
input the stop condition to t he S-24C04C. The normal operation is then possible.
1 2 8 9
SCL
SDA
Start
Condition
Stop
Condition
Start
Condition
Dumm
y
Clock
Figure 26 Resetting S-24C04C
*1. After 9 clocks (dummy clock), if the SCL clock continues to being output without inputting a start condition, S-
24C04C may go in the write operation when it receives a stop condition. T o prevent this, input a start condition
after 9 clocks (dummy clock).
Remark Regarding this reset procedure with dummy clock, it is recommended to perform at the system
initialization after applying the power supply voltage.
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
24
4. Acknowledge check
The I2C-bus protocol includes an acknowledge check function as a handshake function to prevent a communication
error. This function allows detection of a communication failure during data communication between the master
device and S-24C04C. This function is effective to prevent malfunction, so it is recommended to perform an
acknowledge check with the mast er device.
5. Built-in power-on-clear circuit
The S-24C04C has a built-in power-on-clear circuit that initializes itself at the same time during power-on.
Unsuccessful initialization may cause a malfunction. To operate the power-on-clear circuit normally, the following
conditions must be satisfied to raise the power supply voltage.
5. 1 Raising power supply voltage
Shown in Figure 27, raise the power supply voltage from 0.2 V max., within the time defined as tRISE which is the
time required to reach the power supply voltage to be set.
For example, if the power supply voltage is 5.0 V, tRISE = 200 ms seen in Figure 28. The power supply voltage
must be raised within 200 ms.
0.2 V
V
INIT
max.
t
INIT*2
max.
t
RISE
max.
Power Supply Voltage (V
CC
)
0 V
*1
*1. 0 V means there is no difference in potential between the VCC pin and the GND pin of the S-24C04C.
*2. tINIT is the time required to initialize the S-24C04C. No instructions are accepted during this time.
Figure 27 Raising Power Supply Voltage
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 25
Rise Time (t
RISE
) max.
[ms]
Power Supply Voltage (V
CC
)
[V]
50
5.0
4.0
3.0
2.0
100 150 200
For example: If the supply voltage = 5.0 V, raise the power supply voltage to 5.0 V within 200 ms.
Figure 28 Rise Time of Power Supply Voltage
When initialization is successfully completed by the power-on-clear circuit, the S-24C04C enters the standby
status.
If the power-on-clear circuit does not operate;
The S-24C04C has not completed initialization, an instruction previously input is still valid or an instruction may be
inappropriately recognized. In this case, S-24C04C may perform the Write operation.
The voltage drops due to power off while the S-24C04C is being accessed. Even if the master device is reset due
to the low power voltage, the S-24C04C may malfunction unless the power-on-clear operation conditions of S-
24C04C are satisfied.
When not using this rise time seen in Figure 28, adjust the phase (reset) to reset the internal circuit in the S-
24C04C normally.
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
26
5. 2 Initialization time
The S-24C04C initializes at the same time when the power supply voltage is raised. Input instructions to the S-
24C04C after initialization. S-24C04C does not accept any instruction during init ialization.
Figure 29 shows the initialization time of the S-24C04C.
Rise Time (t
RISE
)
[s]
Initialization T ime
(t
INIT
) max.
[s]
100 m
10 m
1.0 m
100 μ
10 μ
1.0 μ
1.0 μ 10 μ 100 μ 1.0 m 10 m 100 m
Figure 29 Initialization Time of S-24C04C
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 27
6. Data hold time (tHD.DAT = 0 ns)
If SCL and SDA of the S-24C04C are changed at the same time, it is necessary to prevent a start / stop condition
from being mistakenly recognized due to the effect of noise.
The S-24C04C may error if it does not recognize a start / stop condition correctly during transmission.
In the S-24C04C, it is recommended to set the delay time of 0.3 μs minimum from a falling edge of SCL for the SDA.
This is to prevent S-24C04C from going in a start / stop condition due to the time lag caused by the load of the bus
line.
SCL
SDA
t
HD.DAT
= 0.3 μs min.
Figure 30 S-24C04C Data Hold Time
7. SDA pin and SCL pin noise suppression time
The S-24C04C includes a built-in low-pass filter at the SDA and SCL pins to suppress noise. This means that if the
power supply voltage is 5.0 V, noise with a pulse width of 100 ns or less can be suppressed.
For details of the assurable value, refer to noise suppression t ime (tl) in Table 14.
200
100
300
2 3 4 5
Noise Suppres sion T ime (t
I
) max.
[ns]
Power Supply Voltage (V
CC
)
[V]
Figure 31 Noise Suppression Time for SDA and SCL Pins
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
28
8. Operation when input stop condition during input write data
The S-24C04C does the write operation only when it receives data of 1 byte or more and receives a stop condition
immediately after ACK output.
Refer to Figure 32 regarding details.
R
/
W
S
T
A
R
T
1
0
1
0
W
R
I
T
E
S
T
O
P
DEVICE
ADDRESS DATA (n)
WORD ADDRESS (n)
M
S
B
SDA
LINE
A2
A1
P0
A
C
K
L
S
B
A
C
K
A
C
K
0
W7
W6
W5
W4
W3
W2
W1
W0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D0
D7
D0
Write valid
by stop condition
A
C
K
A
C
K
DATA (n + 1) DATA (n + x)
Write invalid
by stop condition
Write valid
by stop condition
Write invalid
by stop condition
Write invalid
by stop condition
Write valid
by stop condition
Figure 32 Write Operation by Inputting Stop Condition during Write
9. Command cancel by start condition
By a start condition, users are able to cancel command which is being input. However, adjust the phase while the S-
24C04C is outputting “L” because users are not able to input a start condition. When users cancel the command,
there may be a case that the address will not be identified. Use random read for the read operation, not current
address read.
10. Precaution for use
Absolute maximum ratings: Do not operate these ICs in excess of the absolute maximum ratings (as listed on the
data sheet). Exceeding the supply voltage rating can cause latch-up.
Operations with moisture on the S-24C04C pins may occur malfunction by short-circuit between pins. Especially, in
occasions like picking the S-24C04C up from low temperature tank during the evaluation. Be sure that not remain
frost on the S-24C04C pin to prevent malfunction by short-circuit.
Also attention should be paid in using on environment, which is easy to dew for the same reason.
2-WIRE SERIAL E2PROM
Rev.3.1_00_C S-24C04C
Seiko Instruments Inc. 29
Precautions
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of the
products including this IC upon patents owned by a third party.
2-WIRE SERIAL E2PROM
S-24C04C Rev.3.1_00_C
Seiko Instruments Inc.
30
Product Name Structure
1. Product name
S-24C04C I xxxx U
Product name
S-24C04C: 4 Kbit
Fixed
Package name (abbreviation) and IC packing specification
J8T1: 8-Pin SOP (JEDEC), Tape
T8T1: 8-Pin TSSOP, Tape
K8T3: TMSOP-8, Tape
I8T1: SNT-8A, Tape
Environmental code
U: Lead-free (Sn 100 %), halogen-free
2. Packages
Drawing code
Package name Package Tape Reel Land
8-Pin SOP (JEDEC) FJ008-Z-P-SD FJ008-Z-C-SD F J 008-Z -R-SD
8-Pin TSSOP FT008-Z-P-SD FT008-Z-C-SD FT008-Z-R-SD
TMSOP-8 FM008-A-P-SD FM008-A-C-SD FM008-A-R-SD
SNT-8A PH008-A-P-SD PH008-A-C-SD PH008-A-R-SD PH008-A-L-SD
No. FJ008-Z-P-SD-2.0
No.
TITLE
SCALE
UNIT mm
SOP8J-Z-PKG Dimensions
Seiko Instruments Inc.
FJ008-Z-P-SD-2.0
0.4
1.27
0.20±0.05
5.02
14
85
+0.20
-0.35
+0.11
-0.07
No.
TITLE
SCALE
UNIT mm
5
8
1
4
ø1.5 min.
ø1.55±0.05 0.3±0.05
2.1±0.1
8.0±0.1
6.5
2.0±0.05
Seiko Instruments Inc.
Feed direction
4.0±0.1(10 pitches:40.0±0.2)
SOP8J-Z-Carrier Tape
No. FJ008-Z-C-SD-1.0
FJ008-Z-C-SD-1.0
+0.30
-0.25
No.
TITLE
UNIT mm
SCALE QTY. 4,000
13.4±1.0
2±0.5
ø13±0.2
ø21±0.8
Seiko Instruments Inc.
Enlarged drawing in the central part
SOP8J-Z-Reel
No. FJ008-Z-R-SD-1.0
FJ008-Z-R-SD-1.0
17.5±1.5
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
TSSOP8-Z-PKG Dimensions
No. FT008-Z-P-SD-1.0
FT008-Z-P-SD-1.0
0.15±0.07
3.00
0.65
0.2±0.1
14
5
8
+0.3
-0.2
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
ø1.55±0.05
2.0±0.05
8.0±0.1 ø1.55 +0.2
-0.05
0.3±0.05
1
45
8
4.0±0.1
Feed direction
TSSOP8-Z-Carrier Tape
No. FT008-Z-C-SD-1.0
FT008-Z-C-SD-1.0
+0.4
-0.2
6.6
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
Enlarged drawing in the central part
No. FT008-Z-R-SD-1.0
2±0.5
ø13±0.2
ø21±0.8
13.4±1.0
17.5±1.0
4,000
QTY.
TSSOP8-Z-Reel
FT008-Z-R-SD-1.0
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
2.90±0.2
85
0.2±0.1
0.65±0.1
0.13±0.1
14
TMSOP8-A-PKG Dimensions
No. FM008-A-P-SD-1.1
FM008-A-P-SD-1.1
mm
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
0.30±0.05
1.00±0.1
1.05±0.05
1.55
2.00±0.05
4.00±0.1
3.25±0.05
4.00±0.1
1
4
58
TMSOP8-A-Carrier Tape
Feed direction
No. FM008-A-C-SD-1.0
FM008-A-C-SD-1.0
+0.1
-0
mm
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
16.5max.
13.0±0.3
QTY. 4,000
(60°)
(60°)
13±0.2
Enlarged drawing in the central part
TMSOP8-A-Reel
No. FM008-A-R-SD-1.0
FM008-A-R-SD-1.0
mm
1.97±0.03
0.2±0.05
0.48±0.02
0.08
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.0
No. PH008-A-P-SD-2.0
0.5
+0.05
-0.02
123 4
56
78
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
PH008-A-C-SD-1.0
SNT-8A-A-Carrier Tape
No. PH008-A-C-SD-1.0
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5±0.1
2.25±0.05
0.65±0.05
0.25±0.05
2134
7865
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
Enlarged drawing in the central part
QTY.
PH008-A-R-SD-1.0
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-Reel
No. PH008-A-R-SD-1.0
5,000
No.
TITLE
SCALE
UNIT mm
SNT-8A-A-Land Recommendation
Seiko Instruments Inc.
PH008-A-L-SD-4.0
0.3
0.2
0.52
2.01
0.52
No. PH008-A-L-SD-4.0
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1. (0.25 mm min. / 0.30 mm typ.)
2. (1.96 mm ~ 2.06 mm)
1.
2. 0.03 mm
3.
4. SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.96 mm to 2.06mm).
1.
2.
1
2
1. 䇋⊼ᛣ⛞Ⲭ῵ᓣⱘᆑᑺ(0.25 mm min. / 0.30 mm typ.)DŽ
2. 䇋࣓৥ᇕ㺙Ё䯈ᠽሩ⛞Ⲭ῵ᓣ (1.96 mm ~ 2.06 mm)DŽ
⊼ᛣ1. 䇋࣓೼󰶆㛖ൟᇕ㺙ⱘϟ䴶ࠋϱ㔥ǃ⛞䫵DŽ
2. ೼ᇕ㺙ϟǃᏗ㒓Ϟⱘ䰏⛞㝰ᑺ (Ң⛞Ⲭ῵ᓣ㸼䴶䍋) 䇋᥻ࠊ೼0.03 mmҹϟDŽ
3. ᥽㝰ⱘᓔষሎᇌᓔষԡ㕂䇋Ϣ⛞Ⲭ῵ᓣᇍ唤DŽ
4. 䆺㒚ݙᆍ䇋খ䯙 "SNTᇕ㺙ⱘᑨ⫼ᣛ"DŽ
www.sii-ic.com
The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described herein for other purposes and/or reproduction or copying without the
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The products described herein cannot be used as part of any device or equipment affecting the human
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The products described herein are not designed to be radiation-proof.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.