MRFE6VP6300HR3 MRFE6VP6300HSR3
1
RF Device Data
Freescale Semiconductor
RF Power Field Effect Transistors
High Ruggedness N--Channel
Enhancement--Mode Lateral MOSFETs
These high ruggedness devices are designed for use in high VSWR industrial
(including laser and plasma exciters), broadcast (analog and digital), aerospace
and radio/land mobile applications. They are unmatched input and output
designs allowing wide frequency range utilization, between 1.8 and 600 MHz.
!Typical Performance: VDD =50Volts,I
DQ = 100 mA
Signal Type
Pout
(W)
f
(MHz)
Gps
(dB)
"D
(%)
IRL
(dB)
Pulsed (100 #sec,
20% Duty Cycle)
300 Peak 230 26.5 74.0 -- 1 6
CW 300 Avg. 130 25.0 80.0 -- 1 5
!Capable of Handling a Load Mismatch of 65:1 VSWR, @ 50 Vdc, 230 MHz,
at all Phase Angles
!300 Watts CW Output Power
!300 Watts Pulsed Peak Power, 20% Duty Cycle, 100 μsec
!Capable of 300 Watts CW Operation
Features
!Unmatched Input and Output Allowing Wide Frequency Range Utilization
!Device can be used Single--Ended or in a Push--Pull Configuration
!Qualified Up to a Maximum of 50 VDD Operation
!Characterized from 30 V to 50 V for Extended Power Range
!Suitable for Linear Application with Appropriate Biasing
!Integrated ESD Protection
!Greater Negative Gate--Source Voltage Range for Improved Class C Operation
!Characterized with Series Equivalent Large--Signal Impedance Parameters
!RoHS Compliant
!NI--780--4 in Tape and Reel. R3 Suffix = 250 Units, 56 mm Tape Width,
13 inch Reel. For R5 Tape and Reel options, see p. 14.
!NI--780S--4 in Tape and Reel. R3 Suffix = 250 Units, 32 mm Tape Width,
13 inch Reel. For R5 Tape and Reel options, see p. 14.
Table 1. Maximum Ratings
Rating Symbol Value Unit
Drain--Source Voltage VDSS --0.5, +130 Vdc
Gate--Source Voltage VGS --6.0, +10 Vdc
Storage Temperature Range Tstg --65 to +150 $C
Case Operating Temperature TC150 $C
Total Device Dissipation @ TC=25$C
Derate above 25$C
PD1050
5.26
W
W/$C
Operating Junction Temperature (1,2) TJ225 $C
Table 2. Thermal Characteristics
Characteristic Symbol Value (2,3) Unit
Thermal Resistance, Junction to Case (4)
Pulsed: Case Temperature 75$C, 300 W Pulsed, 100 #sec Pulse Width, 20% Duty Cycle,
50 Vdc, IDQ = 100 mA, 230 MHz
CW: Case Temperature 87$C, 300 W CW, 50 Vdc, IDQ = 1100 mA, 230 MHz
Z%JC
R%JC
0.05
0.19
$C/W
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access
MTTF calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes -- AN1955.
4. Same test circuit is used for both pulsed and CW.
Document Number: MRFE6VP6300H
Rev. 1, 7/2011
Freescale Semiconductor
Technical Data
1.8--600 MHz, 300 W, 50 V
LATERAL N--CHANNEL
BROADBAND
RF POWER MOSFETs
MRFE6VP6300HR3
MRFE6VP6300HSR3
CASE 465H--02, STYLE 1
NI--780S--4
MRFE6VP6300HSR3
CASE 465M--01, STYLE 1
N I -- 7 8 0 -- 4
MRFE6VP6300HR3
(Top View)
RFout/VDS
31
Figure 1. Pin Connections
42
RFout/VDS
RFin/VGS
RFin/VGS
&Freescale Semiconductor, Inc., 2010--2011.
A
ll rights reserved.
2
RF Device Data
Freescale Semiconductor
MRFE6VP6300HR3 MRFE6VP6300HSR3
Table 3. ESD Protection Characteristics
Test Methodology Class
Human Body Model (per JESD22--A114) 2 (Minimum)
Machine Model (per EIA/JESD22--A115) B (Minimum)
Charge Device Model (per JESD22--C101) IV (Minimum)
Table 4. Electrical Characteristics (TA=25$C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Off Characteristics (1)
Gate--Source Leakage Current
(VGS =5Vdc,V
DS =0Vdc)
IGSS — — 1 #Adc
Drain--Source Breakdown Voltage
(VGS =0Vdc,I
D=50mA)
V(BR)DSS 130 — — Vdc
Zero Gate Voltage Drain Leakage Current
(VDS =50Vdc,V
GS =0Vdc)
IDSS — — 5 #Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 100 Vdc, VGS =0Vdc)
IDSS — — 10 #Adc
On Characteristics
Gate Threshold Voltage (1)
(VDS =10Vdc,I
D= 480 #Adc)
VGS(th) 1.7 2.2 2.7 Vdc
Gate Quiescent Voltage
(VDD =50Vdc,I
D= 100 mAdc, Measured in Functional Test)
VGS(Q) 2.0 2.5 3.0 Vdc
Drain--Source On--Voltage (1)
(VGS =10Vdc,I
D=1Adc)
VDS(on) —0.25 —Vdc
Dynamic Characteristics (1)
Reverse Transfer Capacitance
(VDS =50Vdc'30 mV(rms)ac @ 1 MHz, VGS =0Vdc)
Crss —0.8 —pF
Output Capacitance
(VDS =50Vdc'30 mV(rms)ac @ 1 MHz, VGS =0Vdc)
Coss —76 —pF
Input Capacitance
(VDS =50Vdc,V
GS =0Vdc'30 mV(rms)ac @ 1 MHz)
Ciss —188 —pF
Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD =50Vdc,I
DQ = 100 mA, Pout = 300 W Peak (60 W Avg.), f = 230 MHz,
Pulsed, 100 #sec Pulse Width, 20% Duty Cycle
Power Gain Gps 25.0 26.5 28.0 dB
Drain Efficiency "D72.0 74.0 — %
Input Return Loss IRL — -- 1 6 -- 9 dB
Load Mismatch (In Freescale Application Test Fixture, 50 ohm system) VDD =50Vdc,I
DQ = 100 mA
VSWR 65:1 at all Phase Angles
Pulsed: Pout = 300 W Peak (60 W Avg.), f = 230 MHz, Pulsed,
100 #sec Pulse Width, 20% Duty Cycle
CW: Pout = 300 W Avg., f = 130 MHz
(No Degradation in Output Power
1. Each side of device measured separately.
MRFE6VP6300HR3 MRFE6VP6300HSR3
3
RF Device Data
Freescale Semiconductor
Figure 2. MRFE6VP6300HR3(HSR3) Test Circuit Schematic
Z9 0.192)x 0.170)Microstrip
Z10* 0.366)x 0.170)Microstrip
Z11* 2.195)x 0.170)Microstrip
Z12* 0.614)x 0.170)Microstrip
Z13 0.243)x 0.080)Microstrip
* Line length includes microstrip bends
Z1 0.352)x 0.080)Microstrip
Z2* 1.780)x 0.080)Microstrip
Z3* 0.576)x 0.080)Microstrip
Z4 0.220)x 0.220)Microstrip
Z5 0.322)x 0.220)Microstrip
Z6 0.168)x 0.220)Microstrip
Z7, Z8 0.282)x 0.630)Microstrip
Z1
RF
INPUT
C1
Z2 Z4
DUT
C20
RF
OUTPUT
VBIAS VSUPPLY
C5
C9 C11C14
+
Z12
Z3
C15
+
Z5
C6
Z11Z10Z9Z8
Z7Z6
R1
C4
Z13
C12
C8
+
L1
C7
C3C2
C19C18C17
L2
C16
+
C10 C13
Note: Same test circuit is used for both pulsed and CW.
Table 5. MRFE6VP6300HR3(HSR3) Test Circuit Component Designations and Values
Part Description Part Number Manufacturer
C1, C20 15 pF Chip Capacitors ATC100B150JT500XT ATC
C2 82 pF Chip Capacitor ATC100B820JT500XT ATC
C3, C17 91 pF Chip Capacitors ATC100B910JT500XT ATC
C4, C10 1000 pF Chip Capacitors ATC100B102JT50XT ATC
C5, C11 10K pF Chip Capacitors ATC200B103KT50XT ATC
C6 0.1 #F, 50 V Chip Capacitor CDR33BX104AKWS AVX
C7 2.2 #F, 100 V Chip Capacitor HMK432B7225KM--T Taiyo Yuden
C8 10 #F, 35 V Tantalum Capacitor T491D106K035AT Kemet
C9 2.2 #F, 100 V Chip Capacitor G2225X7R225KT3AB ATC
C12 0.1 #F, 100 V Chip Capacitor C1812F104K1RAC Kemet
C13 0.01 #F, 100 V Chip Capacitor C1825C103K1GAC Kemet
C14, C15, C16 220 #F, 100 V Electolytic Capacitors MCGPR100V227M16X26--RH Multicomp
C18, C19 18 pF Chip Capacitors ATC100B180JT500XT ATC
L1 120 nH Inductor 1812SMS--R12JLC Coilcraft
L2 17.5 nH Inductor GA3095--ALC Coilcraft
R1 1000 *, 1/2 W Chip Resistor CRCW20101K00FKEF Vishay
PCB 0.030),+r=2.55 AD255A Arlon
4
RF Device Data
Freescale Semiconductor
MRFE6VP6300HR3 MRFE6VP6300HSR3
Figure 3. MRFE6VP6300HR3(HSR3) Test Circuit Component Layout
C8
CUT OUT AREA
L1
C7
C6
C5
C1 C4
R1
C3
C2
L2
C18 C20
C19
C17
C10
C11
C12
C13
C14 C15
C16
MRFE6VP6300H/HS
Rev. 2
C9
MRFE6VP6300HR3 MRFE6VP6300HSR3
5
RF Device Data
Freescale Semiconductor
TYPICAL CHARACTERISTICS — PULSED
50
1
1000
02010
VDS, DRAIN--SOURCE VOLTAGE (VOLTS)
Figure 4. Capacitance versus Drain--Source Voltage
C, CAPACITANCE (pF)
30
Ciss
100
10
40
Coss
Measured with '30 mV(rms)ac @ 1 MHz
VGS =0Vdc
Note: Each side of device measured separately.
0.1 53
60
26
Pin, INPUT POWER (dBm) PULSED
Figure 5. Pulsed Output Power versus
Input Power
58
27 28 29 30 31 32 33
Pout, OUTPUT POWER (dBm) PULSED
57
54
Actual
Ideal
VDD =50Vdc,I
DQ = 100 mA, f = 230 MHz
Pulse Width = 100 #sec, 20% Duty Cycle
P1dB = 55.4 dBm
(344 W)
56
55
59
34
P3dB = 56.0 dBm (398 W)
P2dB = 55.8 dBm (380 W)
"D
Gps
VDD =50Vdc,I
DQ = 100 mA, f = 230 MHz
Pulse Width = 100 #sec, 20% Duty Cycle
29
20
20
90
100
26
70
50
30
Pout, OUTPUT POWER (WATTS) PULSED
Figure 6. Pulsed Power Gain and Drain Efficiency
versus Output Power
Gps, POWER GAIN (dB)
"D, DRAIN EFFICIENCY (%)
24
22
600
23
28
40
60
80
25
27
19
26
0
23
22
Pout, OUTPUT POWER (WATTS) PULSED
Figure 7. Pulsed Power Gain versus
Output Power
Gps, POWER GAIN (dB)
50
21
350 400
VDD =50Vdc,I
DQ = 100 mA, f = 230 MHz
Pulse Width = 100 #sec, 20% Duty Cycle
20
100 200 250 300
VDD =30V
50 V
24
25
28
27
29
150
35 V
40 V 45 V
20
90
0
Pout, OUTPUT POWER (WATTS) PULSED
Figure 8. Pulsed Drain Efficiency versus
Output Power
70
50 100 150 200 250 300 350
60
30
50
40
80
400
Figure 9. Pulsed Power Gain and Drain Efficiency
versus Output Power
Pout, OUTPUT POWER (WATTS) PULSED
Gps, POWER GAIN (dB)
21
10
24
23
100 600
"D
25_C
TC=--30_C
85_C
Gps
VDD =50Vdc,I
DQ = 100 mA, f = 230 MHz
Pulse Width = 100 #sec, 20% Duty Cycle
40
60
50
10
30
20
"D,DRAIN EFFICIENCY (%)
-- 3 0 _C
25_C
85_C
VDD =50Vdc,I
DQ = 100 mA, f = 230 MHz
Pulse Width = 100 #sec, 20% Duty Cycle
VDD =30V
50 V
35 V 40 V 45 V
"D, DRAIN EFFICIENCY (%)
22
27
26
25
29
28
70
80
90
Crss
6
RF Device Data
Freescale Semiconductor
MRFE6VP6300HR3 MRFE6VP6300HSR3
TYPICAL CHARACTERISTICS — TWO--TONE (1)
Figure 10. Intermodulation Distortion
Products versus Output Power
-- 8 0
-- 1 0
10
7th Order
Pout, OUTPUT POWER (WATTS) PEP
VDD =50Vdc,I
DQ = 1600 mA, f1 = 230 MHz
f2 = 230.1 MHz, Two--Tone Measurements
3rd Order
-- 4 0
-- 5 0
-- 6 0
100 400
IMD, INTERMODULATION DISTORTION (dBc)
-- 7 0
5th Order
Figure 11. Intermodulation Distortion
Products versus Two--Tone Spacing
10
-- 1 0
0.1
7th Order
TWO--TONE SPACING (MHz)
5th Order
3rd Order
-- 3 0
-- 4 0
-- 5 0
140
IMD, INTERMODULATION DISTORTION (dBc)
Figure 12. Two--Tone Power Gain versus
Output Power
25
30
5
IDQ = 1600 mA
Pout, OUTPUT POWER (WATTS) PEP
26
500
Gps, POWER GAIN (dB)
28
VDD = 50 Vdc, f1 = 230 MHz, f2 = 230.1 MHz
Two--Tone Measurements
Figure 13. Third Order Intermodulation
Distortion versus Output Power
Pout, OUTPUT POWER (WATTS) PEP
-- 2 5
-- 3 0
-- 4 0
-- 4 5
-- 5 0
INTERMODULATION DISTORTION (dBc)
IMD, THIRD ORDER
-- 1 5
VDD = 50 Vdc, f1 = 230 MHz, f2 = 230.1 MHz
Two--Tone Measurements
40010
-- 7 0
-- 2 0
VDD =50Vdc,P
out = 250 W (PEP)/62.5 W Avg. per Tone
IDQ = 1600 mA, Two--Tone Measurements
-- 3 5
-- 3 0
-- 6 0
29
27
1400 mA
-- 2 0
10 100
650 mA
1100 mA
900 mA
-- 2 0
100
IDQ = 650 mA
1400 mA
1100 mA
900 mA
1600 mA
1. The distortion products are referenced to one of the two tones and the peak envelope power (PEP) is 6 dB above the power in a single tone.
MRFE6VP6300HR3 MRFE6VP6300HSR3
7
RF Device Data
Freescale Semiconductor
TYPICAL CHARACTERISTICS
250
109
90
TJ, JUNCTION TEMPERATURE ($C)
Figure 14. MTTF versus Junction Temperature — CW
MTTF calculator available at http://www.freescale.com/rf. Select
Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
107
106
104
110 130 150 170 190
MTTF (HOURS)
210 230
108
105
VDD =50Vdc
Pout = 300 W Avg.
"D= 80%
8
RF Device Data
Freescale Semiconductor
MRFE6VP6300HR3 MRFE6VP6300HSR3
f = 230 MHz
f = 230 MHz
Zload
Zsource
Zo=5*
VDD =50Vdc,I
DQ = 100 mA, Pout = 300 W Peak
f
MHz
Zsource
*
Zload
*
230 0.65 + j2.79 1.64 + j2.85
Zsource = Test circuit impedance as measured from
gate to ground.
Zload = Test circuit impedance as measured from
drain to ground.
Figure 15. Series Equivalent Source and Load Impedance
Zsource Zload
Input
Matching
Network
Device
Under
Test
Output
Matching
Network
MRFE6VP6300HR3 MRFE6VP6300HSR3
9
RF Device Data
Freescale Semiconductor
VDD =50Vdc,I
DQ = 100 mA
f
MHz
Zsource
*
Zload
*
10 36.0 + j128 12.0 + j8.80
25 20.0 + j64.0 12.4 + j6.40
50 16.0 + j41.6 11.6 + j14.4
100 8.00 + j24.8 9.00 + j9.80
200 3.00 + j12.8 7.20 + j6.40
300 1.52 + j7.92 6.00 + j5.00
400 1.08 + j5.04 4.20 + j4.00
500 1.04 + j3.16 3.32 + j2.72
600 0.88 + j1.76 2.72 + j1.68
1. Simulated performance at 1 dB gain compression.
Zsource = Source impedance presented from gate to gate.
Zload = Load impedance presented from drain to drain.
Load
Source
Figure 16. Simulated Source and Load Impedances Optimized for IRL,
Output Power and Drain Efficiency — Push--Pull
Zsource Zload
Device
Under
Test
--
-- +
+
10
RF Device Data
Freescale Semiconductor
MRFE6VP6300HR3 MRFE6VP6300HSR3
PACKAGE DIMENSIONS
MRFE6VP6300HR3 MRFE6VP6300HSR3
11
RF Device Data
Freescale Semiconductor
12
RF Device Data
Freescale Semiconductor
MRFE6VP6300HR3 MRFE6VP6300HSR3
MRFE6VP6300HR3 MRFE6VP6300HSR3
13
RF Device Data
Freescale Semiconductor
14
RF Device Data
Freescale Semiconductor
MRFE6VP6300HR3 MRFE6VP6300HSR3
PRODUCT DOCUMENTATION AND SOFTWARE
Refer to the following documents to aid your design process.
Application Notes
!AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
!EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
!Electromigration MTTF Calculator
!RF High Power Model
!.s2p File
For Software, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the Software &
Tools tab on the part’s Product Summary page to download the respective tool.
R5 TAPE AND REEL OPTION
NI--780--4 = R5 Suffix = 50 Units, 56 mm Tape Width, 13 inch Reel.
NI--780S--4 = R5 Suffix = 50 Units, 32 mm Tape Width, 13 inch Reel.
The R5 tape and reel option for MRFE6VP6300H and MRFE6VP6300HS parts will be available for 2 years after release of
MRFE6VP6300H and MRFE6VP6300HS. Freescale Semiconductor, Inc. reserves the right to limit the quantities that will be
delivered in the R5 tape and reel option. At the end of the 2 year period customers who have purchased these devices in the R5
tape and reel option will be offered MRFE6VP6300H and MRFE6VP6300HS in the R3 tape and reel option.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision Date Description
0Oct. 2010 !Initial Release of Data Sheet
1July 2011 !Corrected pin 4 label from RFout/VGS to RFin/VGS, Fig. 1, Pin Connections, p. 1
!Changed Drain--Source voltage from --0.5, +125 to --0.5, +130 in Maximum Ratings table, p. 1
!Added Total Device Dissipation to Maximum Ratings table, p. 1
!Changed V(BR)DSS Min value from 125 to 130 Vdc, Table 4, Off Characteristics, p. 2
!Tightened VGS(th) Min limit from 1.5 to 1.7 Vdc and Max limit from 3.0 to 2.7 Vdc as a result of process
improvement, Table 4, On Characteristics, p. 2
!Tightened VGS(Q) Min limit from 1.7 to 2.0 Vdc and Max limit from 3.2 to 3.0 Vdc as a result of process
improvement, Table 4, On Characteristics, p. 2
!Added Load Mismatch table to Table 4. Electrical Characteristics, p. 2
!MTTF end temperature on graph changed to match maximum operating junction temperature, Fig. 14,
MTTF versus Junction Temperature, p. 7
!Added Fig. 16, Simulated Source and Load Impedances Optimized for IRL, Output Power and Drain
Efficiency — Push--Pull table, p. 9
MRFE6VP6300HR3 MRFE6VP6300HSR3
15
RF Device Data
Freescale Semiconductor
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Document Number: MRFE6VP6300H
Rev. 1, 7/2011
