4-Line BUS-port ESD-Protection
VBUS054B-HSF
Vishay Semiconductors
Document Number: 81624 For technical questions, contact: ESDprotection@vishay.com www.vishay.com
Rev. 1.6, 21-Oct-10 1
MARKING (example
only)
Dot = pin 1 marking
XX = date code
YY = type code (see table below)
FEATURES
• Ultra compact LLP75-6L package
• Low package height < 0.6 mm
• 4-line USB ESD-protection
• Low leakage current
• Low load capacitance CD = 0.8 pF
• ESD-protection acc. IEC 61000-4-2
± 15 kV contact discharge
± 15 kV air discharge
• e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn)
• Compliant to RoHS Directive 2002/95/EC and in
accordance to WEEE 2002/96/EC
20453 1
20397
64
5
123
21001
XX
YY
ORDERING INFORMATION
DEVICE NAME ORDERING CODE TAPED UNITS PER REEL
(8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY
VBUS054B-HSF VBUS054B-HSF-GS08 3000 15 000
PACKAGE DATA
DEVICE NAME PACKAGE
NAME
TYPE
CODE WEIGHT MOLDING COMPOUND
FLAMMABILITY RATING
MOISTURE
SENSITIVITY LEVEL
SOLDERING
CONDITIONS
VBUS054B-HSF LLP75-6L U3 4.2 mg UL 94 V-0 MSL level 1
(according J-STD-020) 260 °C/10 s at terminals
ABSOLUTE MAXIMUM RATINGS
PARAMETER TEST CONDITIONS SYMBOL VALUE UNIT
Peak pulse current
Pin 1, 3, 4 or 6 to pin 2
acc. IEC 61000-4-5; tP = 8/20 μs; single shot IPPM 3A
Pin 5 to pin 2
acc. IEC 61000-4-5; tP = 8/20 μs; single shot IPPM 10 A
Peak pulse power
Pin 1, 3, 4 or 6 to pin 2
acc. IEC 61000-4-5; tP = 8/20 μs; single shot PPP 45 W
Pin 5 to pin 2
acc. IEC 61000-4-5; tP = 8/20 μs; single shot PPP 200 W
ESD immunity Contact discharge acc. IEC61000-4-2; 10 pulses VESD ± 15 kV
Air discharge acc. IEC61000-4-2; 10 pulses VESD ± 15 kV
Operating temperature Junction temperature TJ- 40 to + 125 °C
Storage temperature TSTG - 55 to + 150 °C
** Please see document “Vishay Material Category Policy”: www.vishay.com/doc?99902
VBUS054B-HSF
Vishay Semiconductors 4-Line BUS-port ESD-Protection
www.vishay.com For technical questions, contact: ESDprotection@vishay.com Document Number: 81624
2Rev. 1.6, 21-Oct-10
Note
• Ratings at 25 °C, ambient temperature unless otherwise specified
TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Fig. 1 - ESD Discharge Current Wave Form
acc. IEC 61000-4-2 (330 Ω/150 pF)
Fig. 2 - 8/20 μs Peak Pulse Current Wave Form
acc. IEC 61000-4-5
ELECTRICAL CHARACTERISTICS VBUS054B-HSF
PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT
Protection paths Number of line which can be protected Nlines --4lines
Reverse stand-off voltage at IR = 0.1 μA,
pin 1, 3, 4 or 6 to pin 2 VRWM 5--V
Reverse current at VIN = VRWM = 5 V,
pin 1, 3, 4 or 6 to pin 2 IR- < 0.01 0.1 μA
Reverse breakdown voltage
at IR = 1 mA,
pin 5 to pin 2 VBR 6.3 7.1 8 V
at IR = 1 mA,
pin 1, 3, 4 or 6 to pin 2 VBR 6.9 7.9 8.7 V
Reverse clamping voltage at IPP = 3 A; pin 1, 3, 4 or 6 to pin 2;
acc. IEC 61000-4-5 VC--15V
Forward clamping voltage at IF = 3 A; pin 2 to pin 1, 3, 4 or 6;
acc. IEC 61000-4-5 VF--5V
Capacitance
Pin 1, 3, 4 or 6 to pin 2
VIN (at pin 1, 3, 4 or 6) = 0 V and
VBUS (at pin 5) = 5 V; f = 1 MHz
CD-0.81pF
Pin 1, 3, 4 or 6 to pin 2
VIN (at pin 1, 3, 4 or 6) = 2.5 V and
VBUS (at pin 5) = 5 V; f = 1 MHz
CD-0.50.8pF
Line symmetry Difference of the line capacitances dCD- - 0.05 pF
Supply line capacitance Pin 5 to pin 2; at VR = 0; f = 1 MHz CZD - 110 - pF
0 %
20 %
40 %
60 %
80 %
100 %
120 %
- 10 0 10 20 30 40 50 60 70 80 90 100
Time (ns)
Discharge Current IESD
Rise time = 0.7 ns to 1 ns
53 %
27 %
20557
0 %
20 %
40 %
60 %
80 %
100 %
010203040
Time (µs)
IPPM
20 µs to 50 %
8 µs to 100 %
20548
VBUS054B-HSF
4-Line BUS-port ESD-Protection Vishay Semiconductors
Document Number: 81624 For technical questions, contact: ESDprotection@vishay.com www.vishay.com
Rev. 1.6, 21-Oct-10 3
Fig. 3 - Typical Input Capacitance CIN at Pin 1, 3, 4, or 6 vs.
Input Voltage VIN
Fig. 4 - Typical Forward Current IF vs. Forward Voltage VF
Fig. 5 - Typical Reverse Voltage VR vs.
Reverse Current IR
Fig. 6 - Typical Peak Clamping Voltage VC vs.
Peak Pulse Current IPP
Fig. 7 - Typical Clamping Performance at + 8 kV
Contact Discharge (acc. IEC 61000-4-2)
Fig. 8 - Typical Clamping Performance at - 8 kV
Contact Discharge (acc. IEC 61000-4-2)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0123456
V
IN
(V)
C
IN
(pF)
f = 1 MHz; VBUS (at Pin 5) = 5 V
Pin 1, 3, 4 or 6 to Pin 2
20549
0.001
0.01
0.1
1
10
100
0.5 0.6 0.7 0.80.9 1 1.1 1.2
V
F
(V)
I
F
(mA)
Pin 2 to Pin 1, 3, 4 or 6
Pin 2 to Pin 5
20550
0
1
2
3
4
5
6
7
8
9
0.01 0.1 1 10 100 1000 10000
I
R
(µA)
VR (V)
Pin 5 to Pin 2
Pin 1, 3, 4 or 6 to Pin 2
20551
- 10
- 5
0
5
10
15
20
01234
IPP (A)
VC (V)
Measured acc. IEC 61000-4-5
(8/20 µs - wave form)
Pin 1, 3, 4 or 6 to Pin 2
Pin 2 to Pin 1, 3, 4 or 6
Pin 5 to Pin 2
Pin 2 to Pin 5
V
20552
C
- 20
0
20
40
60
80
100
120
- 10 0 10 20 30 40 50 60 70 8090
t (ns)
VC-ESD (V)
acc. IEC 61000-4-2
+ 8 kV
contact discharge
Pin 1, 3, 4, 6 to Pin 2
20553
VBUS054B-HSF
Vishay Semiconductors 4-Line BUS-port ESD-Protection
www.vishay.com For technical questions, contact: ESDprotection@vishay.com Document Number: 81624
4Rev. 1.6, 21-Oct-10
Fig. 9 - Typical Peak Clamping Voltage at ESD
Contact Discharge (acc. IEC 61000-4-2)
Fig. 10 - Typical Peak Clamping Voltage at ESD
Contact Discharge (acc. IEC 61000-4-2)
APPLICATION NOTE
With the VBUS054B-HSF a double, high speed USB-port or up to 4 other high speed signal or data lines can be protected
against transient voltage signals. Negative transients will be clamped close below the ground level while positive transients will
be clamped close above the 5 V working range. An avalanche diode clamps the supply line (VBUS at pin 5) to ground (pin 2). The
high speed data lines, D1+, D2+, D1- and D2-, are connected to pin 1, 3, 4 and 6. As long as the signal voltage on the data lines
is between the ground- and the VBUS-level, the low capacitance PN-diodes offer a very high isolation to VBUS, ground and to
the other data lines. But as soon as any transient signal exceeds this working range, one of the PN-diodes starts working in the
forward mode and clamps the transient to ground or to the avalanche breakthrough voltage level of the Z-diode between pin 5
and pin 2.
- 250
- 200
- 150
- 100
- 50
0
50
100
150
200
0 5 10 15 20
VESD (kV)
VC-ESD (V)
acc. IEC 61000-4-2
contact discharge V
C-ESD
Pin 1, 3, 4 or 6 to Pin 2
Pin 2 to Pin 1, 3, 4 or 6
20555
- 80
- 60
- 40
- 20
0
20
40
60
80
100
120
140
0 5 10 15 20
VESD (kV)
V
C-ESD
(V)
acc. IEC 61000-4-2
contact discharge
VC-ESD
Pin 5 to Pin 2
Pin 2 to Pin 5
20556
t
w
i
n
U
S
B
-
P
o
r
t
D
2+
V
BUS
GND
R
E
C
E
I
V
E
R
IC
D
2-
D
1+
D
1-
20399
64
5
123
VBUS054B-HSF
4-Line BUS-port ESD-Protection Vishay Semiconductors
Document Number: 81624 For technical questions, contact: ESDprotection@vishay.com www.vishay.com
Rev. 1.6, 21-Oct-10 5
BACKGROUND KNOWLEDGE:
A zener- or avalanche diode is an ideal device for “cutting” or “clamping” voltage spikes or voltage transients down to low and
uncritical voltage values. The breakthrough voltage can easily be adjusted by the chip-technology to any desired value within a
wide range. Up to about 6 V the “zener-effect” (tunnel-effect) is responsible for the breakthrough characteristic. Above 6 V the
so-called “avalanche-effect” is responsible. This is a more abrupt breakthrough phenomenon. Because of the typical “Z-shape”
of the current-voltage-curve of such diodes, these diodes are generally called “Z-diode” (= zener or avalanche diodes). An
equally important parameter for a protection diode is the ESD- and surge-power that allows the diode to short current in the
pulse to ground without being destroyed.
This requirement can be adjusted by the size of the silicon chip (crystal). The bigger the active area the higher the current that
the diode can short to ground.
But the active area is also responsible for the diode capacitance - the bigger the area the higher the capacitance.
The dilemma is that a lot of applications require an effective protection against more then 8 kV ESD while the capacitance must
be lower then 5 pF! This is well out of the normal range of a Z-diode. However, a protection diode with a low capacitance
PN-diode (switching diode or junction diode) in series with a Z-diode, can fulfil both requirements simultaneously: low
capacitance AND high ESD- and/or surge immunity become possible!
A small signal (Vpp < 100 mV) just sees the low capacitance of the PN-diode, while the big capacitance of the Z-diode in series
remains “invisible”.
Such a constellation with a Z-diode and a small PN-diode
(with low capacitance) in series (anti-serial) is a real
unidirectional protection device. The clamping current can
only flow in one direction (forward) in the PN-diode. The
reverse path is blocked.
Another PN-diode "opens" the back path so that the
protection device becomes bidirectional! Because the
clamping voltage levels in forward and reverse directions
are different, such a protection device has a Bidirectional
and Asymmetrical clamping behaviour (BiAs) just like a
single Z-diode.
C
D
= 0.4 pF
C
TOT
D
ZD CZ
D
= 110 pF
20400
20401
D
ZD
I/O
Gnd
20404
D1
ZD
D2
I/O
Gnd
VBUS054B-HSF
Vishay Semiconductors 4-Line BUS-port ESD-Protection
www.vishay.com For technical questions, contact: ESDprotection@vishay.com Document Number: 81624
6Rev. 1.6, 21-Oct-10
One mode of use is,…
in the very first moment before any pulses have arrived, all
three diodes are completely discharged (so the diode
capacitances are empty of charge) the first signal pulse with
an amplitude > 0.5 V will drive the upper PN-diode (D1) in a
forward direction and “sees” the empty capacitance of the
Z-diode (ZD).
Depending on the duration of this pulse and the pause to the
next one the Z-diodes capacitance can be charged up so
that the next pulse “sees” a lower capacitance. After some
pulses the big Z-diode could be completely charged up so
that the following pulses just see the small capacitance of
both PN-diodes.
For some application this can work perfectly.....
For others applications the capacitance must be the same
all the time from the first till the last pulse.
For these applications the appropriate mode of use is to
connect the Z-diode to the supply voltage.
In this mode the Z-diode is charged up immediately by the
supply voltage and both PN-diodes are always used in
reverse. This keeps their capacitance at a minimum.
D
1
ZD
D
2
I/O
Gnd
20405
D
1
ZD
D
2
I/O
Gnd
VBUS
20406
VBUS054B-HSF
4-Line BUS-port ESD-Protection Vishay Semiconductors
Document Number: 81624 For technical questions, contact: ESDprotection@vishay.com www.vishay.com
Rev. 1.6, 21-Oct-10 7
PACKAGE DIMENSIONS in millimeters (inches): LLP75-6L
1.05 (0.041)
0.5 (0.020)
0.95 (0.037)
Heat sink
0.3 (0.012)
0.2 (0.008)
0.3 (0.012)
0.2 (0.008)
0.3 (0.012)
0.2 (0.008)
0.55 (0.022)
0.45 (0.018)
0.6 (0.024)
0.25 (0.010)
0.05 (0.002)
0 (0.000)
0.15 (0.006)
0.60 (0.023)
0.54 (0.021)
1.65 (0.065)
1.55 (0.061)
1.65 (0.065)
1.55 (0.061)
Pin 1 marking
0.5 (0.020) 0.5 (0.020)
0.3 (0.012) 0.3 (0.012)
0.15 (0.006) 0.15 (0.006)
0.5 (0.020)
0.5 (0.020)
1 (0.039)
0.25 (0.010)
Solder resist mask
Solder pad
Document no.:S8-V-3906.02-010 (4)
Rev. 4 - Date: 21. March 2006
20454
Created - Date: 04. MAY 2005
Foot print recommendation:
1 (0.039)
1 (0.039)
Legal Disclaimer Notice
www.vishay.com Vishay
Revision: 02-Oct-12 1Document Number: 91000
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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
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