1 kV, Dual Channel Digital Isolators
Data Sheet
ADuM7240/ADuM7241
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2012–2015 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Narrow-body, RoHS-compliant, 8-lead SOIC
Safety and regulatory approvals
UL recognition
UL 1577: 1000 V rms for 1 minute
Low power operation
5 V operation
2.4 mA per channel maximum at 0 Mbps to 1 Mbps
11.8 mA per channel maximum at 25 Mbps
3.3 V operation
1.7 mA per channel maximum at 0 Mbps to 1 Mbps
8.2 mA per channel maximum at 25 Mbps
Bidirectional communication
Up to 25 Mbps data rate (NRZ)
3 V/5 V level translation
High temperature operation: 105°C
High common-mode transient immunity: >15 kV/μs
APPLICATIONS
General-purpose multichannel isolation
Data converter isolation
Industrial field bus isolation
FUNCTIONAL BLOCK DIAGRAMS
ENCODE DECODE
ENCODE DECODE
V
DD1
V
IA
V
IB
GND
1
V
DD2
V
OA
V
OB
GND
2
1
2
3
4
8
7
6
5
ADuM7240
10240-001
Figure 1. ADuM7240
ENCODE DECODE
DECODE ENCODE
V
DD1
V
OA
V
IB
GND
1
V
DD2
V
IA
V
OB
GND
2
1
2
3
4
8
7
6
5
ADuM7241
10240-002
Figure 2. ADuM7241
GENERAL DESCRIPTION
The ADuM7240/ADuM72411 are dual channel digital isolators
based on the Analog Devices, Inc., iCoupler® technology.
Combining high speed CMOS and monolithic air core trans-
former technologies, these isolation components provide
outstanding performance characteristics superior to the alterna-
tives, such as optocoupler devices and other integrated couplers.
The ADuM7240/ADuM7241 dual 1 kV digital isolation devices
are packaged in a narrow-body 8-lead SOIC. The ADuM7240/
ADuM7241 offer a cost-effective option compared to 2.5 kV or
5 kV isolators where only functional isolation is needed.
Like other Analog Devices isolators, the ADuM7240/ADuM7241
offer very low power consumption, consuming one-tenth to
one-sixth the power of comparable isolators at data rates up to
25 Mbps. Despite the low power consumption, all models of the
ADuM7240/ADuM7241 provide low pulse width distortion
(<5 ns for C grade). In addition, every model has an input glitch
filter to protect against extraneous noise disturbances.
The ADuM7240/ADuM7241 provide two independent isolation
channels and are available in two channel configurations with
1 Mbps or 25 Mbps data rates (see the Ordering Guide). All
models operate with the supply voltage on either side ranging
from 3.0 V to 5.5 V, providing compatibility with lower voltage
systems as well as enabling voltage translation functionality
across the isolation barrier. The ADuM7240/ADuM7241 also
have an output default high logic state in the absence of input
power.
1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents pending.
ADuM7240/ADuM7241 Data Sheet
Rev. B | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics—5 V Operation................................ 3
Electrical Characteristics—3.3 V Operation ............................ 4
Electrical Characteristics—Mixed 5 V/3.3 V Operation ........ 5
Electrical Characteristics—Mixed 3.3 V/5 V Operation ........ 6
Package Characteristics ............................................................... 7
Regulatory Information ............................................................... 7
Insulation and Safety-Related Specifications ............................ 7
Recommended Operating Conditions ...................................... 7
Absolute Maximum Ratings ............................................................8
ESD Caution...................................................................................8
Pin Configurations and Function Descriptions ............................9
Typical Performance Characteristics ........................................... 10
Applications Information .............................................................. 12
Printed Circuit Board Layout ................................................... 12
Propagation Delay-Related Parameters ................................... 12
DC Correctness .......................................................................... 12
Magnetic Field Immunity.......................................................... 12
Power Consumption .................................................................. 13
Insulation Lifetime ..................................................................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
REVISION HISTORY
10/15—Rev. A to Rev. B
Change to Features Section ............................................................. 1
Changes to Table 14 .......................................................................... 7
5/12—Rev. 0 to Rev. A
Changes to Table 2 ............................................................................ 3
Changed IDDI(Q) Maximum Parameter from 1.2 mA to 1.4 mA,
Table 3, and IDDO(Q) Maximum Parameter from 0.95 mA to
1.1 mA, Table 3 ................................................................................. 3
Changes to Table 5 ............................................................................ 4
Changed IDDI(Q) Maximum Parameter from 0.83 mA to 1.0 mA,
Table 6, and Changed IDDO(Q) Maximum Parameter from
0.68 mA to 0.8 mA, Table 6 ............................................................. 4
Changes to Table 8 ............................................................................ 5
Changed IDDI(Q) Maximum Parameter from 1.2 mA to 1.45 mA,
Table 9, and Changed IDDO(Q) Maximum Parameter from
0.67 mA to 0.80 mA, Table 9 ........................................................... 5
Changes to Table 11 .......................................................................... 6
Changed IDDI(Q) Maximum Parameter from 0.83 mA to 1.0 mA,
Table 12, and Changed IDDO(Q) Maximum Parameter from
0.90 mA to 1.1 mA, Table 12 ........................................................... 6
5/12—Revision 0: Initial Version
Data Sheet ADuM7240/ADuM7241
Rev. B | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 1.
A Grade
C Grade
Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments
SWITCHING SPECIFICATIONS
Pulse Width PW 250 40 ns Within PWD limit
Data Rate 1 25 Mbps Within PWD limit
Propagation Delay t
PHL
, t
PLH
50 75 32 41 50 ns 50% input to 50% output
Pulse Width Distortion PWD 10 25 2 5 ns |tPLH − tPHL|
Change vs. Temperature
5
3
ps/°C
Propagation Delay Skew1 tPSK 20 10 ns
Channel Matching
Codirectional t
PSKCD
25 2 4 ns
Opposing Direction tPSKOD 30 2 6 ns
Jitter
2
2
ns
1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load
within the recommended operating conditions.
Table 2.
1 Mbps—A, C Grades
25 Mbps—C Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions/Comments
SUPPLY CURRENT
ADuM7240 I
DD1
2.2 2.8 16 21 mA
IDD2 1.7 2.2 3.9 5.7 mA
ADuM7241 I
DD1
1.9 2.4 9.3 13 mA
I
DD2
1.9 2.4 8.2 12 mA
Table 3. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Logic High Input Threshold V
IH
0.7 V
DDx
V
Logic Low Input Threshold V
IL
0.3 V
DDx
V
Logic High Output Voltages VOH VDDx − 0.1 VDDx V IOx = −20 µA, VIx = VIxH
VDDx − 0.4 VDDx − 0.3 V IOx = −4 mA, VIx = VIxH
Logic Low Output Voltages
VOL
0.0
0.1
V
IOx = 20 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Input Current per Channel I
I
−10
+0.01
+10
µA
0 V ≤ V
Ix
≤ V
DDx
Supply Current per Channel
Quiescent Input Supply Current IDDI(Q) 1 1.4 mA
Quiescent Output Supply Current
IDDO(Q)
0.8
1.1
mA
Dynamic Input Supply Current IDDI(D) 0.29 mA/Mbps
Dynamic Output Supply Current I
DDO(D)
0.03 mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time t
R
/t
F
2.0 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 15 25 kV/µs VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate f
r
600 kHz DC data inputs
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDDx. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
ADuM7240/ADuM7241 Data Sheet
Rev. B | Page 4 of 16
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range of 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 4.
A Grade
C Grade
Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments
SWITCHING SPECIFICATIONS
Pulse Width PW 250 40 ns Within PWD limit
Data Rate 1 25 Mbps Within PWD limit
Propagation Delay tPHL, tPLH 60 85 37 50 64 ns 50% input to 50% output
Pulse Width Distortion
PWD
10
25
2
5
ns
|tPLH − tPHL|
Change vs. Temperature 5 3 ps/°C
Propagation Delay Skew
1
t
PSK
20 10 ns
Channel Matching
Codirectional tPSKCD 25 2 4 ns
Opposing Direction t
PSKOD
30 2 7 ns
Jitter 2 2 ns
1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load
within the recommended operating conditions.
Table 5.
1 Mbps—A, C Grades
25 Mbps—C Grade
Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments
SUPPLY CURRENT
ADuM7240 IDD1 1.6 2.0 12 15 mA
I
DD2
1.3 1.6 2.6 4.4 mA
ADuM7241 IDD1 1.4 1.8 6.7 9.2 mA
IDD2 1.4 1.8 5.9 8.2 mA
Table 6. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Logic High Input Threshold V
IH
0.7 V
DDx
V
Logic Low Input Threshold V
IL
0.3 V
DDx
V
Logic High Output Voltages VOH VDDx − 0.2 VDDx V IOx = −20 µA, VIx = VIxH
V
DDx
− 0.4 V
DDx
− 0.3 V I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OL
0.0 0.1 V I
Ox
= 20 µA, V
Ix
= V
IxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Input Current per Channel I
I
−10
+0.01
+10
µA
0 V ≤ V
Ix
≤ V
DDx
Supply Current per Channel
Quiescent Input Supply Current I
DDI(Q)
0.71 1.0 mA
Quiescent Output Supply Current I
DDO(Q)
0.59 0.8 mA
Dynamic Input Supply Current IDDI(D) 0.20 mA/Mbps
Dynamic Output Supply Current I
DDO(D)
0.02 mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time t
R
/t
F
2.8 ns 10% to 90%
Common-Mode Transient Immunity
1
|CM| 15 25 kV/µs VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate fr 550 kHz DC data inputs
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDDx. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Data Sheet ADuM7240/ADuM7241
Rev. B | Page 5 of 16
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = 5 V, V DD2 = 3 .3 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 7.
A Grade
C Grade
Parameter Symbol
Min
Typ
Max
Min
Typ
Max
Unit Test Conditions/Comments
SWITCHING SPECIFICATIONS
Pulse Width PW 250 40 ns Within PWD limit
Data Rate 1 25 Mbps Within PWD limit
Propagation Delay t
PHL
, t
PLH
55 80 34 44 54 ns 50% input to 50% output
Pulse Width Distortion PWD 10 25 2 5 ns |t
PLH
− t
PHL
|
Change vs. Temperature 5 3 ps/°C
Propagation Delay Skew1 t
PSK
20 10 ns
Channel Matching
Codirectional t
PSKCD
25 2 5 ns
Opposing Direction t
PSKOD
30 3 9 ns
Jitter 2 2 ns
1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load
within the recommended operating conditions.
Table 8.
1 Mbps—A, C Grades
25 Mbps—C Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions/Comments
SUPPLY CURRENT
ADuM7240 I
DD1
2.2 2.9 16 21 mA
I
DD2
1.3 1.6 2.8 3.6 mA
ADuM7241 I
DD1
1.9 2.3 9.2 12 mA
IDD2 1.4 1.6 5.9 7.2 mA
Table 9. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
DC SPECIFICATIONS
Logic High Input Threshold V
IH
0.7 V
DDx
V
Logic Low Input Threshold V
IL
0.3 V
DDx
V
Logic High Output Voltages V
OH
V
DDx
− 0.1 V
DDx
V I
Ox
= −20 µA, V
Ix
= V
IxH
V
DDx
− 0.4 V
DDx
− 0.3 V I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OL
0.0 0.1 V I
Ox
= 20 µA, V
Ix
= V
IxL
0.2 0.4 V I
Ox
= 4 mA, V
Ix
= V
IxL
Input Current per Channel I
I
−10 +0.01 +10 µA 0 V ≤ V
Ix
≤ V
DDx
Supply Current per Channel
Quiescent Input Supply Current I
DDI(Q)
1.0 1.45 mA
Quiescent Output Supply Current I
DDO(Q)
0.59 0.80 mA
Dynamic Input Supply Current I
DDI(D)
0.25 mA/Mbps
Dynamic Output Supply Current I
DDO(D)
0.02 mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time t
R
/t
F
2.5 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 15 25 kV/µs VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate f
r
600 kHz DC data inputs
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDDx. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
ADuM7240/ADuM7241 Data Sheet
Rev. B | Page 6 of 16
ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = 3.3 V, VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 10.
A Grade C Grade
Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments
SWITCHING SPECIFICATIONS
Pulse Width PW 250 40 ns Within PWD limit
Data Rate 1 25 Mbps Within PWD limit
Propagation Delay t
PHL
, t
PLH
55 80 35 47 59 ns 50% input to 50% output
Pulse Width Distortion PWD 10 25 2 5 ns |t
PLH
− t
PHL
|
Change vs. Temperature 5 3 ps/°C
Propagation Delay Skew1 t
PSK
20 10 ns
Channel Matching
Codirectional t
PSKCD
25 2 5 ns
Opposing Direction t
PSKOD
30 5 10 ns
Jitter 2 2 ns
1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load
within the recommended operating conditions.
Table 11.
1 Mbps—A, C Grades 25 Mbps—C Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions/Comments
SUPPLY CURRENT
ADuM7240 I
DD1
1.6 2.0 12 15 mA
IDD2 1.7 2.1 3.8 4.8 mA
ADuM7241
IDD1
1.4
1.6
6.8
8.2
mA
IDD2 1.9 2.3 8.2 10.2 mA
Table 12. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Logic High Input Threshold V
IH
0.7 V
DDx
V
Logic Low Input Threshold V
IL
0.3 V
DDx
V
Logic High Output Voltages V
OH
V
DDx
− 0.1 V
DDx
V I
Ox
= −20 µA, V
Ix
= V
IxH
V
DDx
− 0.4 V
DDx
− 0.3 V I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OL
0.0 0.1 V I
Ox
= 20 µA, V
Ix
= V
IxL
0.2 0.4 V I
Ox
= 4 mA, V
Ix
= V
IxL
Input Current per Channel
II
−10
+0.01
+10
µA
0 V ≤ VIx ≤ VDDx
Supply Current per Channel
Quiescent Input Supply Current I
DDI(Q)
0.71 1.0 mA
Quiescent Output Supply Current I
DDO(Q)
0.80 1.1 mA
Dynamic Input Supply Current I
DDI(D)
0.20 mA/Mbps
Dynamic Output Supply Current I
DDO(D)
0.03 mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time t
R
/t
F
2.5 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 15 25 kV/µs VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate f
r
550 kHz DC data inputs
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDDx. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Data Sheet ADuM7240/ADuM7241
Rev. B | Page 7 of 16
PACKAGE CHARACTERISTICS
Table 13.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Resistance (Input-to-Output)1
RI-O
1013
Ω
Capacitance (Input-to-Output)
1
C
I-O
2 pF f = 1 MHz
Input Capacitance
2
C
I
4 pF
IC Junction-to-Ambient Thermal
Resistance
θJA 85 °C/W Thermocouple located at center of package
underside
1 The device is considered a 2-terminal device: Pin 1 through Pin 4 are shorted together, and Pin 5 through Pin 8 are shorted together.
2 Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
The ADuM7240/ADuM7241 are pending approval by the organizations listed in Table 14. See Table 18 and the Insulation Lifetime
section for recommended maximum working voltages for specific cross-isolation waveforms and insulation levels.
Table 14.
UL
Recognized Under UL 1577 Component Recognition Program
1
Single Protection, 1000 V rms Isolation Voltage
File E214100
1 In accordance with UL 1577, each ADuM7240/ADuM7241 is proof tested by applying an insulation test voltage ≥1200 V rms for 1 sec (current leakage detection limit = 5 µA).
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 15.
Parameter Symbol Value Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage 1000 V rms 1-minute duration
Minimum External Air Gap (Clearance) L(I01) 4.0 mm min Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L(I02) 4.0 mm min Measured from input terminals to output terminals,
shortest distance path along body
Minimum Internal Gap (Internal Clearance) 2.6 μm min Distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
300
00200
10240-003
SAFE TY- LI M IT ING CURRE NT (mA)
AMBI E NT TE M P E RATURE (°C)
250
200
150
100
50
50 100 150
Figure 3. Thermal Derating Curve, Dependence of Safety-Limiting Values
with Ambient Temperature per DIN V VDE V 0884-10
RECOMMENDED OPERATING CONDITIONS
Table 16.
Parameter Symbol Min Max Unit
Operating Temperature T
A
−40 +105 °C
Supply Voltages1 V
DD1
, V
DD2
3.0 5.5 V
Input Signal Rise and Fall Times 1.0 ms
1 All voltages are relative to their respective ground. See the DC Correctness
section for information about immunity to external magnetic fields.
ADuM7240/ADuM7241 Data Sheet
Rev. B | Page 8 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 17.
Parameter Rating
Storage Temperature (T
ST
) Range −65°C to +150°C
Ambient Operating Temperature
(T
A
) Range
−40°C to +105°C
Supply Voltages (V
DD1
, V
DD2
) −0.5 V to +7.0 V
Input Voltages (V
IA
, V
IB
)1 −0.5 V to V
DDI
+ 0.5 V
Output Voltages (V
OA
, V
OB
)1 −0.5 V to V
DDO
+ 0.5 V
Average Output Current per Pin2
Side 1 (I
O1
) −10 mA to +10 mA
Side 2 (I
O2
) −10 mA to +10 mA
Common-Mode Transients3 −100 kV/µs to +100 kV/µs
1 VDDI and VDDO refer to the supply voltages on the input and output sides of a
given channel, respectively. See the Printed Circuit Board Layout section.
2 See Figure 3 for maximum rated current values for various temperatures.
3 Refers to common-mode transients across the insulation barrier. Common-
mode transients exceeding the absolute maximum ratings may cause latch-
up or permanent damage.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Table 18. Maximum Continuous Working Voltage1
Parameter Max Unit Constraint
AC Voltage, Bipolar Waveform 300 V rms
50-year minimum lifetime
DC Voltage 300 V dc
50-year minimum lifetime
1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details.
Table 19. ADuM7240 Truth Table (Positive Logic)1
VIA Input
VIB Input
VDD1 State
VDD2 State
VOA Output
VOB Output
Notes
H H Powered Powered H H
L L Powered Powered L L
H L Powered Powered H L
L H Powered Powered L H
X X Unpowered Powered H H Outputs return to the input state within
1 µs of V
DDI
power restoration.
X X Powered Unpowered Indeterminate Indeterminate Outputs return to the input state within
1 µs of V
DDO
power restoration.
1 H = high, L = low, X = don’t care.
Table 20. ADuM7241 Truth Table (Positive Logic)1
V
IA
Input V
IB
Input V
DD1
State V
DD2
State V
OA
Output V
OB
Output Notes
H H Powered Powered H H
L L Powered Powered L L
H L Powered Powered H L
L H Powered Powered L H
X X Unpowered Powered Indeterminate H Outputs return to the input state within
1 µs of V
DDI
power restoration.
X X Powered Unpowered H Indeterminate Outputs return to the input state within
1 µs of V
DDO
power restoration.
1 H = high, L = low, X = don’t care.
Data Sheet ADuM7240/ADuM7241
Rev. B | Page 9 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1 8
2 7
3 6
4 5
TOP VI EW
(Not to Scale)
ADuM7240
V
DD1
V
IA
V
IB
GND
1
V
DD2
V
OA
V
OB
GND
2
10240-004
Figure 4. ADuM7240 Pin Configuration
Table 21. ADuM7240 Pin Function Descriptions
Pin No. Mnemonic Description
1 VDD1 3.0 V to 5.5 V Supply Voltage for Isolator Side 1.
2 VIA Logic Input A.
3 VIB Logic Input B.
4 GND1 Ground 1. Ground reference for Isolator Side 1.
5 GND2 Ground 2. Ground reference for Isolator Side 2.
6 VOB Logic Output B.
7 VOA Logic Output A.
8 VDD2 3.0 V to 5.5 V Supply Voltage for Isolator Side 2.
1 8
2 7
3 6
4 5
TOP VI EW
(Not to Scale)
ADuM7241
V
DD1
V
OA
V
IB
GND
1
V
DD2
V
IA
V
OB
GND
2
10240-005
Figure 5. ADuM7241 Pin Configuration
Table 22. ADuM7241 Pin Function Descriptions
Pin No. Mnemonic Description
1 VDD1 3.0 V to 5.5 V Supply Voltage for Isolator Side 1.
2 VOA Logic Output A.
3 VIB Logic Input B.
4 GND1 Ground 1. Ground reference for Isolator Side 1.
5 GND2 Ground 2. Ground reference for Isolator Side 2.
6 VOB Logic Output B.
7 VIA Logic Input A.
8 VDD2 3.0 V to 5.5 V Supply Voltage for Isolator Side 2.
ADuM7240/ADuM7241 Data Sheet
Rev. B | Page 10 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
0 5 10 15 20 25 30
DATA RATE (Mb p s)
3V
5V
10
8
6
4
2
0
CURRENT (mA)
10240-006
Figure 6. Typical Supply Current per Input Channel vs. Data Rate
for 5 V and 3 V Operation
CURRENT (mA)
0
1
2
3
4
0 5 10 15 20 25 30
DATA RATE (Mb p s)
5V
3V
10240-007
Figure 7. Typical Supply Current per Output Channel vs. Data Rate
for 5 V and 3 V Operation (No Output Load)
CURRENT (mA)
0
1
2
3
4
0 5 10 15 20 25 30
DATA RATE (Mb p s)
5V
3V
10240-008
Figure 8. Typical Supply Current per Output Channel vs. Data Rate
for 5 V and 3 V Operation (15 pF Output Load)
CURRENT (mA)
0
5
10
15
20
0510 15 20 25 30
DATA RATE (Mb p s)
5V
3V
10240-009
Figure 9. Typical ADuM7240 VDD1 Supply Current vs. Data Rate
for 5 V and 3 V Operation
0 5 10 15 20 25 30
DATA RATE (Mb p s)
3V
5V
5
4
3
2
1
0
CURRENT (mA)
10240-010
Figure 10. Typical ADuM7240 VDD2 Supply Current vs. Data Rate
for 5 V and 3 V Operation
0 5 10 15 20 25 30
DATA RATE (Mb p s)
3V
5V
10
8
6
4
2
0
CURRENT (mA)
10240-011
Figure 11. Typical ADuM7241 VDD1 Supply Current vs. Data Rate
for 5 V and 3 V Operation
ADuM7240/ADuM7241 Data Sheet
Rev. B | Page 12 of 16
APPLICATIONS INFORMATION
PRINTED CIRCUIT BOARD LAYOUT
The ADuM7240/ADuM7241 digital isolators require no external
interface circuitry for the logic interfaces. Power supply bypassing
is strongly recommended at both input and output supply pins:
VDD1 and VDD2. The capacitor value should be between 0.01 µF and
0.1 µF. The total lead length between both ends of the capacitor
and the input power supply pin should not exceed 20 mm.
In applications involving high common-mode transients, it is
important to minimize board coupling across the isolation barrier.
Furthermore, users should design the board layout so that any
coupling that does occur affects all pins on a given component
side equally. Failure to ensure this can cause voltage differentials
between pins exceeding the absolute maximum ratings of the
device, thereby leading to latch-up or permanent damage.
With proper PCB design choices, the ADuM7240/ADuM7241
can readily meet CISPR 22 Class A (and FCC Class A) emissions
standards, as well as the more stringent CISPR 22 Class B (and
FCC Class B) standards in an unshielded environment. Refer to
the AN-1109 Application Note for PCB-related EMI mitigation
techniques, including board layout and stack-up issues.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The input-to-
output propagation delay time for a high-to-low transition may
differ from the propagation delay time for a low-to-high
transition.
INPUT (V
Ix
)
OUTPUT (V
Ox
)
t
PLH
t
PHL
50%
50%
10240-013
Figure 13. Propagation Delay Parameters
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of how
accurately the timing of the input signal is preserved.
Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM7240/ADuM7241 component.
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM7240/
ADuM7241 components operating under the same conditions.
DC CORRECTNESS
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than ~1 µs, a periodic set
of refresh pulses indicative of the correct input state is sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than approximately 5 µs, the input side
is assumed to be unpowered or nonfunctional, and the isolator
output is forced to a default high state by the watchdog timer
circuit.
MAGNETIC FIELD IMMUNITY
The magnetic field immunity of the ADuM7240/ADuM7241 is
determined by the changing magnetic field, which induces a
voltage in the transformer’s receiving coil large enough to either
falsely set or reset the decoder. The following analysis defines
the conditions under which this can occur. The 3 V operating
condition of the ADuM7240/ADuM7241 is examined because
it represents the most susceptible mode of operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus
establishing a 0.5 V margin in which induced voltages can be
tolerated. The voltage induced across the receiving coil is given by
V = (−dβ/dt) ∑ π rn
2; n = 1, 2, … , N
where:
β is the magnetic flux density (gauss).
rn is the radius of the nth turn in the receiving coil (cm).
N is the number of turns in the receiving coil.
Given the geometry of the receiving coil in the ADuM7240/
ADuM7241 and an imposed requirement that the induced
voltage be, at most, 50% of the 0.5 V margin at the decoder, a
maximum allowable magnetic field at a given frequency can be
calculated. The result is shown in Figure 14.
Data Sheet ADuM7240/ADuM7241
Rev. B | Page 13 of 16
1000
100
10
1
0.1
0.01
0.0011k 100M10k
MAXI MUM AL LO WABL E M AGNET IC F LUX ( kgau ss)
100k 1M 10M
MAGNETIC FIELD FREQUENCY (Hz)
10240-014
Figure 14. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.5 kgauss induces a voltage
of 0.25 V at the receiving coil. This voltage is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse (and
is of the worst-case polarity), it reduces the received pulse from
>1.0 V to 0.75 V, still well above the 0.5 V sensing threshold of
the decoder.
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances from the
ADuM7240/ADuM7241 transformers. Figure 15 shows these
allowable current magnitudes as a function of frequency for
selected distances. As shown in Figure 15, the ADuM7240/
ADuM7241 is extremely immune and can be affected only by
extremely large currents operated at high frequency very close
to the component. For the 1 MHz example, a 1.2 kA current
placed 5 mm away from the ADuM7240/ADuM7241 is
required to affect the operation of the component.
1000
100
10
1
0.1
0.01
1k 100M10k
MAXI MUM AL LO WABL E CURRE NT (kA)
100k 1M 10M
MAGNETIC FIELD FREQUENCY (Hz)
DISTANCE = 5mm
DISTANCE = 100mm
DISTANCE = 1m
10240-015
Figure 15. Maximum Allowable Current for Various
Current-to-ADuM7240/ADuM7241 Spacings
Note that with extreme combinations of strong magnetic field
and high frequency current, loops formed by printed circuit
board traces can induce error voltages large enough to trigger
the thresholds of receiver circuitry. Take care in the layout of
such traces to avoid this possibility.
POWER CONSUMPTION
The supply current at a given channel of the ADuM7240/
ADuM7241 isolator is a function of the supply voltage, the
data rate of the channel, and the output load of the channel.
For each input channel, the supply current is given by
IDDI = IDDI(Q) f ≤ 0.5 fr
IDDI = IDDI(D) × (2f − fr) + IDDI(Q) f > 0.5 fr
For each output channel, the supply current is given by
IDDO = IDDO(Q) f ≤ 0.5 fr
IDDO = (IDDO(D) + (0.5 × 10−3) × CL × VDDO) × (2f − fr) + IDDO(Q)
f > 0.5 fr
where:
IDDI(D), IDDO(D) are the input and output dynamic supply currents
per channel (mA/Mbps).
CL is the output load capacitance (pF).
VDDO is the output supply voltage (V).
f is the input logic signal frequency (MHz); it is half the input
data rate, expressed in units of Mbps.
fr is the input stage refresh rate (Mbps).
IDDI(Q), IDDO(Q) are the specified input and output quiescent
supply currents (mA).
To calculate the total VDD1 and VDD2 supply current, the supply
currents for each input and output channel corresponding to
VDD1 and VDD2 are calculated and totaled. Figure 6 and Figure 7
show per-channel supply currents as a function of data rate for
an unloaded output condition. Figure 8 shows the per-channel
supply current as a function of data rate for a 15 pF output
condition. Figure 9 through Figure 12 show the total VDD1 and
VDD2 supply current as a function of data rate for ADuM7240
and ADuM7241 channel configurations.
INSULATION LIFETIME
All insulation structures eventually break down when subjected to
voltage stress over a sufficiently long period. The rate of insulation
degradation is dependent on the characteristics of the voltage
waveform applied across the insulation. In addition to the
testing performed by the regulatory agencies, Analog Devices
carries out an extensive set of evaluations to determine the
lifetime of the insulation structure within the ADuM7240/
ADuM7241.
Analog Devices performs accelerated life testing using voltage levels
higher than the rated continuous working voltage. Acceleration
factors for several operating conditions are determined. These
factors allow calculation of the time to failure at the actual working
voltage. The values shown in Table 18 summarize the working
voltage for 50 years of service life.
ADuM7240/ADuM7241 Data Sheet
Rev. B | Page 14 of 16
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40(0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25(0.0098)
0.10 (0.0040)
4
1
8 5
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80(0.1497)
1.27 (0.0500)
BSC
6.20(0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 16. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
No. of
Inputs,
V
DD1
Side
No. of
Inputs,
V
DD2
Side
Maximum
Data
Rate (Mbps)
Maximum
Propagation
Delay, 5 V (ns)
Temperature
Range
Package
Description
Package
Option
ADuM7240ARZ 2 0 1 75 −40°C to +105°C 8-Lead SOIC_N R-8
ADuM7240ARZ-RL7
2
0
1
75
−40°C to +105°C
8-Lead SOIC_N,
7” Tape and Reel
R-8
ADuM7240CRZ 2 0 25 50 −40°C to +105°C 8-Lead SOIC_N R-8
ADuM7240CRZ-RL7 2 0 25 50 −40°C to +105°C 8-Lead SOIC_N,
7” Tape and Reel
R-8
ADuM7241ARZ 1 1 1 75 −40°C to +105°C 8-Lead SOIC_N R-8
ADuM7241ARZ-RL7 1 1 1 75 −40°C to +105°C 8-Lead SOIC_N,
7” Tape and Reel
R-8
ADuM7241CRZ 1 1 25 50 −40°C to +105°C 8-Lead SOIC_N R-8
ADuM7241CRZ-RL7 1 1 25 50 −40°C to +105°C 8-Lead SOIC_N,
7” Tape and Reel
R-8
1 Z = RoHS Compliant Part.
Data Sheet ADuM7240/ADuM7241
Rev. B | Page 15 of 16
NOTES
