1
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
Pin 1
2
3
4
5
6
7
8
4
32
1
5
678
TSON-8-3
8 D
7 D
6 D
5 D
S 1
S 2
S 3
G 4
MOSFET
OptiMOSTM5Power-Transistor,80V
Features
•OptimizedforSynchronousRectificationinserveranddesktop
•100%avalanchetested
•Superiorthermalresistance
•N-channel
•175°Crated
•Pb-freeleadplating;RoHScompliant
•Halogen-freeaccordingtoIEC61249-2-21
ProductValidation:
Qualifiedforindustrialapplicationsaccordingtotherelevanttestsof
JEDEC47/20/22
Table1KeyPerformanceParameters
Parameter Value Unit
VDS 80 V
RDS(on),max 2.1 m
ID100 A
Qoss 110 nC
QG(0V..10V) 94 nC
Type/OrderingCode Package Marking RelatedLinks
BSC021N08NS5 TSON-8-3 021N08N -
2
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Continuous drain current ID
-
-
-
-
-
-
100
100
27
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=10V,TC=25°C,RthJA=50K/W1)
Pulsed drain current2) ID,pulse - - 400 A TC=25°C
Avalanche energy, single pulse3) EAS - - 679 mJ ID=50A,RGS=25
Gate source voltage VGS -20 - 20 V -
Power dissipation Ptot -
-
-
-
214
3.0 WTC=25°C
TA=25°C,RthJA=50K/W1)
Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category;
DIN IEC 68-1: 55/175/56
2Thermalcharacteristics
atTj=25°C,unlessotherwisespecified
Table3Thermalcharacteristics
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Thermal resistance, junction - case,
bottom RthJC - 0.4 0.7 K/W -
Thermal resistance, junction - case,
top RthJC - - 20 K/W -
Device on PCB,
6 cm2 cooling area1) RthJA - - 50 K/W -
1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2) See Diagram 3 for more detailed information
3) See Diagram 13 for more detailed information
4
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
3Electricalcharacteristics
atTj=25°C,unlessotherwisespecified
Table4Staticcharacteristics
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Drain-source breakdown voltage V(BR)DSS 80 - - V VGS=0V,ID=1mA
Gate threshold voltage VGS(th) 2.2 3 3.8 V VDS=VGS,ID=146µA
Zero gate voltage drain current IDSS -
-
0.1
10
1
100 µA VDS=80V,VGS=0V,Tj=25°C
VDS=80V,VGS=0V,Tj=125°C
Gate-source leakage current IGSS - 10 100 nA VGS=20V,VDS=0V
Drain-source on-state resistance RDS(on) -
-
1.6
2.2
2.1
2.9 mVGS=10V,ID=50A
VGS=6V,ID=25A
Gate resistance1) RG- 1.9 2.9 -
Transconductance gfs 70 140 - S |VDS|>2|ID|RDS(on)max,ID=50A
Table5Dynamiccharacteristics
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Input capacitance1) Ciss - 6600 8600 pF VGS=0V,VDS=40V,f=1MHz
Output capacitance1) Coss - 1100 1400 pF VGS=0V,VDS=40V,f=1MHz
Reverse transfer capacitance1) Crss - 47 82 pF VGS=0V,VDS=40V,f=1MHz
Turn-on delay time td(on) - 13 - ns VDD=40V,VGS=10V,ID=50A,
RG,ext=3
Rise time tr- 17 - ns VDD=40V,VGS=10V,ID=50A,
RG,ext=3
Turn-off delay time td(off) - 44 - ns VDD=40V,VGS=10V,ID=50A,
RG,ext=3
Fall time tf- 20 - ns VDD=40V,VGS=10V,ID=50A,
RG,ext=3
Table6Gatechargecharacteristics2)
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Gate to source charge Qgs - 29 - nC VDD=40V,ID=50A,VGS=0to10V
Gate charge at threshold Qg(th) - 20 - nC VDD=40V,ID=50A,VGS=0to10V
Gate to drain charge1) Qgd - 20 29 nC VDD=40V,ID=50A,VGS=0to10V
Switching charge Qsw - 29 - nC VDD=40V,ID=50A,VGS=0to10V
Gate charge total1) Qg- 94 117 nC VDD=40V,ID=50A,VGS=0to10V
Gate plateau voltage Vplateau - 4.4 - V VDD=40V,ID=50A,VGS=0to10V
Gate charge total, sync. FET Qg(sync) - 81 - nC VDS=0.1V,VGS=0to10V
Output charge1) Qoss - 110 147 nC VDD=40V,VGS=0V
1) Defined by design. Not subject to production test.
2) See Gate charge waveforms for parameter definition
5
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
Table7Reversediode
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Diode continuous forward current IS- - 100 A TC=25°C
Diode pulse current IS,pulse - - 400 A TC=25°C
Diode forward voltage VSD - 0.83 1.1 V VGS=0V,IF=50A,Tj=25°C
Reverse recovery time1) trr - 50 100 ns VR=40V,IF=50A,diF/dt=100A/µs
Reverse recovery charge1) Qrr - 80 160 nC VR=40V,IF=50A,diF/dt=100A/µs
1) Defined by design. Not subject to production test.
6
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
TC[°C]
Ptot[W]
0 25 50 75 100 125 150 175 200
0
40
80
120
160
200
240
Ptot=f(TC)
Diagram2:Draincurrent
TC[°C]
ID[A]
0 25 50 75 100 125 150 175 200
0
20
40
60
80
100
120
ID=f(TC);VGS10V
Diagram3:Safeoperatingarea
VDS[V]
ID[A]
10-1 100101102
10-1
100
101
102
103
1 µs
10 µs
100 µs
1 ms
10 ms
DC
ID=f(VDS);TC=25°C;D=0;parameter:tp
Diagram4:Max.transientthermalimpedance
tp[s]
ZthJC[K/W]
10-6 10-5 10-4 10-3 10-2 10-1
10-3
10-2
10-1
100
0.5
0.2
0.1
0.05
0.02
0.01
single pulse
ZthJC=f(tp);parameter:D=tp/T
7
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
Diagram5:Typ.outputcharacteristics
VDS[V]
ID[A]
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0
40
80
120
160
200
240
280
320
360
400
6 V
7 V
10 V
5.5 V
5 V
ID=f(VDS);Tj=25°C;parameter:VGS
Diagram6:Typ.drain-sourceonresistance
ID[A]
RDS(on)[m]
0 50 100 150 200 250 300 350 400
0
1
2
3
4
5
6
5 V
5.5 V
6 V
7 V
10 V
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
VGS[V]
ID[A]
02468
0
40
80
120
160
200
240
280
320
360
400
175 °C 25 °C
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj
Diagram8:Typ.forwardtransconductance
ID[A]
gfs[S]
0 25 50 75 100 125 150
0
40
80
120
160
200
240
gfs=f(ID),VDS=3V,Tj=25°C
8
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
Diagram9:Drain-sourceon-stateresistance
Tj[°C]
RDS(on)[m]
-60 -20 20 60 100 140 180
0
1
2
3
4
5
max
typ
RDS(on)=f(Tj);ID=50A;VGS=10V
Diagram10:Typ.gatethresholdvoltage
Tj[°C]
VGS(th)[V]
-60 -20 20 60 100 140 180
0
1
2
3
4
5
1460 µA
146 µA
VGS(th)=f(Tj);VGS=VDS
Diagram11:Typ.capacitances
VDS[V]
C[pF]
0 20 40 60 80
101
102
103
104
Ciss
Coss
Crss
C=f(VDS);VGS=0V;f=1MHz
Diagram12:Forwardcharacteristicsofreversediode
VSD[V]
IF[A]
0.0 0.5 1.0 1.5 2.0
100
101
102
103
25 °C
25 °C, max
175 °C
175 °C, max
IF=f(VSD);parameter:Tj
9
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
Diagram13:Avalanchecharacteristics
tAV[µs]
IAV[A]
100101102103
100
101
102
25 °C
100 °C
150 °C
IAS=f(tAV);RGS=25;parameter:Tj(start)
Diagram14:Typ.gatecharge
Qgate[nC]
VGS[V]
0 10 20 30 40 50 60 70 80
0
1
2
3
4
5
6
7
8
9
10
16 V
40 V
64 V
VGS=f(Qgate);ID=50Apulsed;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Tj[°C]
VBR(DSS)[V]
-80 -40 0 40 80 120 160 200
76
78
80
82
84
86
88
VBR(DSS)=f(Tj);ID=1mA
Diagram Gate charge waveforms
10
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
5PackageOutlines
E2
E3
K2
e
MILLIMETERS
A
b1
c
D
D1
E
E1
L
- 1.10
-
4.90
4.25
5.90
4.00
0.60
0.05
0.20
5.10
4.45
6.10
4.20
0.80
(0.37)
1.27
b 0.34 0.54
0.20 0.40
3.14 3.34
L1 0.43 0.63
Z8B00187559
REVISION
ISSUE DATE
EUROPEAN PROJECTION
01
14.12.2017
DOCUMENT NO.
DIMENSION MIN. MAX.
SCALE
0 2mm
10:1
1
L2 (0.25)
Figure1OutlineTSON-8-3,dimensionsinmm/inches
11
OptiMOSTM5Power-Transistor,80V
BSC021N08NS5
Rev.2.0,2018-03-19Final Data Sheet
RevisionHistory
BSC021N08NS5
Revision:2018-03-19,Rev.2.0
Previous Revision
Revision Date Subjects (major changes since last revision)
2.0 2018-03-19 Release of final version
TrademarksofInfineonTechnologiesAG
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EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™,
ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™,
PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™,
SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™.
TrademarksupdatedAugust2015
OtherTrademarks
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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or
automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa
failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand
aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare
intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis
reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered.