ALD110902SAL - Advanced Linear Devices Inc. Advanced Linear Devices Inc.

EPAD

ADVANCED

LINEAR

DEVICES, INC.

QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD®

PRECISION MATCHED PAIR MOSFET ARRAY

ALD110802/ALD110902

VGS(th)= +0.20V

GENERAL DESCRIPTION

ALD110802/ALD1 10902 are high precision monolithic quad/dual enhance-

ment mode N-Channel MOSFETS matched at the factory using ALD’s

proven EP AD® CMOS technology . These devices are intended for low volt-

age, small signal applications. The ALD1 10802/ALD1 10902 MOSFETS are

designed and built for exceptional device electrical characteristics match-

ing. Since these devices are on the same monolithic chip, they also exhibit

excellent tempco tracking characteristics. They are versatile circuit elements

useful as design components for a broad range of analog applications,

such as basic building blocks for current sources, differential amplifier input

stages, transmission gates, and multiplexer applications. For most applica-

tions, connect the V+ pin to the most positive voltage and the V- and IC

pins to the most negative voltage in the system. All other pins must have

voltages within these voltage limits at all times.

The ALD110802/ALD110902 devices are built for minimum offset voltage

and differential thermal response, and they are suited for switching and

amplifying applications in <+0.1V to +10V systems where low input bias

current, low input capacitance and fast switching speed are desired, as

these devices exhibit well controlled turn-off and sub-threshold character-

istics and can be biased and operated in the sub-threshold region. Since

these are MOSFET devices, they feature very large (almost infinite) cur-

rent gain in a low frequency, or near DC, operating environment.

The ALD1 10802/ALD110902 are suitable for use in very low operating volt-

age or very low power (nanowatt), precision applications which require very

high current gain, beta, such as current mirrors and current sources. The

high input impedance and the high DC current gain of the Field Effect Tran-

sistors result from extremely low current loss through the control gate. The

DC current gain is limited by the gate input leakage current, which is speci-

fied at 30pA at room temperature. For example, DC beta of the device at a

drain current of 3mA, input leakage current of 30pA, and 25°C is

3mA/30pA = 100,000,000.

FEATURES

• Enhancement-mode (normally off)

• Precision Gate Threshold Voltage of +0.20V

• Matched MOSFET-to-MOSFET characteristics

• Tight lot-to-lot parametric control

• Low input capacitance

• VGS(th) match (VOS) to 10mV

• High input impedance — 1012Ω typical

• Positive, zero, and negative VGS(th) temperature coefficient

• DC current gain >108

• Low input and output leakage currents

Operating Temperature Range*

0°C to +70°C0°C to +70°C

16-Pin 16-Pin 8-Pin 8-Pin

SOIC Plastic Dip SOIC Plastic Dip

Package Package Package Package

ALD110802SCL ALD110802PCL ALD110902SAL ALD110902PAL

*IC pins are internally connected.

Connect to V-

SCL, PCL PACKAGES

SAL, PAL PACKAGES

PIN CONFIGURATION

APPLICATIONS

• Ultra low power (nanowatt) analog and digital

circuits

• Ultra low operating voltage (<0.20V) circuits

• Sub-threshold biased and operated circuits

• Precision current mirrors and current sources

• Nano-Amp current sources

• High impedance resistor simulators

• Capacitive probes and sensor interfaces

• Differential amplifier input stages

• Discrete Voltage comparators and level shifters

• Voltage bias circuits

• Sample and Hold circuits

• Analog and digital inverters

• Charge detectors and charge integrators

• Source followers and High Impedance buffers

• Current multipliers

• Discrete Analog switches / multiplexers

* Contact factory for industrial temp. range or user-specified threshold voltage values.

ALD110802

ALD110902

IC*

314

413

512

IC*

M 4 M 3

M 1 M 2

V-

M 1 M 2

V-

IC* IC*

ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 2 of 12

Drain-Source voltage, VDS 10.6V

Gate-Source voltage, VGS 10.6V

Power dissipation 500 mW

Operating temperature range SCL, PCL, SAL, PAL 0°C to +70°C

Storage temperature range -65°C to +150°C

Lead temperature, 10 seconds +260°C

CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.

ABSOLUTE MAXIMUM RATINGS

OPERATING ELECTRICAL CHARACTERISTICS

V+ = +5V V- = GND TA = 25°C unless otherwise specified

Notes: 1 Consists of junction leakage currents

Gate Threshold V oltage VGS(th) 0.18 0.20 0.22 V IDS = 1µA, VDS = 0.1V

Offset Voltage VOS 210mV

VGS(th)1-VGS(th)2

Offset VoltageTempco TCVOS 5µV/ °CV

DS1 = VDS2

Gate Threshold V oltage TCVGS(th) -1.7 mV/ °CI

DS = 1µA, VDS = 0.1V

Tempco 0.0 IDS = 20µA, VDS = 0.1V

+1.6 IDS = 40µA, VDS = 0.1V

Drain Source On Current IDS(ON) 12.0 mA VGS = +9.7V, VDS = +5V

3.0 VGS = +4.2V, VDS = +5V

Forward T ransconductance GFS 1.4 mmho VGS = +4.2V

VDS = +9.2V

Transconductance Mismatch ∆GFS 1.8 %

Output Conductance GOS 68 µmho VGS = +4.2V

VDS = +9.2V

Drain Source On Resistance RDS(ON) 500 ΩVGS = +4.2V

VDS = +0.1V

Drain Source On Resistance ∆RDS(ON) 0.5 %

Mismatch

Drain Source Breakdown BVDSX 10 V V- = VGS = -0.8V

Voltage IDS = 1.0µA

Drain Source Leakage Current1IDS(OFF) 10 400 pA VGS = -0.8V, VDS =+5V

V- = -5V

4nAT

A = 125°C

Gate Leakage Current1IGSS 3 200 pA VGS = +5V, VDS = 0V

1nAT

A =125°C

Input Capacitance CISS 2.5 pF

Transfer Reverse Capacitance CRSS 0.1 pF

Turn-on Delay Time ton 10 ns V+ = 5V, RL= 5KΩ

Turn-off Delay Time toff 10 ns V+ = 5V, RL= 5KΩ

Crosstalk 60 dB f = 100KHz

ALD110802/ALD110902

Parameter Symbol Min Typ Max Unit Test Conditions

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 3 of 12

ALD1108xx/ALD1109xx/ALD1148xx/ALD1149xx are monolithic

quad/dual N-Channel MOSFETs matched at the factory using ALD’s

proven EPAD® CMOS technology . These devices are intended for

low voltage, small signal applications.

ALD’s Electrically Programmable Analog Device (EPAD) technol-

ogy provides a family of matched transistors with a range of preci-

sion threshold values. All members of this family are designed and

actively programmed for exceptional matching of device electrical

characteristics. Threshold values range from -3.50V Depletion to

+3.50V Enhancement devices, including standard products speci-

fied at -3.50V, -1.30V, -0.40V, +0.00V, +0.20V, +0.40V, +0.80V,

+1.40V, and +3.30V. ALD can also provide any customer desired

value between -3.50V and +3.50V. For all these devices, even the

depletion and zero threshold transistors, ALD EPAD technology

enables the same well controlled turn-off, subthreshold, and low

leakage characteristics as standard enhancement mode MOSFET s.

With the design and active programming, even units from different

batches and different dates of manufacture have well matched char-

acteristics. As these devices are on the same monolithic chip, they

also exhibit excellent tempco tracking.

This EP AD MOSFET Array product family (EP AD MOSFET) is avail-

able in the three separate categories, each providing a distinctly

different set of electrical specifications and characteristics. The first

category is the ALD110800/ALD110900 Zero-Threshold™ mode

EPAD MOSFETs. The second category is the ALD1108xx/

ALD1109xx enhancement mode EPAD MOSFETs. The third cat-

egory is the ALD1148xx/ALD1149xx depletion mode EPAD

MOSFETs. (The suffix “xx” denotes threshold voltage in 0.1V steps,

for example, xx = 08 denotes 0.80V).

The ALD110800/ALD110900 (quad/dual) are EPAD MOSFETs in

which the individual threshold voltage of each MOSFET is fixed at

zero. The threshold voltage is defined as IDS = 1µA @ VDS = 0.1V

when the gate voltage VGS = 0.00V. Zero threshold devices oper-

ate in the enhancement region when operated above threshold volt-

age and current level (VGS > 0.00V and IDS > 1µA) and subthresh-

old region when operated at or below threshold voltage and cur-

rent level (VGS <= 0.00V and IDS < 1µA). This device, along with

other very low threshold voltage members of the product family,

constitute a class of EPAD MOSFETs that enable ultra low supply

voltage operation and nanopower type of circuit designs, applicable

in either analog or digital circuits.

The ALD1108xx/ALD1109xx (quad/dual) product family features

precision matched enhancement mode EPAD MOSFET devices,

which require a positive bias voltage to turn on. Precision threshold

values such as +1.40V, +0.80V, +0.20V are offered. No conductive

channel exists between the source and drain at zero applied gate

voltage for these devices, except that the +0.20V version has a

subthreshold current at about 20nA.

The ALD1148xx/ALD1149xx (quad/dual) features depletion mode

EPAD MOSFETs, which are normally-on devices when the gate

bias voltage is at zero volts. The depletion mode threshold voltage

is at a negative voltage level at which the EP AD MOSFET turns off.

Without a supply voltage and/or with VGS = 0.0V the EP AD MOSFET

device is already turned on and exhibits a defined and controlled

on-resistance between the source and drain terminals.

The ALD1148xx/ALD1149xx depletion mode EPAD MOSFETs are

different from most other types of depletion mode MOSFETs and

certain types of JFETs in that they do not exhibit high gate leakage

currents and channel/junction leakage currents. When negative

signal voltages are applied to the gate terminal, the designer/user

can depend on the EPAD MOSFET device to be controlled, modu-

lated and turned off precisely. The device can be modulated and

turned-off under the control of the gate voltage in the same manner

as the enhancement mode EPAD MOSFET and the same device

equations apply.

EP AD MOSFETs are ideal for minimum offset voltage and differen-

tial thermal response, and they are used for switching and amplify-

ing applications in low voltage (1V to 10V or +/-0.5V to +/-5V) or

ultra low voltage (less than 1V or +/-0.5V) systems. They feature

low input bias current (less than 30pA max.), ultra low power

(microWatt) or Nanopower (power measured in nanoWatt) opera-

tion, low input capacitance and fast switching speed. These de-

vices can be used where a combination of these characteristics

are desired.

KEY APPLICATION ENVIRONMENT

EP AD MOSFET Array products are for circuit applications in one or

more of the following operating environments:

* Low voltage: 1V to 10V or +/-0.5V to +/-5V

* Ultra low voltage: less than 1V or +/-0.5V

* Low power: voltage x current = power measured in microwatt

* Nanopower: voltage x current = power measured in nanowatt

* Precision matching and tracking of two or more MOSFETs

ELECTRICAL CHARACTERISTICS

The turn-on and turn-off electrical characteristics of the EPAD

MOSFET products are shown in the Drain-Source On Current vs

Drain-Source On Voltage and Drain-Source On Current vs Gate-

Source Voltage graphs. Each graph shows the Drain-Source On

Current versus Drain-Source On V oltage characteristics as a func-

tion of Gate-Source voltage in a different operating region under

different bias conditions. As the threshold voltage is tightly speci-

fied, the Drain-Source On Current at a given gate input voltage is

better controlled and more predictable when compared to many

other types of MOSFETs.

EPAD MOSFETs behave similarly to a standard MOSFET, there-

fore classic equations for a n-channel MOSFET applies to EPAD

MOSFET as well. The Drain current in the linear region (VDS <

VGS - VGS(th)) is given by:

IDS = u . COX . W/L . [VGS - VGS(th) - VDS/2] . VDS

where: u = Mobility

COX = Capacitance / unit area of Gate electrode

VGS = Gate to Source voltage

VGS(th) = Turn-on threshold voltage

VDS = Drain to Source voltage

W = Channel width

L = Channel length

In this region of operation the IDS value is proportional to VDS value

and the device can be used as a gate-voltage controlled resistor.

For higher values of VDS where VDS >= VGS - VGS(th), the satura-

tion current IDS is now given by (approx.):

IDS = u . COX . W/L . [VGS - VGS(th)]2

PERFORMANCE CHARACTERISTICS OF EPAD®

PRECISION MATCHED PAIR MOSFET FAMILY

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 4 of 12

SUB-THRESHOLD REGION OF OPERATION

Low voltage systems, namely those operating at 5V, 3.3V or less,

typically require MOSFETs that have threshold voltage of 1V or

less. The threshold, or turn-on, voltage of the MOSFET is a voltage

below which the MOSFET conduction channel rapidly turns off. For

analog designs, this threshold voltage directly affects the operating

signal voltage range and the operating bias current levels.

At or below threshold voltage, an EPAD MOSFET exhibits a turn-

off characteristic in an operating region called the subthreshold re-

gion. This is when the EPAD MOSFET conduction channel rapidly

turns off as a function of decreasing applied gate voltage. The con-

duction channel induced by the gate voltage on the gate electrode

decreases exponentially and causes the drain current to decrease

exponentially. However, the conduction channel does not shut off

abruptly with decreasing gate voltage. Rather, it decreases at a

fixed rate of approximately 116mV per decade of drain current de-

crease. Thus, if the threshold voltage is +0.20V, for example, the

drain current is 1µA at VGS = +0.20V. At VGS = +0.09V, the drain

current would decrease to 0.1µA. Extrapolating from this, the drain

current is 0.01µA (10nA) at VGS = -0.03V, 1nA at VGS = -0.14V,

and so forth. This subthreshold characteristic extends all the way

down to current levels below 1nA and is limited by other currents

such as junction leakage currents.

At a drain current to be declared “zero current” by the user, the

VGS voltage at that zero current can now be estimated. Note that

using the above example, with VGS(th) = +0.20V, the drain current

still hovers around 20nA when the gate is at zero volts, or ground.

LOW POWER AND NANOPOWER

When supply voltages decrease, the power consumption of a given

load resistor decreases as the square of the supply voltage. So

one of the benefits in reducing supply voltage is to reduce power

consumption. While decreasing power supply voltages and power

consumption go hand-in-hand with decreasing useful AC bandwidth

and at the same time increases noise effects in the circuit, a circuit

designer can make the necessary tradeoffs and adjustments in any

given circuit design and bias the circuit accordingly.

With EPAD MOSFETs, a circuit that performs a specific function

can be designed so that power consumption can be minimized. In

some cases, these circuits operate in low power mode where the

power consumed is measure in micro-watts. In other cases, power

dissipation can be reduced to the nano-watt region and still provide

a useful and controlled circuit function operation.

ZERO TEMPERATURE COEFFICIENT (ZTC) OPERATION

For an EPAD MOSFET in this product family, there exist operating

points where the various factors that cause the current to increase

as a function of temperature balance out those that cause the cur-

rent to decrease, thereby canceling each other , and resulting in net

temperature coefficient of near zero. One of these temperature

stable operating points is obtained by a ZTC voltage bias condi-

tion, which is 0.55V above a threshold voltage when VGS = VDS,

resulting in a temperature stable current level of about 68µA. For

other ZTC operating points, see ZTC characteristics.

PERFORMANCE CHARACTERISTICS

Performance characteristics of the EPAD MOSFET product family

are shown in the following graphs. In general, the threshold voltage

shift for each member of the product family causes other affected

electrical characteristics to shift with an equivalent linear shift in

VGS(th) bias voltage. This linear shift in VGS causes the subthresh-

old I-V curves to shift linearly as well. Accordingly , the subthreshold

operating current can be determined by calculating the gate volt-

age drop relative to its threshold voltage, VGS(th).

RDS(ON) AT VGS = GROUND

Several of the EPAD MOSFETs produce a fixed resistance when

their gate is grounded. For ALD110800, the drain current is 1µA at

VDS = 0.1V and VGS = 0.0V. Thus, just by grounding the gate of

the ALD110800, a resistor with RDS(ON) = ~100KΩ is produced.

When an ALD114804 gate is grounded, the drain current IDS =

18.5µA @ VDS = 0.1V, producing RDS(ON) = 5.4KΩ. Similarly,

ALD114813 and ALD114835 produce drain currents of 77µA and

185µA, respectively, at VGS = 0.0V, and RDS(ON) values of 1.3KΩ

and 540Ω, respectively.

MATCHING CHARACTERISTICS

A key benefit of using a matched pair EPAD MOSFET is to main-

tain temperature tracking. In general, for EPAD MOSFET matched

pair devices, one device of the matched pair has gate leakage cur-

rents, junction temperature effects, and drain current temperature

coefficient as a function of bias voltage that cancel out similar ef-

fects of the other device, resulting in a temperature stable circuit.

As mentioned earlier, this temperature stability can be further en-

hanced by biasing the matched-pairs at Zero Tempco (ZTC) point,

even though that could require special circuit configuration and

power consumption design consideration.

PERFORMANCE CHARACTERISTICS OF EPAD®

PRECISION MATCHED PAIR MOSFET FAMILY (cont.)

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 5 of 12

TYPICAL PERFORMANCE CHARACTERISTICS

1086420

DRAIN-SOURCE ON CURRENT

(mA)

DRAIN-SOURCE ON VOLTAGE (V)

OUTPUT CHARACTERISTICS

TA = +25°C

VGS - VGS(th) = +5V

VGS - VGS(th) = +4V

VGS - VGS(th) = +3V

VGS - VGS(th) = +2V

VGS - VGS(th) = +1V

DRAIN-SOURCE ON CURRENT (µA)

DRAIN-SOURCE ON RESISTANCE

(Ω)

2500

2000

1000

1500

500

10 10000

100 1000

DRAIN-SOURCE ON RESISTANCE

vs. DRAIN-SOURCE ON CURRENT

VGS = VGS(th) + 4V

VGS = VGS(th) + 6V

TA = +25°C

FORWARD TRANSFER CHARACTERISTICS

DRAIN-SOURCE ON CURRENT

(mA)

GATE-SOURCE VOLTAGE (V)

-4 0

-2 246810

VGS(th) = -3.5V

VGS(th) = +1.4V

VGS(th) = -0.4V

VGS(th) = 0.0V

VGS(th) = +0.2V

VGS(th) = -1.3V

VGS(th) = +0.8V

TA = +25°C

VDS = +10V

TRANSCONDUCTANCE vs.

AMBIENT TEMPERATURE

TRANSCONDUCTANCE

(mA/V)

AMBIENT TEMPERATURE (°C)

-50 -25 0 25 50 12510075

2.5

2.0

1.5

1.0

0.5

10-1-2-3-4

DRAIN-SOURCE ON CURRENT

(nA)

GATE-SOURCE VOLTAGE (V)

SUBTHRESHOLD FORWARD TRANSFER

CHARACTERISTICS

100000

10000

1000

100

0.1

0.01

TA = +25°C

VDS = +0.1V

VGS(th) = -0.4V

VGS(th) = 0.0V

VGS(th) = +0.2V

VGS(th) = -1.3V

VGS(th) = +0.8V

VGS(th) = +1.4V

VGS(th) = -3.5V

SUBTHRESHOLD FORWARD TRANSFER

CHARACTERISTICS

GATE-SOURCE VOLTAGE (V)

DRAIN-SOURCE ON CURRENT

(nA)

10000

1000

100

0.1

0.01

VGS(th)-0.5 VGS(th)-0.4 VGS(th)-0.3 VGS(th)-0.2 VGS(th)-0.1 VGS(th)

VDS = +0.1V

Slope = 110mV/decade

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 6 of 12

TYPICAL PERFORMANCE CHARACTERISTICS (cont.)

DRAIN-SOURCE ON CURRENT

(mA)

DRAIN-SOURCE ON CURRENT, BIAS

CURRENT vs. AMBIENT TEMPERATURE

GATE- AND DRAIN-SOURCE VOLTAGE

= V

) (V)

VGS(th) VGS(th)+3

VGS(th)+2 VGS(th)+4VGS(th)+1VGS(th)-1

+70°C +125°C

-25°C

0°C

-55°C

100

DRAIN-SOURCE ON CURRENT

(µA)

DRAIN-SOURCE ON CURRENT, BIAS

CURRENT vs. AMBIENT TEMPERATURE

GATE- AND DRAIN-SOURCE VOLTAGE

(VGS = VDS) (V)

VGS(th)+1.0

VGS(th)+0.4 VGS(th)+0.8

VGS(th)+0.2 VGS(th)+0.6

VGS(th)

Zero Temperature

Coefficient (ZTC)

-25°C

+125°C

DRAIN-SOURCE ON CURRENT

(µA)

DRAIN-SOURCE ON RESISTANCE (KΩ)

100000

10000

1000

100

0.1

0.01

10000

0.1 101 100 1000

DRAIN-SOURCE ON CURRENT vs.

DRAIN-SOURCE ON RESISTANCE

TA = +25°C

= -4.0V to +5.4V

VDS = +0.1V VDS = +5V

VDS = +1V

VDS = +10V

GATE-SOURCE VOLTAGE vs.

DRAIN-SOURCE ON CURRENT

GATE-SOURCE VOLTAGE (V)

DRAIN-SOURCE ON CURRENT (µA)

0.1 110010 1000 10000

GS(th)

-1

VDS = +0.5V

TA = +125°C

VDS = +0.5V

TA = +25°C

VDS = +5V

TA = +125°C

VDS = RON • IDS(ON)

VDS

IDS(ON)

VGS

VDS = +5V

TA = +25°C

DRAIN-SOURCE ON CURRENT

(mA)

OUTPUT VOLTAGE (V)

DRAIN-SOURCE ON CURRENT

vs. OUTPUT VOLTAGE

VGS(th) VGS(th)+3

VGS(th)+2 VGS(th)+4VGS(th)+1 VGS(th)+5

TA = +25°C

VDS = +10V

VDS = +5V

VDS = +1V

AMBIENT TEMPERATURE (°C)

-1

-2

-3

-4

OFFSET VOLTAGE

(mV)

OFFSET VOLTAGE vs.

AMBIENT TEMPERATURE

-50 -25 0 25 50 12510075

REPRESENTATIVE UNITS

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 7 of 12

TYPICAL PERFORMANCE CHARACTERISTICS (cont.)

GATE LEAKAGE CURRENT

(pA)

AMBIENT TEMPERATURE (°C)

GATE LEAKAGE CURRENT

vs. AMBIENT TEMPERATURE

10000

1000

100

0.1

0.01 -50 -25 0 25 50 12510075

IGSS

DRAIN-SOURCE ON RESISTANCE (KΩ)

GATE-SOURCE VOLTAGE (V)

GATE SOURCE VOLTAGE vs.

DRAIN-SOURCE ON RESISTANCE

1086420

VGS(th)

VGS(th)+3

VGS(th)+2

VGS(th)+4

VGS(th)+1

VDS

IDS(ON)

VGS

+25°C

+125°C

0.0V ≤ V

≤ 5.0V

DRAIN-GATE DIODE CONNECTED

VOLTAGE TEMPCO (mV/°C)

DRAIN-SOURCE ON CURRENT (µA)

DRAIN-GATE DIODE CONNECTED VOLTAGE

TEMPCO vs. DRAIN-SOURCE ON CURRENT

110

100 1000

2.5

-2.5

-5

-55°C ≤ TA ≤ +125°C

TRANSFER CHARACTERISTICS

TRANSCONDUCTANCE

(mΩ

-1

)

GATE-SOURCE VOLTAGE (V)

-4 0

-2 2468

1.6

0.8

0.0

0.4

1.2

VGS(th) = -3.5V

VGS(th) = -0.4V

VGS(th) = 0.0V

VGS(th) = +0.2V

VGS(th) = -1.3V

VGS(th) = +0.8V

VGS(th) = +1.4V

= +25°C

= +10V

5.02.01.00.50.20.1

GATE-SOURCE VOLTAGE

(V)

DRAIN-SOURCE ON VOLTAGE (V)

ZERO TEMPERATURE

COEFFICIENT CHARACTERISTICS

0.6

0.5

0.3

0.2

0.0

VGS(th) = -3.5V

VGS(th) = -1.3V, -0.4V, 0.0V, +0.2V, +0.8V, +1.4V

GATE-SOURCE VOLTAGE

(V)

2.5

2.0

1.5

1.0

0.5

0.0

-0.5

SUBTHRESHOLD CHARACTERISTICS

100000 10000 1000 100 10 1 0.1

DRAIN-SOURCE ON CURRENT (nA)

VGS(th) = +0.2V

TA = +25°CVGS(th) = +0.2V

TA = +55°C

VGS(th) = +0.4V

TA = +25°C

VGS(th) = +0.4V

TA = +55°C

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 8 of 12

1086420

TARNCONDUCTANCE

(mΩ

-1

)

DRAIN-SOURCE ON CURRENT (mA)

TRANCONDUCTANCE vs.

DRAIN-SOURCE ON CURRENT

1.2

0.9

0.6

0.3

0.0

= +25°C

= +10V

THRESHOLD VOLTAGE vs.

AMBIENT TEMPERATURE

THRESHOLD VOTAGE

(V)

AMBIENT TEMPERATURE (°C)

4.0

2.0

0.0

1.0

3.0

-50 -25 0 25 50 12510075

Vt = +0.8V

Vt = +1.4V

Vt = +0.4V

Vt = +0.2V

Vt = 0.0V

IDS = +1µA

VDS = +0.1V

GATE-SOURCE VOLTAGE

VGS

- VGS(th) (V)

DRAIN-SOURCE ON CURRENT (nA)

0.3

0.2

0.1

-0.1

-0.2

-0.3

-0.4 10000 0.1

10 1

100

1000

NORMALIZED SUBTHRESHOLD

CHARACTERISTICS RELATIVE TO

GATE THRESHOLD VOLTAGE

VDS = +0.1V

+55°C

+25°C

SUBTHRESHOLD FORWARD

TRANSFER CHARACTERISTICS

THRESHOLD VOLTAGE

(V)

2.0

1.0

0.0

-1.0

-2.0

-3.0

-4.0

-25 125

25 75

AMBIENT TEMPERATURE (°C)

VGS(th) = -0.4V

VGS(th) = -1.3V

VGS(th) = 0.0V

VGS(th) = -3.5V

IDS = +1µA

VDS = +0.1V

TYPICAL PERFORMANCE CHARACTERISTICS (cont.)

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 9 of 12

16 Pin Plastic SOIC Package

S (45°)

Millimeters Inches

Min Max Min MaxDim 1.75

0.25

0.45

0.25

10.00

4.05

6.30

0.937

8°

0.50

0.053

0.004

0.014

0.007

0.385

0.140



0.224

0.024

0°

0.010



0.069

0.010

0.018

0.010

0.394

0.160

0.248

0.037

8°

0.020

1.27 BSC 0.050 BSC

1.35

0.10

0.35

0.18

9.80

3.50

5.70

0.60

0°

0.25

D-16

SOIC-16 PACKAGE DRAWING

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 10 of 12

16 Pin Plastic DIP Package

Millimeters Inches

Min Max Min MaxDim

D-16

S-16

3.81

0.38

1.27

0.89

0.38

0.20

18.93

5.59

7.62

2.29

7.37

2.79

0.38

0°

5.08

1.27

2.03

1.65

0.51

0.30

21.33

7.11

8.26

2.79

7.87

3.81

1.52

15°

0.105

0.015

0.050

0.035

0.015

0.008

0.745

0.220

0.300

0.090

0.290

0.110

0.015

0°

0.200

0.050

0.080

0.065

0.020

0.012

0.840

0.280

0.325

0.110

0.310

0.150

0.060

15°

PDIP-16 PACKAGE DRAWING

EE1

ce1ø

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 11 of 12

8 Pin Plastic SOIC Package

Millimeters Inches

Min Max Min MaxDim

D-8

1.75

0.25

0.45

0.25

5.00

4.05

6.30

0.937

8°

0.50

0.053

0.004

0.014

0.007

0.185

0.140

0.224

0.024

0°

0.010



0.069

0.010

0.018

0.010

0.196

0.160

0.248

0.037

8°

0.020

1.27 BSC 0.050 BSC

1.35

0.10

0.35

0.18

4.69

3.50

5.70

0.60

0°

0.25

SOIC-8 PACKAGE DRAWING

S (45°)

ALD110802/ALD110902, Vers. 2.3 Advanced Linear Devices 12 of 12

8 Pin Plastic DIP Package

Millimeters Inches

Min Max Min MaxDim

D-8

S-8

3.81

0.38

1.27

0.89

0.38

0.20

9.40

5.59

7.62

2.29

7.37

2.79

1.02

0°

5.08

1.27

2.03

1.65

0.51

0.30

11.68

7.11

8.26

2.79

7.87

3.81

2.03

15°

0.105

0.015

0.050

0.035

0.015

0.008

0.370

0.220

0.300

0.090

0.290

0.110

0.040

0°

0.200

0.050

0.080

0.065

0.020

0.012

0.460

0.280

0.325

0.110

0.310

0.150

0.080

15°

PDIP-8 PACKAGE DRAWING

EE1

ce1ø