© Semiconductor Components Industries, LLC, 2017
July, 2020 − Rev. 6
1Publication Order Number:
NCP110/D
Linear Regulator - Low VIN,
Low Noise, High PSRR
200 mA
NCP110
The NCP110 is a linear regulator capable of supplying 200 mA
output current from 1.1 V input voltage. The device provides wide
output range from 0.6 V up to 4.0 V, very low noise and high PSRR.
Due to low quiescent current the NCP110 is suitable for battery
powered devices such as smartphones and tablets. The device is
designed to work with a 1 mF input and a 1 mF output ceramic
capacitor. It is available in ultra−small 0.35P, 0.64 mm x 0.64 mm
Chip Scale Package (CSP) and XDFN4 0.65P, 1 mm x 1 mm.
Features
•Operating Input Voltage Range: 1.1 V to 5.5 V
•Available in Fixed Voltage Option: 0.6 V to 4.0 V
•±2% Accuracy Over Load/Temperature
•Ultra Low Quiescent Current Typ. 20 mA
•Standby Current: Typ. 0.1 mA
•Very Low Dropout: 70 mV for 1.05 V @ 100 mA
•High PSRR: Typ. 95 dB at 20 mA, f = 1 kHz
•Ultra Low Noise: 8.8 mVRMS
•Stable with a 1 mF Small Case Size Ceramic Capacitors
•Available in −WLCSP4 0.64mm x 0.64mm x 0.33mm − Case 567VS
−XDFN4 1mm x 1mm x 0.4mm − Case 711AJ
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
•Battery−powered Equipment
•Smartphone, Tablets
•Digital Cameras
•Smoke Detectors
•Portable Medical Equipment
•RF, PLL, VCO and Clock Power Supplies
•Battery Powered Wireless IoT Modules
IN
EN
GND
OUT
OFF
ON
Figure 1. Typical Application Schematics
VOUT
COUT
1 mF
Ceramic
VIN
NCP110
CIN
1 mF
Ceramic
MARKING
DIAGRAMS
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X or XX = Specific Device Code
M = Date Code
See detailed ordering, marking and shipping information on
page 14 of this data sheet.
ORDERING INFORMATION
PIN CONNECTIONS
XDFN4
CASE 711AJ
A1 A2
B1 B2
IN OUT
EN GND
(Top View)
(Top View)
WLCSP4
CASE 567VS
1XX M
1
XM
NCP110
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Figure 2. Simplified Schematic Block Diagram
IN
THERMAL
SHUTDOWN
MOSFET
DRIVER WITH
CURRENT LIMIT
INTEGRATED
SOFT−START
BANDGAP
REFERENCE
ENABLE
LOGIC
EN
OUT
GND
EN
* Active Discharge Only
PIN FUNCTION DESCRIPTION
Pin No.
CSP4
Pin No.
XDFN4
Pin
Name Description
A1 4 IN Input voltage supply pin
A2 1 OUT Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor.
B1 3 EN Chip enable: Applying VEN < 0.2 V disables the regulator, Pulling VEN > 0.7 V enables the LDO.
B2 2 GND Common ground connection
−EPAD EPAD Expose pad can be tied to ground plane for better power dissipation
ABSOLUTE MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage (Note 1) VIN −0.3 V to 6V
Output Voltage VOUT −0.3 to VIN + 0.3, max. 6 V V
Chip Enable Input VCE −0.3 to 6 V V
Output Short Circuit Duration tSC unlimited s
Maximum Junction Temperature TJ150 °C
Storage Temperature TSTG −55 to 150 °C
ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V
ESD Capability, Machine Model (Note 2) ESDMM 200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Characteristics, CSP4 (Note 3)
Thermal Resistance, Junction−to−Air
RqJA
108
°C/W
Thermal Characteristics, XDFN4 (Note 3)
Thermal Resistance, Junction−to−Air 208
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
NCP110
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ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 0.3 V or 1.1 V, whichever is greater; IOUT = 1 mA, CIN =
COUT = 1 mF, unless otherwise noted. VEN = 1.0 V. Typical values are at TJ = +25°C (Note 4).
Parameter Test Conditions Symbol Min Typ Max Unit
Operating Input Voltage VIN 1.1 5.5 V
Output Voltage Accuracy VIN = VOUT(NOM) + 0.3 V
(VIN ≥ 1.1 V)
VOUT(NOM) ≤ 1.5 V VOUT −30 +30 mV
VOUT(NOM) > 1.5 V −2 +2 %
Line Regulation VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.5 V, (VIN ≥ 1.1 V) LineReg 0.02 %/V
Load Regulation IOUT = 1 mA to 200 mA LoadReg 0.001 %/mA
Dropout Voltage (Note 5) VOUT(NOM) = 1.05 V IOUT = 50 mA VDO 40 70 mV
IOUT = 100 mA 70 130
VOUT(NOM) = 1.20 V IOUT = 110 mA 60 140
IOUT = 200 mA 110 190
VOUT(NOM) = 1.80 V IOUT = 200 mA 65 120
VOUT(NOM) = 2.80 V IOUT = 200 mA 45 100
Output Current Limit VOUT = 90% VOUT(NOM) ICL 225 300
mA
Short Circuit Current VOUT = 0 V ISC 300
Quiescent Current IOUT = 0 mA IQ20 25 mA
Shutdown Current VEN ≤ 0.2 V, VIN = 1.1 V IDIS 0.01 1.0 mA
EN Pin Threshold Voltage EN Input Voltage “H” VENH 0.7
V
EN Input Voltage “L” VENL 0.2
EN Pull Down Current VEN = 1.1 V IEN 0.2 0.5 mA
Turn−On Time COUT = 1 mF, From assertion of VEN to
VOUT = 95% VOUT(NOM)
tON 120 ms
Power Supply Rejection Ratio IOUT = 20 mA,
VIN = VOUT + 0.3 V
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 100 kHz
PSRR 90
95
85
55
dB
Output Voltage Noise f = 10 Hz to 100 kHz VN8.8 mVRMS
Thermal Shutdown Threshold Temperature rising TSDH 160 °C
Temperature falling TSDL 140 °C
Active Output Discharge Resis-
tance
VEN < 0.2 V, Version A only RDIS 280 W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 0.02 x VOUT(NOM) below VOUT(NOM).
6. Guaranteed by design.
NCP110
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TYPICAL CHARACTERISTICS
1.06
1.055
1.05
1.045
1.04
1.035
1.03
VOUT
, OUTPUT VOLTAGE (V)
TJ, TEMPERATURE (°C)
−40 1400 20 40 60 120100
Figure 3. Output Voltage vs. Temperature −
VOUT,nom = 1.05 V − CSP4
IOUT = 1 mA
IOUT = 200 mA
1.205
VOUT
, OUTPUT VOLTAGE (V)
TJ, TEMPERATURE (°C)
Figure 4. Output Voltage vs. Temperature −
VOUT,nom = 1.2 V − CSP4
IOUT = 1 mA
IOUT = 200 mA
1.2
1.195
1.19
1.185
1.8
−20 80 −40 1400 20 40 60 120100−20 80
1.81
VOUT
, OUTPUT VOLTAGE (V)
TJ, TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature −
VOUT,nom = 1.8 V − CSP4
IOUT = 1 mA
IOUT = 200 mA
1.805
1.8
1.795
1.79
1.785
1.78
1
LOADREG, LOAD REGULATION (mV)
TJ, TEMPERATURE (°C)
Figure 6. Load Regulation vs. Temperature
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
VIN = VOUT,NOM + 0.3 V
IOUT = 1 mA to 200 mA
−40 1400 20 40 60 120100−20 80 −40 1400 20 40 60 120100−20 80
0
0.05
0.1
0.15
0.2
0.25
0.3
−40 −20 0 20 40 60 80 100 120 140
LINEREG, LINE REGULATION (mV/V)
TJ, TEMPERATURE (°C)
Figure 7. Line Regulation vs. Temperature
1000
IGND, GROUND CURRENT (mA)
IOUT
, OUTPUT CURRENT (A)
1u
Figure 8. Ground Current vs. Output Current −
VOUT,nom = 1.2 V
10u 100u 1m 10m 100m 1
100
10
TJ = 25°C
TJ =−40°C
TJ = 125°C
NCP110
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TYPICAL CHARACTERISTICS
160
VDROP
, DROPOUT VOLTAGE (mV)
IOUT
, OUTPUT CURRENT (mA)
0
Figure 9. Dropout Voltage vs. Output Current −
VOUT
,nom = 1.2 V − CSP4 Package
40 80 180120 160 200
140
120
100
80
60
40
20
0
20 60 100 140
TJ = 25°C
TJ =−40°C
TJ = 125°C
160
VDROP
, DROPOUT VOLTAGE (mV)
TJ, TEMPERATURE (°C)
0
Figure 10. Dropout Voltage vs. Temperature −
VOUT
,nom = 1.05 V − CSP4 Package
40 80 120
140
120
100
80
60
40
20
0
20 60 100 140−20−40
180
200
IOUT = 200 mA
IOUT = 10 mA
IOUT = 100 mA
160
VDROP
, DROPOUT VOLTAGE (mV)
TJ, TEMPERATURE (°C)
Figure 11. Dropout Voltage vs. Temperature −
VOUT
,nom = 1.2 V − CSP4 Package
140
120
100
80
60
40
20
0
IOUT = 200 mA
IOUT = 10 mA
IOUT = 100 mA
0 40 80 12020 60 100 140−20−40
VDROP
, DROPOUT VOLTAGE (mV)
TJ, TEMPERATURE (°C)
Figure 12. Dropout Voltage vs. Temperature −
VOUT
,nom = 1.8 V − CSP4 Package
100
80
60
40
20
0
0 40 80 12020 60 100 140−20−40
IOUT = 200 mA
IOUT = 10 mA
IOUT = 100 mA
ICL, CURRENT LIMIT, ISC, SHORT
CIRCUIT CURRENT (mA)
TJ, TEMPERATURE (°C)
Figure 13. Short−circuit Current vs.
Temperature
400
0 40 80 12020 60 100 140−20−40
390
380
370
360
350
340
330
320
310
300
ICL
ISC
VIN = 1.5 V
VOUT,NOM = 1.2 V
CIN = COUT = 1 mF
ICL: VOUT = 90% VOUT,NOM
ISC: VOUT = 0 V (SHORT)
VEN,TH,ON, VEN,TH,OFF
, ENABLE
THRESHOLD VOLTAGE (mV)
TJ, TEMPERATURE (°C)
Figure 14. Enable thresholds voltage vs.
Temperature
600
0 40 80 12020 60 100 140−20−40
OFF −> ON
ON −> OFF
500
400
300
200
100
0
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IEN, ENABLE PIN CURRENT (mA)
TJ, TEMPERATURE (°C)
Figure 15. Enable Pin Current vs. Temperature
0.3
0 40 80 12020 60 100 140−20−40
0.25
0.2
0.15
0.1
0.05
0
VEN = 1 V
IDIS, DISABLE CURRENT (nA)
TJ, TEMPERATURE (°C)
Figure 16. Disable Current vs. Temperature
160
0 40 80 12020 60 100 140−20−40
VEN = 0 V
140
120
100
80
60
40
20
0
RDIS, DISCHARGE RESISTIVITY (W)
TJ, TEMPERATURE (°C)
Figure 17. Discharge Resistivity vs.
Temperature
300
0 40 80 12020 60 100 140−20−40
290
280
270
260
250
240
230
220
210
200
VIN = 1.5 V
VOUT,nom = 1.2 V
ESR, EQUIVALENT SERIES
RESISTANCE (W)
IOUT
, OUTPUT CURRENT (mA)
Figure 18. Maximum COUT ESR Value vs.
Output Current
100
0 40 80 12020 60 100 140
VOUT,nom = 1.2 V
COUT = 1 mF
Unstable Region
Stable Region
10
1
0.1
0.01
160 180 200
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IOUT
(mA)
RMS Output Noise (mV)
10 Hz – 100 kHz 100 Hz – 100 kHz
2 10.01 8.79
20 8.78 7.39
200 8.77 7.44
IOUT = 2 mA
IOUT = 20 mA
IOUT = 200 mA
SPECTRAL NOISE DENSITY
(mV/√Hz)
f, FREQUENCY (Hz)
Figure 19. Output Voltage Spectral Noise
Density vs. Frequency
10
10
1
0.1
0.01
0.001
100 1k 10k 100k 1M
VIN = 1.5 V
VOUT,nom = 1.2 V
CIN = COUT = 1 mF
IOUT
(mA)
RMS Output Noise (mV)
10 Hz – 100 kHz 100 Hz – 100 kHz
IOUT = 2 mA
IOUT = 20 mA
IOUT = 200 mA
SPECTRAL NOISE DENSITY
(mV/√Hz)
f, FREQUENCY (Hz)
Figure 20. Output Voltage Spectral Noise
Density vs. Frequency
10
1
0.1
0.01
0.001
VIN = 1.35 V
VOUT,nom = 1.05 V
CIN = COUT = 1 mF
2
20
200
10.01
8.78
8.77
8.79
7.39
7.44
10 100 1k 10k 100k 1M
IOUT
(mA)
RMS Output Noise (mV)
10 Hz – 100 kHz 100 Hz – 100 kHz
IOUT = 2 mA
IOUT = 20 mA
IOUT = 200 mA
SPECTRAL NOISE DENSITY
(mV/√Hz)
f, FREQUENCY (Hz)
Figure 21. Output Voltage Spectral Noise
Density vs. Frequency
10
1
0.1
0.01
0.001
VIN = 2.1 V
VOUT,nom = 1.8 V
CIN = COUT = 1 mF
2
20
200
9.88
9.01
9.08
8.71
7.73
7.70
10 100 1k 10k 100k 1M
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TYPICAL CHARACTERISTICS
PSRR, POWER SUPPLY REJECTION
RATIO (dB)
f, FREQUENCY (Hz)
Figure 22. PSRR vs. Frequency
10
120
100 1k 10k 100k 1M 10M
100
80
60
40
20
0
IOUT = 2 mA
IOUT = 20 mA
IOUT = 200 mA
VIN = 1.35 V + 100 mVpp
VOUT,nom = 1.05 V
COUT = 1 mF
PSRR, POWER SUPPLY REJECTION
RATIO (dB)
f, FREQUENCY (Hz)
Figure 23. PSRR vs. Frequency
120
100
80
60
40
20
0
IOUT = 2 mA
IOUT = 20 mA
IOUT = 200 mA
VIN = 1.5 V + 100 mVpp
VOUT,nom = 1.2 V
COUT = 1 mF
10 100 1k 10k 100k 1M 10M
PSRR, POWER SUPPLY REJECTION
RATIO (dB)
f, FREQUENCY (Hz)
Figure 24. PSRR vs. Frequency
120
100
80
60
40
20
0
IOUT = 2 mA
IOUT = 20 mA
IOUT = 200 mA
VIN = 2.1 V + 100 mVpp
VOUT,nom = 1.8 V
COUT = 1 mF
10 100 1k 10k 100k 1M 10M
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TYPICAL CHARACTERISTICS
VEN
IIN
VOUT
VIN = 1.5 V
VOUT,nom = 1.2 V
IOUT = 10 mA
CIN = 1 mF
COUT = 4.7 mF
Figure 25. Enable Turn−on Response,
COUT = 1 mF, IOUT = 10 mA
VEN
IIN
VOUT
VIN = 1.5 V
VOUT,nom = 1.2 V
IOUT = 10 mA
CIN = COUT = 1 mF
Figure 26. Enable Turn−on Response,
COUT = 4.7 mF, IOUT = 10 mA
1 V/div100 mA/div400 mV/div
1 V/div100 mA/div400 mV/div
20 ms/div 20 ms/div
VIN = 1.5 V
VOUT,nom = 1.2 V
IOUT = 200 mA
CIN = COUT = 1 mF
VEN
IIN
VOUT
Figure 27. Enable Turn−on Response,
COUT = 1 mF, I OUT = 200 mA
Figure 28. Enable Turn−on Response,
COUT = 4.7 mF, IOUT = 200 mA
VEN
IIN
VOUT
VIN = 1.5 V
VOUT,nom = 1.2 V
IOUT = 200 mA
CIN = 1 mF
COUT = 4.7 mF
1 V/div100 mA/div400 mV/div
1 V/div100 mA/div400 mV/div
20 ms/div 20 ms/div
VOUT
VIN
1.5 V
2.5 V
tRISE = 1 ms
tFALL = 1 ms
VOUT,nom = 1.2 V
IOUT = 10 mA
COUT = 1 mF
Figure 29. Line Transient Response,
IOUT = 10 mA Figure 30. Line Transient Response,
IOUT = 200 mA
VIN tRISE = 1 ms
VOUT,nom = 1.2 V
IOUT = 200 mA
COUT = 1 mF
VOUT
1.5 V
2.5 V tFALL = 1 ms
500 mV/div10 mV/div
500 mV/div10 mV/div
4 ms/div 4 ms/div
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TYPICAL CHARACTERISTICS
VOUT
IOUT
tRISE = 1 ms
1 mA
200 mA
VIN = 1.5 V
VOUT,nom = 1.2 V
COUT = 1 mF
COUT = 4.7 mF
Figure 31. Load Transient Response,
IOUT = 1 mA to 200 mA
Figure 32. Load Transient Response,
IOUT = 1 mA to 200 mA
VOUT
IOUT tFALL = 1 ms
1 mA
200 mA
VIN = 1.5 V
VOUT,nom = 1.2 V
COUT = 1 mF
COUT = 4.7 mF
20 mV/div100 mA/div
100 mA/div 20 mV/div
1 ms/div 10 ms/div
tRISE = 500 ns
tRISE = 1 ms
200 mA
IOUT
1 mA
VOUT
VIN = 1.5 V
VOUT,nom = 1.2 V
COUT = 1 mF
Figure 33. Load Transient Response,
IOUT = 1 mA to 200 mA Figure 34. Load Transient Response,
IOUT = 1 mA to 200 mA
tRISE = 500 ns
tRISE = 1 ms
200 mA
IOUT
1 mA
VIN = 1.5 V
VOUT,nom = 1.2 V
COUT = 1 mF
VOUT
20 mV/div100 mA/div
20 mV/div100 mA/div
1 ms/div 4 ms/div
Figure 35. Overheating Protection − TSD
IOUT
VOUT
VIN = 5.5 V
VOUT,nom = 1.2 V
IOUT = 200 mA
CIN = 1 mF
COUT = 1 mF
Figure 36. Turn On/Off, Slow Rising VIN
VIN
VOUT
VIN = 0 V to 1.5 V
VOUT,nom = 1.2 V
IOUT = 10 mA
CIN = COUT = 1 mF
1.5 V
0 V
400 mV/div50 mA/div
400 mV/div
100 ms/div 2 ms/div
NCP110
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APPLICATIONS INFORMATION
General
The NCP110 is an ultra−low input voltage, ultra−low
noise 200 mA low dropout regulator designed to meet the
requirements of low voltage RF applications and high
performance analog circuits. The NCP110 device provides
very high PSRR and excellent dynamic response. In
connection with low quiescent current this device is well
suitable for battery powered application such as cell phones,
tablets and other. The NCP110 is fully protected in case of
current overload, output short circuit and overheating.
Input Capacitor Selection (CIN)
Input capacitor connected as close as possible is necessary
for ensure device stability. The X7R or X5R capacitor
should be used for reliable performance over temperature
range. The value of the input capacitor should be 1 mF or
greater to ensure the best dynamic performance. This
capacitor will provide a low impedance path for unwanted
AC signals or noise modulated onto constant input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitors for their low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during sudden load current changes.
Output decoupling
The NCP110 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
recommended capacitor value is 1mF and X7R or X5R
dielectric due to its low capacitance variations over the
specified temperature range. The NCP110 is designed to
remain stable with minimum effective capacitance of 0.6mF
to account for changes with temperature, DC bias and
package size. Especially for small package size capacitors
such as 0201 the effective capacitance drops rapidly with the
applied DC bias. Please refer to Figure 38.
Figure 38. Capacity vs DC Bias Voltage
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the COUT but the
maximum value of ESR should be less than 1.6 W. Larger
output capacitors and lower ESR could improve the load
transient response or high frequency PSRR. It is not
recommended to use tantalum capacitors on the output due
to their large ESR. The equivalent series resistance of
tantalum capacitors is also strongly dependent on the
temperature, increasing at low temperature.
Enable Operation
The NCP110 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function. If
the EN pin voltage is <0.2 V the device is guaranteed to be
disabled. The pass transistor is turned−off so that there is
virtually no current flow between the IN and OUT. The
active discharge transistor is active so that the output voltage
VOUT is pulled to GND through a 280 W resistor. In the
disable state the device consumes as low as typ. 10 nA from
the VIN. If the EN pin voltage >0.7 V the device is
guaranteed to be enabled. The NCP110 regulates the output
voltage and the active discharge transistor is turned−off. The
EN pin has internal pull−down current source with typ. value
of 200 nA which assures that the device is turned−off when
the EN pin is not connected. In the case where the EN
function isn’t required the EN should be tied directly to IN.
Output Current Limit
Output Current is internally limited within the IC to a
typical 350 mA. The NCP110 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to 360 mA (typ). The current limit and
short circuit protection will work properly over whole
temperature range and also input voltage range. There is no
limitation for the short circuit duration.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold (TSD − 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU − 140°C
typical). Once the IC temperature falls below the 140°C the
LDO is enabled again. The thermal shutdown feature
provides the protection from a catastrophic device failure
due to accidental overheating. This protection is not
intended to be used as a substitute for proper heat sinking.
Power Dissipation
As power dissipated in the NCP110 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
NCP110
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rise for the part. The maximum power dissipation the
NCP110 can handle is given by:
PD(MAX) +ƪ125oC*TAƫ
qJA
(eq. 1)
The power dissipated by the NCP110 for given
application conditions can be calculated from the following
equations:
PD[VIN @IGND )IOUTǒVIN *VOUTǓ(eq. 2)
0.40
0.60
0.80
1.00
1.20
1.40
1.60
80
90
100
110
120
130
140
0 100 200 300 400 500 600 700
Figure 39. qJA and PD (MAX) vs. Copper Area (CSP4)
PCB COPPER AREA (mm2)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, 2 oz Cu
qJA, 1 oz Cu
PD(MAX), TA = 25°C, 1 oz Cu
PD(MAX), TA = 25°C, 2 oz Cu
0.4
0.45
0.5
0.55
0.6
0.65
0.7
170
180
190
200
210
220
230
0 100 200 300 400 500 600 700
Figure 40. qJA and PD (MAX) vs. Copper Area (XDFN4)
PCB COPPER AREA (mm2)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, 1 oz Cu
qJA, 2 oz Cu
PD(MAX), TA = 25°C, 1 oz Cu
PD(MAX), TA = 25°C, 2 oz Cu
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ORDERING INFORMATION
Device
Nominal
Output
Voltage Marking Rotation Description Package Shipping
†
NCP110AFCT060T2G 0.60 V C 0°
200 mA, Active Discharge
WLCSP4
CASE 567VS
(Pb-Free)
5000 /
Tape &
Reel
NCP110AFCT080T2G 0.80 V J 0°
NCP110AFCT085T2G 0.85 V 2 0°
NCP110AFCT100T2G 1.00 V T 0°
NCP110AFCT105T2G 1.05 V A 0°
NCP110AFCT110T2G 1.10 V G 0°
NCP110AFCT120T2G 1.20 V F 0°
NCP110AFCT180T2G 1.80 V D 0°
NCP110AFCT280T2G 2.80 V E 0°
ORDERING INFORMATION
Device Nominal Output Voltage Marking Description Package Shipping
NCP110AMX060TBG 0.60 V FC
200 mA, Active Discharge
XDFN4
CASE 711AJ
(Pb-Free)
3000 /
Tape &
Reel
NCP110AMX075TBG 0.75 V F3
NCP110AMX080TBG 0.80 V FJ
NCP110AMX085TBG 0.85 V F2
NCP110AMX100TBG 1.00 V FG
NCP110AMX105TBG 1.05 V FA
NCP110AMX110TBG 1.10 V FH
NCP110AMX120TBG 1.20 V FF
NCP110AMX180TBG 1.80 V FD
NCP110AMX280TBG 2.80 V FE
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
È
È
WLCSP4, 0.64x0.64x0.33
CASE 567VS
ISSUE O
DATE 25 JAN 2018
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
DIM
A
MIN NOM
−−−
MILLIMETERS
A1
D
E
b0.180 0.200
e0.35 BSC
−−−
E
D
AB
PIN A1
REFERENCE
e
A0.03 BC
0.05 C
4X b
12
B
A
0.05 C
A
A1
A2
C
0.04 0.06
SCALE 4:1
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 3
e
A2 0.23 REF
PITCH 0.20
4X
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.35
0.35
RECOMMENDED
A1 PACKAGE
OUTLINE
PITCH
MAX
0.610 0.640
0.610 0.640
0.220
0.33
0.08
0.670
0.670
X = Specific Device Code
M = Month
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
GENERIC
MARKING DIAGRAM*
XM
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98AON82946G
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
WLCSP4, 0.64X0.64X0.33
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
XDFN4 1.0x1.0, 0.65P
CASE 711AJ
ISSUE A
DATE 13 NOV 2015
SCALE 4:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
ÉÉ
ÉÉ
A
B
E
D
D2
BOTTOM VIEW
b
e
4X
NOTE 3
2X 0.05 C
PIN ONE
REFERENCE
TOP VIEW
2X 0.05 C
A
A1
(A3)
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
L
4X
12
1
DIM MIN MAX
MILLIMETERS
A0.33 0.43
A1 0.00 0.05
A3 0.10 REF
b0.15 0.25
D1.00 BSC
D2 0.43 0.53
E1.00 BSC
e0.65 BSC
L0.20 0.30
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MOUNTING FOOTPRINT*
1.20
0.26
0.24 4X
DIMENSIONS: MILLIMETERS
0.39
RECOMMENDED
GENERIC
MARKING DIAGRAM*
XX = Specific Device Code
M = Date Code
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
XX M
1
PACKAGE
OUTLINE
NOTE 4
e/2
D2
45 5
A
M
0.05 BC
43
0.65
PITCH
DETAIL A
4X
b2 0.02 0.12
L2 0.07 0.17
4X
0.52
2X
0.11
4X
L24X
DETAIL A
b24X
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98AON67179E
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
XDFN4, 1.0X1.0, 0.65P
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
www.onsemi.com
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
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literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800−282−9855 Toll Free USA/Canada
Phone: 011 421 33 790 2910
LITERATURE FULFILLMENT:
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