TC74HC4060AP/AF
2014-03-01
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TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC4060AP, TC74HC4060AF
14-Stage Binary Counter/Oscillator
The TC74HC4060A is a high speed CMOS 14-STAGE BINARY
COUNTER fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
The oscillator configuration allows designs using either RC or
crystal oscillator circuits, or an external clock may be used.
The clear input resets the counter to a low level on all outputs
and disables the oscillator.
A high CLR accomplishes this reset function.
A negative transition on the clock input ( ϕI) increments the
counter Ten levels of divided output are provided; 4 stage thru 10
stage and 12 stage thru 14 stage. At the last stage (Q14), a
1/16384 divided frequency is obtained.
The ϕI input and CLR input are equipped with protection
circuits against static discharge or transient excess voltage.
Features
• High speed: fmax = 58 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
• Balanced propagation delays: tpLH ∼
−
tpHL
• Wide operating voltage range: VCC (opr) = 2 to 6 V
• Oscillator configuration: RC or crystal oscillator
• Pin and function compatible with 4060B
Pin Assignment
TC74HC4060AP
TC74HC4060AF
Weight
DIP16-P-300-2.54A : 1.00 g (typ.)
SOP16-P-300-1.27A : 0.18 g (typ.)
Start of commercial production
1987-11
TC74HC4060AP/AF
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IEC Logic Symbol
Truth Table
Inputs
Iφ CLR
Function
X H
Counter is reset to zero state.
φO output goes to high level.
Oφ output goes to low level.
L Count up one step.
L No Change
System Diagram
TC74HC4060AP/AF
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Absolute Maximum Ratings (Note 1)
Characteristics Symbol Rating Unit
Supply voltage range VCC −0.5 to 7 V
DC input voltage VIN −0.5 to VCC + 0.5 V
DC output voltage VOUT −0.5 to VCC + 0.5 V
Input diode current IIK ±20 mA
Output diode current IOK ±20 mA
DC output current IOUT ±25 mA
DC VCC/ground current ICC ±50 mA
Power dissipation PD 500 (DIP) (Note 2)/180 (SOP) mW
Storage temperature Tstg −65 to 150 °C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C shall be
applied until 300 mW.
Operating Range (Note)
Characteristics Symbol Rating Unit
Supply voltage VCC 2 to 6 V
Input voltage VIN 0 to VCC V
Output voltage VOUT 0 to VCC V
Operating temperature Topr −40 to 85 °C
Input rise and fall time tr, tf
0 to 1000 (VCC = 2.0 V)
0 to 500 (VCC = 4.5 V)
0 to 400 (VCC = 6.0 V)
ns
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
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Electrical Characteristics
DC Characteristics
Test Condition Ta = 25°C Ta =
−40 to 85°C
Characteristics Symbol
VCC (V) Min Typ. Max Min Max
Unit
High-level input
voltage VIH ⎯
2.0
4.5
6.0
1.50
3.15
4.20
⎯
⎯
⎯
⎯
⎯
⎯
1.50
3.15
4.20
⎯
⎯
⎯
V
Low-level input
voltage VIL ⎯
2.0
4.5
6.0
⎯
⎯
⎯
⎯
⎯
⎯
0.50
1.35
1.80
⎯
⎯
⎯
0.50
1.35
1.80
V
IOH = −20 μA
2.0
4.5
6.0
1.9
4.4
5.9
2.0
4.5
6.0
⎯
⎯
⎯
1.9
4.4
5.9
⎯
⎯
⎯
High-level output
voltage
(Qn)
VOH VIN
= VIH or VIL
IOH = −4 mA
IOH = −5.2 mA
4.5
6.0
4.18
5.68
4.31
5.80
⎯
⎯
4.13
5.63
⎯
⎯
V
High-level output
voltage
(φO, Oφ)
VOH VIN
= VIH or VIL IOH = −20 μA
2.0
4.5
6.0
1.8
4.0
5.5
2.0
4.5
5.9
⎯
⎯
⎯
1.8
4.0
5.5
⎯
⎯
⎯
V
IOL = 20 μA
2.0
4.5
6.0
⎯
⎯
⎯
0.0
0.0
0.0
0.1
0.1
0.1
⎯
⎯
⎯
0.1
0.1
0.1
Low-level output
voltage
(Qn)
VOL VIN
= VIH or VIL
IOL = 4 mA
IOL = 5.2 mA
4.5
6.0
⎯
⎯
0.17
0.18
0.26
0.26
⎯
⎯
0.33
0.33
V
Low-level output
voltage
(φO, Oφ)
VOL VIN
= VIH or VIL IOL = 20 μA
2.0
4.5
6.0
⎯
⎯
⎯
0.0
0.0
0.1
0.2
0.5
0.5
⎯
⎯
⎯
0.2
0.5
0.5
V
Input leakage
current IIN VIN = VCC or GND 6.0 ⎯ ⎯ ±0.1 ⎯ ±1.0 μA
Quiescent supply
current ICC VIN = VCC or GND 6.0 ⎯ ⎯ 4.0 ⎯ 40.0 μA
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Timing Requirements (input: tr = tf = 6 ns)
Test Condition Ta = 25°C
Ta =
−40 to
85°C
Characteristics Symbol
V
CC (V) Typ. Limit Limit
Unit
Minimum pulse width
(Iφ)
tW (L)
tW (H)
⎯
2.0
4.5
6.0
⎯
⎯
⎯
75
15
13
95
19
16
ns
Minimum pulse time
(CLR)
tW (H) ⎯
2.0
4.5
6.0
⎯
⎯
⎯
75
15
13
95
19
16
ns
Minimum removal time trem ⎯
2.0
4.5
6.0
⎯
⎯
⎯
100
20
17
125
25
21
ns
Clock frequency f ⎯
2.0
4.5
6.0
⎯
⎯
⎯
6
30
35
5
24
28
MHz
AC Characteristics (CL = 15 pF, VCC = 5 V, Ta = 25°C, input: tr = tf = 6 ns)
Characteristics Symbol Test Condition Min Typ. Max Unit
Output transition time
tTLH
tTHL ⎯ ⎯ 4 8 ns
Propagation delay time
(Iφ-Q4)
tpLH
tpHL
⎯ ⎯ 36 53 ns
Propagation delay time difference
(Qn-Qn + 1) Δtpd CL = 15 pF (Qn, Qn + 1) ⎯ 6 14 ns
Propagation delay time
(CLR)
tpHL ⎯ ⎯ 19 34 ns
Maximum clock frequency fmax ⎯ 33 58 ⎯ MHz
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AC Characteristics (CL = 50 pF, input: tr = tf = 6 ns)
Test Condition Ta = 25°C Ta =
−40 to 85°C
Characteristics Symbol
VCC (V) Min Typ. Max Min Max
Unit
Output transition time
tTLH
tTHL ⎯
2.0
4.5
6.0
⎯
⎯
⎯
30
8
7
75
15
13
⎯
⎯
⎯
95
19
16
ns
Propagation delay
time
(Iφ-Q4)
tpLH
tpHL
⎯
2.0
4.5
6.0
⎯
⎯
⎯
170
41
30
300
60
51
⎯
⎯
⎯
375
75
64
ns
Propagation delay
time difference
(Qn-Qn + 1)
Δtpd CL = 50 pF (Qn, Qn + 1)
2.0
4.5
6.0
⎯
⎯
⎯
32
7
5
75
15
13
⎯
⎯
⎯
95
19
16
ns
Propagation delay
time
(CLR)
tpHL ⎯
2.0
4.5
6.0
⎯
⎯
⎯
85
23
17
195
39
33
⎯
⎯
⎯
245
49
42
ns
Maximum clock
frequency fmax ⎯
2.0
4.5
6.0
6
30
35
12
50
65
⎯
⎯
⎯
5
24
28
⎯
⎯
⎯
MHz
Input capacitance CIN ⎯ ⎯ 5 10 ⎯ 10 pF
Power dissipation
capacitance CPD (Note) ⎯ 27 ⎯ ⎯ ⎯ pF
Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD･VCC･fIN + ICC
When CR or Crystal oscillation circuit is adopted, the dynamic power dissipation will be greater than the
above calculation, because these oscillation circuits spend much supply current.
TC74HC4060AP/AF
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Switching Characteristics Test Waveform
Typical Clock Drive Circuits
External Clock Drive Typical RC Circuit Typical Crystal Circuit
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Package Dimensions
Weight: 1.00 g (typ.)
TC74HC4060AP/AF
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Package Dimensions
Weight: 0.18 g (typ.)
TC74HC4060AP/AF
2014-03-01
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