2015 Microchip Technology Inc. DS50002394A
EVB-LAN9354
Evaluation Board
Users Guide
DS50002394A-page 2 2015 Microchip Technology Inc.
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© 2015, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 978-1-63277-588-7
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Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
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There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
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Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
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Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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YSTEM
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== ISO/TS16949==
2015 Microchip Technology Inc. DS50002394A-page 3
EVB-LAN9354 Evaluation Board Users Guide
Object of Declaration: EVB-LAN9354
2015 Microchip Technology Inc. DS50002394A-page 4
EVB-LAN9354 Evaluation Board Users Guide
NOTES:
EVB-LAN9354
EVALUATION BOARD
USERS GUIDE
2015 Microchip Technology Inc. DS50002394A-page 5
Table of Contents
Preface ........................................................................................................................... 7
Introduction............................................................................................................ 7
Document Layout .................................................................................................. 7
Conventions Used in this Guide ............................................................................ 8
The Microchip Web Site ........................................................................................ 9
Development Systems Customer Change Notification Service ............................ 9
Customer Support ................................................................................................. 9
Document Revision History ................................................................................. 10
Chapter 1. Overview
1.1 Introduction ................................................................................................... 11
1.1.1 References ................................................................................................ 12
1.1.2 Terms and Abbreviations .......................................................................... 12
Chapter 2. Board Details
2.1 Board Details ................................................................................................ 14
2.1.1 Power ........................................................................................................ 14
2.1.2 Power-on Reset ......................................................................................... 15
2.1.3 Clock .......................................................................................................... 15
Chapter 3. Board Configuration
3.1 Strap Options ............................................................................................... 16
3.1.1 Jumpers J4:J15 ......................................................................................... 16
3.1.1.1 GPIO/LED POL/LED Configurations ......................................... 17
3.1.1.2 Serial Management Mode Configuration ................................... 18
3.1.1.3 EEPROM Size Configuration ..................................................... 18
3.1.1.4 Energy-Efficient Ethernet Configuration .................................... 18
3.1.1.5 1588 Enable Configuration ........................................................ 19
3.1.1.6 PHY Address Configuration ....................................................... 19
3.1.2 GPIO 6 & GPIO 7 Input and Output Configurations .................................. 19
3.1.3 Link Partner Duplex/Speed Configurations ............................................... 19
3.1.4 P0 Configurations ...................................................................................... 20
3.1.5 RMII RX Clock Configurations ................................................................... 20
3.1.6 GPIO Header ............................................................................................. 21
3.1.7 I2C Aardvark Header ................................................................................. 21
3.1.8 Copper and Fiber Mode Selections ........................................................... 21
3.1.8.1 Copper Mode ............................................................................. 23
3.1.8.2 Fiber Mode ................................................................................ 22
3.1.8.3 FX-LOS Fiber Mode Strap ......................................................... 23
3.2 LEDs ............................................................................................................. 23
3.3 Test Points ................................................................................................... 23
3.4 Mechanicals ................................................................................................. 24
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 6 2015 Microchip Technology Inc.
Appendix A. EVB-LAN9354 Evaluation Board
A.1 Introduction .................................................................................................. 25
Appendix B. EVB-LAN9354 Evaluation Board Schematics
B.1 Introduction .................................................................................................. 26
Appendix C. Bill of Materials (BOM)
C.1 Introduction .................................................................................................. 34
Wordwide Sales and Service ......................................................................................38
EVB-LAN9354
EVALUATION BOARD
USERS GUIDE
2015 Microchip Technology Inc. DS50002394A-page 7
Preface
INTRODUCTION
This chapter contains general information that will be useful to know before using the
EVB-LAN9354. Items discussed in this chapter include:
Document Layout
Conventions Used in this Guide
The Microchip Web Site
Development Systems Customer Change Notification Service
Customer Support
Document Revision History
DOCUMENT LAYOUT
This document describes how to use the EVB-LAN9354 Evaluation Board as a
development tool for the LAN9354 three-port 10/100 managed Ethernet switch. The
manual layout is as follows:
Chapter 1. “Overview” – Shows a brief description of the EVB-LAN9354 Evalua-
tion Board.
Chapter 2. “Getting Started” – Includes instructions on how to get started with
the EVB-LAN9354 Evaluation Board.
Chapter 3. “Board Configuration” – Provides information about the
EVB-LAN9354 Evaluation Board battery charging features.
Appendix A. “EVB-LAN9354 Evaluation Board” – This appendix shows the
EVB-LAN9354 Evaluation Board.
Appendix B. “EVB-LAN9354 Evaluation Board Schematics” – This appendix
shows the EVB-LAN9354 Evaluation Board schematics.
Appendix C. “Bill of Materials (BOM)” – This appendix includes the
EVB-LAN9354 Evaluation Board Bill of Materials (BOM).
NOTICE TO CUSTOMERS
All documentation becomes dated, and this manual is no exception. Microchip tools and
documentation are constantly evolving to meet customer needs, so some actual dialogs
and/or tool descriptions may differ from those in this document. Please refer to our web site
(www.microchip.com) to obtain the latest documentation available.
Documents are identified with a “DS” number. This number is located on the bottom of each
page, in front of the page number. The numbering convention for the DS number is
“DSXXXXXA”, where “XXXXX” is the document number and “A” is the revision level of the
document.
For the most up-to-date information on development tools, see the MPLAB® IDE online help.
Select the Help menu, and then Topics to open a list of available online help files.
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 8 2015 Microchip Technology Inc.
CONVENTIONS USED IN THIS GUIDE
This manual uses the following documentation conventions:
DOCUMENTATION CONVENTIONS
Description Represents Examples
Arial font:
Italic characters Referenced books MPLAB® IDE User’s Guide
Emphasized text ...is the only compiler...
Initial caps A window the Output window
A dialog the Settings dialog
A menu selection select Enable Programmer
Quotes A field name in a window or
dialog
“Save project before build”
Underlined, italic text with
right angle bracket
A menu path File>Save
Bold characters A dialog button Click OK
A tab Click the Power tab
N‘Rnnnn A number in verilog format,
where N is the total number of
digits, R is the radix and n is a
digit.
4‘b0010, 2‘hF1
Text in angle brackets < > A key on the keyboard Press <Enter>, <F1>
Courier New font:
Plain Courier New Sample source code #define START
Filenames autoexec.bat
File paths c:\mcc18\h
Keywords _asm, _endasm, static
Command-line options -Opa+, -Opa-
Bit values 0, 1
Constants 0xFF, ‘A’
Italic Courier New A variable argument file.o, where file can be
any valid filename
Square brackets [ ] Optional arguments mcc18 [options] file
[options]
Curly brackets and pipe
character: { | }
Choice of mutually exclusive
arguments; an OR selection
errorlevel {0|1}
Ellipses... Replaces repeated text var_name [,
var_name...]
Represents code supplied by
user
void main (void)
{ ...
}
Preface
2015 Microchip Technology Inc. DS50002394A-page 9
THE MICROCHIP WEB SITE
Microchip provides online support via our web site at www.microchip.com. This web
site is used as a means to make files and information easily available to customers.
Accessible by using your favorite Internet browser, the web site contains the following
information:
Product Support – Data sheets and errata, application notes and sample
programs, design resources, user’s guides and hardware support documents,
latest software releases and archived software
General Technical Support – Frequently Asked Questions (FAQs), technical
support requests, online discussion groups, Microchip consultant program
member listing
Business of Microchip – Product selector and ordering guides, latest Microchip
press releases, listing of seminars and events, listings of Microchip sales offices,
distributors and factory representatives
DEVELOPMENT SYSTEMS CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip’s customer notification service helps keep customers current on Microchip
products. Subscribers will receive e-mail notification whenever there are changes,
updates, revisions or errata related to a specified product family or development tool of
interest.
To register, access the Microchip web site at www.microchip.com, click on Customer
Change Notification and follow the registration instructions.
The Development Systems product group categories are:
Compilers – The latest information on Microchip C compilers, assemblers, linkers
and other language tools. These include all MPLAB C compilers; all MPLAB
assemblers (including MPASM assembler); all MPLAB linkers (including MPLINK
object linker); and all MPLAB librarians (including MPLIB object librarian).
Emulators – The latest information on Microchip in-circuit emulators.This
includes the MPLAB REAL ICE and MPLAB ICE 2000 in-circuit emulators.
In-Circuit Debuggers – The latest information on the Microchip in-circuit
debuggers. This includes MPLAB ICD 3 in-circuit debuggers and PICkit 3 debug
express.
MPLAB IDE – The latest information on Microchip MPLAB IDE, the Windows
Integrated Development Environment for development systems tools. This list is
focused on the MPLAB IDE, MPLAB IDE Project Manager, MPLAB Editor and
MPLAB SIM simulator, as well as general editing and debugging features.
Programmers – The latest information on Microchip programmers. These include
production programmers such as MPLAB REAL ICE in-circuit emulator, MPLAB
ICD 3 in-circuit debugger and MPLAB PM3 device programmers. Also included
are nonproduction development programmers such as PICSTART Plus and
PIC-kit 2 and 3.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 10 2015 Microchip Technology Inc.
Customers should contact their distributor, representative or field application engineer
(FAE) for support. Local sales offices are also available to help customers. A listing of
sales offices and locations is included in the back of this document.
Technical support is available through the web site at:
http://www.microchip.com/support
DOCUMENT REVISION HISTORY
Revision A (July 2015)
Initial Release of this Document.
EVB-LAN9354
EVALUATION BOARD
USERS GUIDE
2015 Microchip Technology Inc. DS50002394A-page 11
Chapter 1. Overview
1.1 INTRODUCTION
The LAN9354 is a fully featured, three-port 10/100 managed Ethernet switch designed
for industrial and embedded applications where performance, flexibility, ease of inte-
gration and system cost control are required.
The LAN9354 combines all the functions of a 10/100 switch system, including the
switch fabric, packet buffers, buffer manager, media access controllers (MACs), PHY
transceivers, and serial management. IEEE 1588v2 is supported via the integrated
IEEE 1588v2 hard-ware time stamp unit, which supports end-to-end and peer-to-peer
transparent clocks.
The LAN9354 complies with the IEEE 802.3 (full/half-duplex 10BASE-T and
100BASE-TX) Ethernet protocol, IEEE 802.3az Energy Efficient Ethernet (EEE)
(100Mbps only), and 802.1D/802.1Q management protocol specifications, enabling
compatibility with industry standard Ethernet and Fast Ethernet applications.
100BASE-FX is supported via an external fiber transceiver and cable diagnostics
(short, open and length) is included on the internal twisted pair copper interface.
The EVB-LAN9354 is an Evaluation Board (EVB) that utilizes the LAN9354 to provide
a fully-functional three-port Ethernet switch with Single RMII. The EVB-LAN9354 pro-
vides two fully integrated MAC/PHY internet ports (Ports 1 & 2) via on-board RJ45 con-
nectors. Port 0 provides two MII port connectors which support the following:
An external RMII-Capable MAC (with LAN9354 in PHY mode), via the on-board
40-pin male MII connector
An external RMII-Capable PHY (with LAN9354 in MAC mode), via the on-board
40-pin female MII connector
Power is supplied to the board via a +5V external wall mount power supply.
The EVB-LAN9354 includes a 64K x 8 I2C EEPROM that may be used to automatically
load configuration settings from the EEPROM into the device at reset. An I2C host
adapter interface header (10-pin, 2x5) is provided to simplify I2C based configuration.
A simplified block diagram of the EVB-LAN9354 can be seen in Figure 1-1.
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 12 2015 Microchip Technology Inc.
FIGURE 1-1: EVB-LAN9354 BLOCK DIAGRAM
1.1.1 References
Concepts and material available in the following documents may be helpful when read-
ing this document. Visit www.microchip.com for the latest documentation.
Document Location
LAN9354 datasheet Visit www.microchip.com
AN8-13 Suggested Mag-
netics
http://www.microchip.com/wwwAp-
pNotes/AppNotes.aspx?appnote=en562793
EVB-LAN9354 Evalua-
tion Board Schematic
Visit www.microchip.com
Microchip
LAN9354
Straps
Jumpers
I2C EEPROM
Mode
Switch
Crystal
Reset
Power Supply
Module
Port 2
Port 0
10/100
Ethernet
Magnetics &
RJ45
Fiber
Transceiver
(SFP)
40 pin MII
Connector
(Female)
40 pin MII
Connector
(Male)
RMII
5V
To External
PHY
To External
MAC
Ethernet
Fiber
Transceiver
(SFP)
10/100
Ethernet
Magnetics &
RJ45
Ethernet
Port 1
2015 Microchip Technology Inc. DS50002394A-page 13
1.1.2 Terms and Abbreviations
EVB - Evaluation Board
DNP - Do Not Populate
100BASE-TX - 100 Mbps Fast Ethernet, IEEE802.3u Compliant
GPIO - General Purpose I/O
MII - Media Independent Interface
RMII - Reduced Media Independent Interface
EEE - Energy-Efficient Ethernet
SFP - Small Form-factor Pluggable
SFF - Small Form Factor
SMI - Serial Management Interface
EVB-LAN9354
EVALUATION BOARD
USERS GUIDE
2015 Microchip Technology Inc. DS50002394A-page 14
Chapter 2. Board Details
2.1 BOARD DETAILS
The following sections describe the various board features, including jumpers, LEDs,
test points, system connections, and switches. A top view of the EVB-LAN9354 is
shown in Figure 2-1.
FIGURE 2-1: LAN9354 BOARD REV-A
2.1.1 Power
DC 5V is applied through (J1) DC Socket, powered by a +5V external wall adapter
switch (SW1) need to be ON position for the 5V to reach the 3.3V regulator. Glowing of
Green LED (D1) indicates successful generation of 3.3V o/p. This Power is supplied to
the LAN9354 and it has internal 1.2 V regulator which supplies power to the internal
core logic.
Port 1
(with integrated
magnetics & LEDs)
Port 2
(with integrated
magnetics & LEDs)
Port 0 (Female)
MII Connector
Port 0 (Male)
MII Connector
Microchip
LAN9354
Stra
p
EEPROM
Reset
Power
Mode Switch
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 15 2015 Microchip Technology Inc.
2.1.2 Power-on Reset
A power-on reset occurs whenever power is initially applied to the LAN9354 or if the
power is removed and reapplied to the LAN9354. This event resets all circuitry within
the LAN9354. After initial power-on, the LAN9354 can be reset by pressing the reset
switch (SW2). The reset LED D2 will assert (red) when the LAN9354 is in reset condi-
tion.
For stability, a delay of approximately 180ms is added from the +3.3V o/p to reset
release.
2.1.3 Clock
The LAN9354 requires a fixed-frequency 25 MHz clock (±50 ppm) source for use by
the internal clock oscillator and PLL. This is typically provided by attaching a 25 MHz
crystal to the OSCI and OSCO pins. Optionally, this clock can be provided by driving
the OSCI input pin with a single-ended 25 MHz clock source.
EVB-LAN9354
EVALUATION BOARD
USERS GUIDE
2015 Microchip Technology Inc. DS50002394A-page 16
Chapter 3. Board Configuration
3.1 STRAP OPTIONS
The following tables describe the default settings and jumper descriptions for the
EVB-LAN9354. These defaults are the recommended configurations for evaluation of
the LAN9354. These settings may be changed as needed, however, any deviation from
the defaults settings should be approached with care and knowledge of the schematics
and datasheet. An incorrect jumper setting may disable the board.
3.1.1 Jumpers J4:J15
Jumpers J4 through J15 set various functions of the LAN9354. They can also be used
as GPIOs, LED drivers. When used as LED drivers, as they are on the EVB-LAN9354,
they are connected a specific way to set the strap value to a “1”, and another way to
set the strap value to a “0”. Figure 3-1 illustrates the schematics connections with the
D3 circuit as a pull-up, and the D4 circuit as a pull-down. To illuminate D3, the LAN9354
will drive the cathode of the D3 low. To illuminate D4, the LAN9354 will drive the cath-
ode of the D4 high.
The J4 - J15 jumpers must be configured in pairs to identical settings in order to realize
the D3 circuit or the D4 circuit. The pairings are as follows:
-J4 & J7
-J6 & J9
-J5 & J8
- J11 & J14
- J10 & J13
- J12 & J15
The following subsections detail the jumper pair settings, their associated strap set-
tings, and the functional effects of setting the straps. All strap values are read during
power-up and on the rising edge of nRST signal. Once the strap value is set, the
LAN9354 will drive the LED’s high or low for illumination according the strap value. For
other designs which may use these pins as GPIOs refer to LAN9354 datasheet for
additional information. In those cases, internal default straps must be changed by an
I2C or SMI master or through EEPROM fields.
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 17 2015 Microchip Technology Inc.
FIGURE 3-1: LED STRAP CIRCUIT
3.1.1.1 GPIO/LED POL/LED CONFIGURATIONS:
GPIO/LED POL/LED configuration straps are used to configure the default polarity of
LEDs, GPIOs through jumpers as shown below in Table 3-1.
TABLE 3-1: GPIO/LED POL/LED CONFIGURATIONS
Header Pin Settings Signal Name Strap Value Description
J4 & J7 1-2(default) LEDPOL0
/GPIO0
/LED0
1 The LED (D3) is
set as active
LOW.
2 -3 0 The LED (D3) is
set as active
HIGH.
J5 & J8 1-2(default) LEDPOL1
/GPIO1
/LED1
1 The LED (D4) is
set as active
LOW.
2 -3 0 The LED (D4) is
set as active
HIGH.
J6 & J9 1-2(default) LEDPOL2
/GPIO2
/LED2
1 The LED (D5) is
set as active
LOW.
2 -3 0 The LED (D5) is
set as active
HIGH.
J10 & J13 1-2(default) LEDPOL3
/GPIO3
/LED3
1 The LED (D6) is
set as active
LOW.
2 -3 0 The LED (D6) is
set as active
HIGH.
2015 Microchip Technology Inc. DS50002394A-page 18
3.1.1.2 SERIAL MANAGEMENT MODE CONFIGURATION
Serial Management Mode selection strap is used to configure the default value of the
Serial Management Mode Strap hard-strap (serial_mngt_mode_strap) through jump-
ers as shown below in Table 3-2.
3.1.1.3 EEPROM SIZE CONFIGURATION:
The EEPROM size configuration strap (J6 & J9) determines the supported EEPROM
size range. A low selects 1Kbits (128 x 8) through 16Kbits (2K x 8)_24C16. A high
selects 32Kbits (4K x 8) through 512Kbits (64K x 8) or 4Mbits (512K x 8)_24C512 as
shown below in Table 3-3.
3.1.1.4 ENERGY-EFFICIENT ETHERNET CONFIGURATION
EEE_EN configuration strap is used to configure the default value of the EEE Enable
2-1 soft-straps (EEE_enable_strap_[2:1]) through jumpers as shown below in
Tab le 3 - 4.
J11 & J14 1-2(default) LEDPOL4
/GPIO4
/LED4
1 The LED (D7) is
set as active
LOW.
2 -3 0 The LED (D7) is
set as active
HIGH.
J12 & J15 1-2(default) LEDPOL5
/GPIO5
/LED5
1 The LED (D8) is
set as active
LOW.
2 -3 0 The LED (D8) is
set as active
HIGH.
TABLE 3-2: SERIAL MANAGEMENT MODE CONFIGURATION
Header Pin Settings serial_mngt_mode_
strap Description
J4 & J7 2-3 0 SMI Managed Mode
J4 & J7 1-2 (default) 1 I2C Managed Mode
TABLE 3-3: EEPROM SIZE CONFIGURATION
Header Pin Settings eeprom_size_strap
Value Description
J6 & J9 1-2 (default) 1 EEPROM size = 32K
bits (4k x 8) through
512K bits (64K x 8)
2 -3 0 EEPROM size = 1K
bits (128 x 8) through
16K bits (2K x 8)
TABLE 3-4: EEE_EN CONFIGURATION
Header Pin Settings EEE_enable_strap_[
2:1] Value Description
J10 & J13 1-2(default) 1 EEE Enable
2 -3 0 EEE Disable
TABLE 3-1: GPIO/LED POL/LED CONFIGURATIONS (CONTINUED)
Header Pin Settings Signal Name Strap Value Description
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 19 2015 Microchip Technology Inc.
3.1.1.5 1588 ENABLE CONFIGURATION
Energy Efficient Ethernet configuration strap is used to configure the default value of
the 1588 Enable soft-strap (1588_enable_strap) through jumpers as shown below in
Tab le 3 - 5.
3.1.1.6 PHY ADDRESS CONFIGURATION
PHY Address selection strap is used to configure the default value of the Switch PHY
Address Select soft-strap (phy_addr_sel_strap) through jumpers as shown below in
Tab le 3 - 6.
3.1.2 GPIO 6 & GPIO 7 Input and Output Configurations
GPIO 6 & 7 configuration straps are used to configure the default input value of the
GPIO 6 and 7 through jumpers as shown below in Table 3-7 and Table 3-8.
3.1.3 Link Partner Duplex/Speed Configurations
The “duplex_strap_0” strap is used to determine the link partners duplex ability when
in Port 0 RMII MAC mode through jumpers (J22) as shown below in Table 3-9.
TABLE 3-5: 1588 ENABLE CONFIGURATION
Header Pin Settings 1588_enable_strap
Value Description
J11 & J14 1-2 (default) 1 1588 Enable
2 -3 0 1588 Disable
TABLE 3-6: PHY ADDRESSING
Header Pin
Settings
PHY_ADDR_SEL
_STRAP Value
VIRTUAL
PHY 0 AND 1
DEFAULT
ADDRESS
VALUE
PHY A
DEFAULT
ADDRESS
VALUE
PHY B
DEFAULT
ADDRESS
VALUE
J12 & J15 1-2 1 1 2 3
2-3 (default) 0 0 1 2
TABLE 3-7: GPIO 6 & 7 INPUT CONFIGURATION
Header Pin Settings Input Signal Name
J16 1-2 1 GPIO6
2-3 0
J17 1-2 1 GPIO7
2-3 0
TABLE 3-8: GPIO 6 & 7 OUTPUT CONFIGURATION
Header Pin Output Signal Name
J16 2 Push Pull GPIO6
J17 2 Push Pull GPIO7
Note: By default, the jumpers settings for J16 & J17 will be OPEN.
2015 Microchip Technology Inc. DS50002394A-page 20
The “speed_strap_0” strap is used to determine the link partners speed ability and to
determine the parallel detect speed when in Port 0 RMII MAC mode through jumpers
(J23) as shown below in Table 3-9.
3.1.4 Port 0 Mode Configurations
Port 0 Mode configuration straps from switches (SW3, SW4 & SW5) are used to con-
figure the hard-straps such as Switch Port 0 Mode Strap (P0_mode_strap[1:0]), Switch
Port 0 RMII Clock Direction Strap (P0_rmii_clock_dir_strap) and Switch Port 0 Clock
Strength Strap (P0_clock_strength_strap) as shown in Table 3-10.
3.1.5 RMII RX Clock Configurations
When LAN9354 is in MAC/PHY mode the reference clock routed either through TX or
RX Clock as shown in Table 3-11 for Port 0.
TABLE 3-9: EMULATED LINK PARTNER DEFAULT ADVERTISED ABILITY
FOR PORT 0
J28
(P0_DUPLEX) J23 (P0_SPEED) duplex_strap_0 speed_strap_0
ADVERTISED
LINK PARTNER
ABILITY
1-2 2-3 1 0 10BASE-T
full-duplex
(0010)
1-2 1-2 1 1 100BASE-X
full-duplex
(1000)
2-3 2-3 0 0 10BASE-T
half-duplex
(0001)
2-3 1-2 0 1 100BASE-X
half-duplex
(0100)
Note: By default, the jumpers settings for J22 & J23 will be OPEN.
TABLE 3-10: PORT 0 MODE STRAP MAPPING
P0_MODE2 (SW5) P0_MODE1 (SW4) P0_MODE0 (SW3) MODE
1-3 1-3 X RMII MAC clock in
1-3 1-2 1-3 RMII MAC clock out
12ma
1-3 1-2 1-2 RMII MAC clock out
16ma (Default)
1-2 1-3 X RMII PHY clock in
1-2 1-2 1-3 RMII PHY clock out
12ma
1-2 1-2 1-2 RMII PHY clock out
16ma
Note: For Switches to short 1-3, Knob Position should be at 1-2 and vice versa.
TABLE 3-11: RX CLOCK CONFIGURATIONS FOR PORT 0
Switch Settings DESCRIPTION Mode
SW6 (1-3) (Default) TX Clock used as a Refer-
ence Clock
RMII MAC
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 21 2015 Microchip Technology Inc.
3.1.6 GPIO Header
J18 connector is used for GPIO header. Respective pin details are given below in
Table 3-12.
3.1.7 I2C Aardvark® Header
J21 connector is used for I2C Aardvark header. Respective pin details are given below
in Table 3-13.
3.1.8 Copper and Fiber Mode Selections
The LAN9354 supports 100BASE-TX (Copper) and 100BASE-FX (Fiber) modes. In
100BASE-FX operation, the presence of the receive signal is indicated by the external
transceiver as either an open-drain, CMOS level, Loss of Signal (SFP) or a LVPECL
Signal Detect (SFF).
This EVB supports 100BASE-TX (Copper) and 100BASE-FX (Fiber) in SFP mode. By
default Copper Mode is active. Fiber Mode is supported as an assembly option. To
select the Copper or Fiber Mode, the respective strap and signal routing resister
assembly options must to be configured.
SW6 (1-2) RX Clock used as a Refer-
ence Clock
RMII MAC
SW7 (1-3) (Default) Reference clock used as a TX
clock
RMII PHY
SW7 (1-2) Reference clock used as a RX
clock
RMII PHY
TABLE 3-11: RX CLOCK CONFIGURATIONS FOR PORT 0
Switch Settings DESCRIPTION Mode
Note: For Switches to short 1-3, Knob Position should be at 1-2 and vice versa.
TABLE 3-12: PIN NAMES FOR GPIO HEADER
Signal Name Pin Number
GPIO0 J18.1
GPIO1 J18.2
GPIO2 J18.3
GPIO3 J18.4
GPIO4 J18.5
GPIO5 J18.6
GPIO6 J18.7
GPIO7 J18.8
TABLE 3-13: PIN NAMES FOR I2C AARDVARK HEADER
Signal Name Pin Number
I2C2_SCL J21.1
I2C2_SDA J21.3
GND J21.2 & J21.10
Note: Vendor part number for SFP Transceiver: Finisar/FTLF1217P2.
2015 Microchip Technology Inc. DS50002394A-page 22
3.1.8.1 COPPER MODE
The EVB-LAN9354 is set to Copper Mode by default. Table 3-14 details the required
strap resistors settings for Copper Mode operation.
Additionally, the signal routing resistors detailed in Table 3-15 must be assembled for
Copper Mode operation.
3.1.8.2 FIBER MODE
The LAN9354 supports SFP type 100BASE-FX mode. To enable Fiber Mode, the
respective strap and signal routing resisters must be configured.
Table 3-16 details the required strap resistor settings for Fiber Mode operation.
Additionally, the signal routing resistors detailed in Table 3-17 must be assembled for
Fiber Mode operation.
TABLE 3-14: COPPER MODE STRAP RESISTORS
Resistors Signal Names Description
R79 (10K) FXLOSEN Copper twisted pair for ports A and B further determined
by FXSDENA and FXSDENB
R76, R80 (10K) FXSDA/FXSDB Configures Port 0 and Port 1 to Copper Mode
Note: R75, R77, and R78 must not be populated (DNP).
TABLE 3-15: COPPER MODE SIGNAL ROUTING RESISTORS
Resistors Description
R17, R19, R21, R23 Port 0 Copper mode is Enabled
R31, R33, R35, R37 Port 1 Copper mode is Enabled
Note: R16, R18, R20, R22, R30, R32, R34, and R36 (0402 package) must not be
populated (DNP).
Note: Copper Mode related resistors must be DNP while Fiber Mode is active
(See Section 3.1.8.1 “Copper Mode”).
TABLE 3-16: FIBER MODE STRAP RESISTORS
Resistors Description
R77 (10K) Configures Port 0 & 1 to FX_LOS Mode
R75, R78 (10K) Configures Port 0 & 1 to Fiber mode, respectively
Note: R76, R79, and R80 must not be populated (DNP).
TABLE 3-17: FIBER MODE SIGNAL ROUTING RESISTORS
Resistors Description
R16, R18, R20, R22 Port 0 Fiber mode Enabled
R30, R32, R34, R36 Port 1 Fiber mode Enabled
Note: R17, R19, R21, R23, R31, R33, R35, and R37 (0402 package) must not be
populated (DNP).
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 23 2015 Microchip Technology Inc.
3.1.8.3 FX-LOS FIBER MODE STRAP
FX-LOS strap details are shown in Table 3-18. These strap settings determine if the
ports are to operate in FX-LOS Fiber Mode or FX-SD/Copper Mode.
3.2 LEDS
Table 3-19 describes the different LED references and their corresponding colors and
indications
3.3 TEST POINTS
Table 3-20 describes the different test points and their corresponding connections.
TABLE 3-18: FX-LOS MODE STRAP SETTINGS
R77 (10K) R79 (10K) Reference
Voltage (v) Function
Populate DNP 3.3 A level above 2V selects FX-LOS for Port 0 and Port 1
Populate Populate 1.5 A level of 1.5V selects FX-LOS for Port 0 and FX-SD /
Copper twisted pair for Port 1, further determined by
FXSDB
DNP Populate 0 (Default) A level of 0V selects FX-SD / Copper twisted pair for
Ports 0 and 1, further determined by FXSDA, FXSDB
Note: The above strap details describe the LAN9354 function. This EVB does not
support SFF Fiber Mode. Therefore, FX-SD related straps are not applica-
ble.
TABLE 3-19: LEDS
Reference Color Indication
D1 Green 3.3V Power active
D2 Red LAN9354 is in reset condition
D4 Green Full-duplex / Collision Port 1
D6 Green Full-duplex / Collision Port 2
Note: Assumes the LED_FUN field of the LED_CFG register is 00b.
TABLE 3-20: TEST POINTS
Test Points Description Connection
TP1 Single pin populated 5V 5V_EXT
TP2 Single pin populated 3V3 3V3
TP3 Single pin unpopulated VDDCR VDDCR
TP4 Single pin unpopulated IRQ IRQ
TP5 Single pin unpopulated P0_MDC P0_MDC
TP6 Single pin unpopulated P0_MDIO P0_MDIO
TP7 Single pin unpopulated P1_MDC P1_MDC
TP8 Single pin unpopulated P1_MDIO P1_MDIO
TP9 Single pin populated GND GND
TP10 Single pin populated GND GND
2015 Microchip Technology Inc. DS50002394A-page 24
3.4 MECHANICALS
Figure 3-2 displays details for EVB-LAN9354 mechanical dimensions. Dimensions are
in mm.
FIGURE 3-2: LAN9354 EVB MECHANICAL DIMENSIONS
2015 Microchip Technology Inc. DS50002394A-page 25
EVB-LAN9354
EVALUATION BOARD
USERS GUIDE
Appendix A. EVB-LAN9354 Evaluation Board
A.1 INTRODUCTION
This appendix shows the EVB-LAN9354 Evaluation Board.
FIGURE A-1: EVB-LAN9354 EVALUATION BOARD
2015 Microchip Technology Inc. DS50002394A-page 26
EVB-LAN9354
EVALUATION BOARD
USERS GUIDE
Appendix B. EVB-LAN9354 Evaluation Board Schematics
B.1 INTRODUCTION
This appendix shows the EVB-LAN9354 Evaluation Board Schematics.
2015 Microchip Technology Inc. DS50002394A-page 34
EVB-LAN9354
EVALUATION BOARD
USERS GUIDE
Appendix C. Bill of Materials (BOM)
C.1 INTRODUCTION
This appendix includes the EVB-LAN9354 Evaluation Board Bill of Materials (BOM).
EVB-LAN9354 Evaluation Board User’s Guide
DS50002394A-page 37 2015 Microchip Technology Inc.
NOTES:
DS50002394A-page 38 2015 Microchip Technology Inc.
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