IRF3808 - International Rectifier

IRF3808

HEXFET® Power MOSFET

Designed specifically for Automotive applications, this Advanced

Planar Stripe HEXFET ® Power MOSFET utilizes the latest process-

ing techniques to achieve extremely low on-resistance per silicon

area. Additional features of this HEXFET power MOSFET are a 175°C

junction operating temperature, low RθJC, fast switching speed and

improved repetitive avalanche rating. This combination makes the

design an extremely efficient and reliable choice for use in higher

power Automotive electronic systems and a wide variety of other

applications.

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 140V

ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 97 VA

IDM Pulsed Drain Current Q550

PD @TC = 25°C Power Dissipation 330 W

Linear Derating Factor 2.2 W/ °C

VGS Gate-to-Source Voltage ± 20 V

EAS Single Pulse Avalanche EnergyR430 mJ

IAR Avalanche CurrentQ82 A

EAR Repetitive Avalanche EnergyWSee Fig.12a, 12b, 15, 16 mJ

dv/dt Peak Diode Recovery dv/dt S5.5 V/ns

TJOperating Junction and -55 to + 175

TSTG Storage Temperature Range

Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C

Mounting Torque, 6-32 or M3 screw 10 lb f•in (1.1N•m)

Absolute Maximum Ratings

Parameter Typ. Max. Units

RθJC Junction-to-Case ––– 0.45

RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W

RθJA Junction-to-Ambient ––– 62

Thermal Resistance

VDSS = 75V

RDS(on) = 0.007 Ω

ID = 140AV

Description

02/06/02

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●Advanced Process Technology

●Ultra Low On-Resistance

●Dynamic dv/dt Rating

●175°C Operating Temperature

●Fast Switching

●Repetitive Avalanche Allowed up to Tjmax

Benefits

Typical Applications

●Integrated Starter Alternator

●42 Volts Automotive Electrical Systems

AUTOMOTIVE MOSFET

PD - 94291B

TO-220AB

HEXFET(R) is a registered trademark of International Rectifier.

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Parameter Min. Typ. Max. Units Conditions

V(BR)DSS Drain-to-Source Breakdown Voltage 75 ––– ––– VV

GS = 0V, ID = 250µA

∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.086 ––– V/°C Reference to 25°C, ID = 1mA

RDS(on) Static Drain-to-Source On-Resistance ––– 5.9 7.0 mΩVGS = 10V, ID = 82A T

VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA

gfs Forward Transconductance 100 ––– ––– SV

DS = 25V, ID = 82A

––– ––– 20 µA VDS = 75V, VGS = 0V

––– ––– 250 VDS = 60V, VGS = 0V, T J = 150°C

Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V

Gate-to-Source Reverse Leakage ––– ––– -200 nA VGS = -20V

QgTotal Gate Charge ––– 150 220 ID = 82A

Qgs Gate-to-Source Charge ––– 31 47 nC VDS = 60V

Qgd Gate-to-Drain ("Miller") Charge ––– 50 76 VGS = 10VT

td(on) Turn-On Delay Time ––– 16 ––– VDD = 38V

trRise Time ––– 140 ––– ID = 82A

td(off) Turn-Off Delay Time ––– 68 ––– RG = 2.5Ω

tfFall Time ––– 120 ––– VGS = 10V T

Between lead,

––– ––– 6mm (0.25in.)

from package

and center of die contact

Ciss Input Capacitance ––– 5310 ––– VGS = 0V

Coss Output Capacitance ––– 890 ––– pF VDS = 25V

Crss Reverse Transfer Capacitance ––– 130 ––– ƒ = 1.0MHz, See Fig. 5

Coss Output Capacitance ––– 6010 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz

Coss Output Capacitance ––– 570 ––– VGS = 0V, VDS = 60V, ƒ = 1.0MHz

Coss eff. Effective Output Capacitance U––– 1140 ––– VGS = 0V, VDS = 0V to 60V

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

LDInternal Drain Inductance

LSInternal Source Inductance ––– –––

IGSS

4.5

7.5

IDSS Drain-to-Source Leakage Current

Q Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11).

R Starting TJ = 25°C, L = 0.130mH

RG = 25Ω, IAS = 82A. (See Figure 12).

SISD ≤ 82A, di/dt ≤ 310A/µs, VDD ≤ V(BR)DSS,

TJ ≤ 175°C

T Pulse width ≤ 400µs; duty cycle ≤ 2%.

Notes:

Parameter Min. Typ. Max. Units Conditions

ISContinuous Source Current MOSFET symbol

(Body Diode) ––– ––– showing the

ISM Pulsed Source Current integral reverse

(Body Diode) Q––– ––– p-n junction diode.

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 82A, VGS = 0VT

trr Reverse Recovery Time ––– 93 140 ns TJ = 25°C, IF = 82A

Qrr Reverse RecoveryCharge ––– 340 510 nC di/dt = 100A/µsT

ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Source-Drain Ratings and Characteristics

140V

550 A

U Coss eff. is a fixed capacitance that gives the same charging time

as Coss while V DS is rising from 0 to 80% VDSS .

VCalculated continuous current based on maximum allowable

junction temperature. Package limitation current is 75A.

WLimited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive

avalanche performance.

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Fig 4. Normalized On-Resistance

Vs. Temperature

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics

100

1000

0.1 1 10 100



20µs PULSE WIDTH

T = 25 C

J°



TOP

BOTTOM

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

V , Drain-to-Source Voltage (V)

I , Drain-to-Source Current (A)

4.5V

100

1000

0.1 1 10 100



20µs PULSE WIDTH

T = 175 C

J°



TOP

BOTTOM

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

V , Drain-to-Source Volta

(

)

I , Drain-to-Source Current (A)

4.5V

-60 -40 -20 020 40 60 80 100 120 140 160 180

0.0

0.5

1.0

1.5

2.0

2.5

3.0

T , Junction Temperature ( C)

R , Drain-to-Source On Resistance

(Normalized)

DS(on)



V =

I =

10V

137A

1.0 3.0 5.0 7.0 9.0 11.0 13.0 15.0

VGS, Gate-to-Source Voltage (V)

10.00

100.00

1000.00

ID, Drain-to-Source Current (Α)

TJ = 25°C

TJ = 175°C

VDS = 15V

20µs PULSE WIDTH

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Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

110 100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

C, Capacitance(pF)

Coss

Crss

Ciss

VGS = 0V, f = 1 MHZ

Ciss = C

gs + Cgd, C

ds SHORTED

Crss

= C

Coss

= C

ds + Cgd

0.0 0.5 1.0 1.5 2.0

VSD, Source-toDrain Voltage (V)

0.10

1.00

10.00

100.00

1000.00

ISD, Reverse Drain Current (A)

TJ = 25°C

TJ = 175°C

VGS = 0V

1 10 100 1000

VDS , Drain-toSource Voltage (V)

100

1000

10000

ID, Drain-to-Source Current (A)

Tc = 25°C

Tj = 175°C

Single Pulse

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY RDS(on)

100µsec

040 80 120 160

Q , Total Gate Charge (nC)

V , Gate-to-Source Voltage (V)



I =

D82A



V = 15V

V = 37V

V = 60V

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Fig 9. Maximum Drain Current Vs.

Case Temperature

VDS

90%

10%

VGS t

d(on)

d(off)

VDS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

VGS

RGD.U.T.

10V

VDD

Fig 10a. Switching Time Test Circuit

Fig 10b. Switching Time Waveforms

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

25 50 75 100 125 150 175

100

120

140

T , Case Temperature

(

)

I , Drain Current (A)



LIMITED BY PACKAGE

0.001

0.01

0.1

0.00001 0.0001 0.001 0.01 0.1 1



Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

1 2

JDM thJC C



t , Rectangular Pulse Duration (sec)

Thermal Response (Z )

thJC

0.01

0.02

0.05

0.10

0.20

D = 0.50



SINGLE PULSE

(THERMAL RESPONSE)

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QGS QGD

Charge

D.U.T. V

3mA

.3µF

50KΩ

.2µF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

10 V

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

0.01

Ω

D.U.T

VDS

-V

DRIVER

15V

20V

Fig 14. Threshold Voltage Vs. Temperature

-75 -50 -25 025 50 75 100 125 150 175 200

TJ , Temperature ( °C )

1.0

1.5

2.0

2.5

3.0

3.5

VGS(th) Gate threshold Voltage (V)

ID = 250µA

25 50 75 100 125 150

160

320

480

640

800

Startin

, Junction Temperature

(

)

E , Single Pulse Avalanche Energy (mJ)



TOP

BOTTOM

34A

58A

82A

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Fig 15. Typical Avalanche Current Vs.Pulsewidth

Fig 16. Maximum Avalanche Energy

Vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of Tjmax. This is validated for

every part type.

2. Safe operation in Avalanche is allowed as long asTjmax is

not exceeded.

3. Equation below based on circuit and waveforms shown in

Figures 12a, 12b.

4. PD (ave) = Average power dissipation per single

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. Iav = Allowable avalanche current.

7. ∆T = Allowable rise in junction temperature, not to exceed

Tjmax (assumed as 25°C in Figure 15, 16).

tav = Average time in avalanche.

D = Duty cycle in avalanche = t av ·f

ZthJC(D, tav) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3·BV·Iav) = ∆∆

∆∆

∆T/ ZthJC

Iav = 2∆∆

∆∆

∆T/ [1.3·BV·Zth]

EAS (AR) = PD (ave)·tav

1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

100

1000

Avalanche Current (A)

0.05

Duty Cycle = Single Pulse

0.10

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming ∆Tj = 25°C due to

avalanche losses

0.01

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

100

200

300

400

500

EAR , Avalanche Energy (mJ)

TOP Single Pulse

BOTTOM 10% Duty Cycle

ID = 140A

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Peak Diode Recovery dv/dt Test Circuit

P.W. Period

di/dt

Diode Recovery

dv/dt

Ripple ≤5%

Body Diode Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current Body Diode Forward

Current

=10V

Driver Gate Drive

D.U.T. I

Waveform

D.U.T. V

Waveform

Inductor Curent

D = P.W.

Period

RGVDD

• dv/dt controlled by RG

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T*Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

* Reverse Polarity of D.U.T for P-Channel

VGS

[ ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

[ ] ***

Fig 17. For N-channel HEXFET® power MOSFETs

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Data and specifications subject to change without notice.

This product has been designed and qualified for the Automotive (Q101) market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.02/02

LOT CODE 1789

ASSEMBLED ON WW 19, 1997

IN THE ASSEMB LY LINE "C"

INTERNATIONAL

RECTIFIER

LOGO

ASSEMBLY

LOT CODE

PART NUMBER

DATE C ODE

Y EAR 7 = 1997

WEEK 19

LINE C

EXAMP LE: THI S IS AN IR F 1010

LEAD ASSIG NM ENTS

1 - G A T E

2 - D R A IN

3 - S O URCE

4 - D R A IN

- B -

1.32

(

.052

)

1.22

(

.048

)

3X 0.55

(

.022

)

0.46

(

.018

)

2.92

(

.115

)

2.64

(

.104

)

4.69

(

.185

)

4.20

(

.165

)

3X 0.93

(

.037

)

0.69

(

.027

)

4.06

(

.160

)

3.55

(

.140

)

1.15

(

.045

)

MIN

6.47

(

.255

)

6.10

(

.240

)

3.78

(

.149

)

3.54

(

.139

)

- A -

10.54

(

.415

)

10.29

(

.405

)

2.87

(

.113

)

2.62

(

.103

)

15.24

(

.600

)

14.84

(

.584

)

14.09

(

.555

)

13.47

(

.530

)

3X 1.40

(

.055

)

1.15

(

.045

)

2.54

(

.100

)

0.36

(

.014

)

M B A M

1 2 3

NOTES:

1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFOR MS TO JEDEC OUTLINE TO-220AB.

2 C ONTROLLING DIMENSION : INCH 4 HEATSINK & LE AD MEASUREMENTS DO NOT INCLU DE BURRS.

TO-220AB Par t Mar king Infor mation

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

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Note: For the most current drawings please refer to the IR website at:

http://www.irf.com/package/

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