© Semiconductor Components Industries, LLC, 2016
August, 2020 − Rev. 30
1Publication Order Number:
NCP114/D
Voltage Regulator - CMOS
Low Dropout
300 mA
NCP114
The NCP114 is 300 mA LDO that provides the engineer with a very
stable, accurate voltage with low noise suitable for space constrained,
noise sensitive applications. In order to optimize performance for
battery operated portable applications, the NCP114 employs the
dynamic quiescent current adjustment for very low IQ consumption at
no−load.
Features
•Operating Input Voltage Range: 1.7 V to 5.5 V
•Available in Fixed Voltage Options: 0.75 V to 3.6 V
Contact Factory for Other Voltage Options
•Very Low Quiescent Current of Typ. 50 mA
•Standby Current Consumption: Typ. 0.1 mA
•Low Dropout: 135 mV Typical at 300 mA
•±1% Accuracy at Room Temperature
•High Power Supply Ripple Rejection: 75 dB at 1 kHz
•Thermal Shutdown and Current Limit Protections
•Stable with a 1 mF Ceramic Output Capacitor
•Available in UDFN and TSOP Packages
•These are Pb−Free Devices
Typical Applicaitons
•PDAs, Mobile phones, GPS, Smartphones
•Wireless Handsets, Wireless LAN, Bluetooth®, Zigbee®
•Portable Medical Equipment
•Other Battery Powered Applications
Figure 1. Typical Application Schematic
NCP114
IN
EN
OUT
GND
OFF
ON
VOUT
COUT
1 mF
Ceramic
CIN
VIN
MARKING
DIAGRAMS
See detailed ordering, marking and shipping information on
page 15 of this data sheet.
ORDERING INFORMATION
PIN CONNECTIONS
XX = Specific Device Code
M = Date Code
34
12
GND OUT
EN IN
(Bottom View)
UDFN4
MX SUFFIX
CASE 517CU
1
XX M
1
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(Note: Microdot may be in either location)
TSOP−5
SN SUFFIX
CASE 483
OUTIN
GND
N/C
EN
1
2
34
5
(Top View)
1
5
XXXAYWG
G
XXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
G= Pb−Free Package
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IN
OUT
BANDGAP
REFERENCE
ACTIVE
DISCHARGE*
MOSFET
DRIVER WITH
CURRENT LIMIT
THERMAL
SHUTDOWN
ENABLE
LOGIC
GND
AUTO LOW
POWER MODE
EN
EN
Figure 2. Simplified Schematic Block Diagram
*Active output discharge function is present only in NCP114AMXyyyTCG devices.
yyy denotes the particular VOUT option.
PIN FUNCTION DESCRIPTION
Pin No.
(UDFN4)
Pin No.
(TSOP5) Pin Name Description
1 5 OUT Regulated output voltage pin. A small ceramic capacitor with minimum value of 1 mF is need-
ed from this pin to ground to assure stability.
2 2 GND Power supply ground.
3 3 EN Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into
shutdown mode.
4 1 IN Input pin. A small capacitor is needed from this pin to ground to assure stability.
−4 N/C Not connected. This pin can be tied to ground to improve thermal dissipation.
− − EPAD Exposed pad should be connected directly to the GND pin. Soldered to a large ground cop-
per plane allows for effective heat removal.
ABSOLUTE MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage (Note 1) VIN −0.3 V to 6 V V
Output Voltage VOUT −0.3 V to VIN + 0.3 V or 6 V V
Enable Input VEN −0.3 V to 6 V V
Output Short Circuit Duration tSC ∞s
Maximum Junction Temperature TJ(MAX) 150 °C
Storage Temperature TSTG −55 to 150 °C
ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V
ESD Capability, Machine Model (Note 2) ESDMM 200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114,
ESD Machine Model tested per EIA/JESD22−A115,
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS (Note 3)
Rating Symbol Value Unit
Thermal Characteristics, UDFN4 1x1 mm
Thermal Resistance, Junction−to−Air
RqJA 170 °C/W
Thermal Characteristics, TSOP−5
Thermal Resistance, Junction−to−Air
RqJA 236 °C/W
3. Single component mounted on 1 oz, FR 4 PCB with 645 mm2 Cu area.
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ELECTRICAL CHARACTERISTICS
−40°C ≤ TJ ≤ 85°C; VIN = VOUT(NOM) + 1 V for VOUT options greater than 1.5 V. Otherwise VIN = 2.5 V, whichever is greater; IOUT = 1 mA,
CIN = COUT = 1 mF, unless otherwise noted. VEN = 0.9 V. Typical values are at TJ = +25°C. Min./Max. are for TJ = −40°C and TJ = +85°C
respectively (Note 4).
Parameter Test Conditions Symbol Min Typ Max Unit
Operating Input Voltage VIN 1.7 5.5 V
Output Voltage Accuracy −40°C ≤ TJ ≤ 85°C
VOUT ≤ 2.0 V VOUT −40 +40 mV
VOUT > 2.0 V −2 +2 %
Line Regulation VOUT + 0.5 V ≤ VIN ≤ 5.5 V (VIN ≥ 1.7 V) RegLINE 0.01 0.1 %/V
Load Regulation − UDFN package
IOUT = 1 mA to 300 mA RegLOAD
12 30 mV
Load Regulation − TSOP−5 package 28 45
Load Transient IOUT = 1 mA to 300 mA or 300 mA to 1 mA
in 1 ms, COUT = 1 mF
TranLOAD −50/
+30
mV
Dropout Voltage − UDFN package (Note 5) IOUT = 300 mA
VOUT = 1.5 V
VDO
365 460
mV
VOUT = 1.85 V 245 330
VOUT = 2.8 V 155 230
VOUT = 3.0 V 145 220
VOUT = 3.1 V 140 210
VOUT = 3.3 V 135 200
Dropout Voltage − TSOP package (Note 5) IOUT = 300 mA
VOUT = 1.5 V
VDO
380 485
mV
VOUT = 1.85 V 260 355
VOUT = 2.8 V 170 255
VOUT = 3.0 V 160 245
VOUT = 3.1 V 155 235
VOUT = 3.3 V 150 225
Output Current Limit VOUT = 90% VOUT(nom) ICL 300 600 mA
Ground Current IOUT = 0 mA IQ50 95 mA
Shutdown Current VEN ≤ 0.4 V, VIN = 5.5 V IDIS 0.01 1 mA
EN Pin Threshold Voltage
High Threshold
Low Threshold
VEN Voltage increasing
VEN Voltage decreasing
VEN_HI
VEN_LO
0.9
0.4
V
EN Pin Input Current VEN = 5.5 V IEN 0.3 1.0 mA
Power Supply Rejection Ratio VIN = 3.6 V, VOUT = 3.1 V
IOUT = 150 mA
f = 1 kHz PSRR 75 dB
Output Noise Voltage VIN = 2.5 V, VOUT = 1.8 V, IOUT = 150 mA
f = 10 Hz to 100 kHz
VN70 mVrms
Thermal Shutdown Temperature Temperature increasing from TJ = +25°C TSD 160 °C
Thermal Shutdown Hysteresis Temperature falling from TSD TSDH 20 °C
Active Output Discharge Resistance VEN < 0.4 V, Version A only RDIS 100 W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at
TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 1 V.
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TYPICAL CHARACTERISTICS
1.210
VOUT
, OUTPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
−40 9080−30 −20 −10010203040506070
IOUT = 1 mA
IOUT = 300 mA
VIN = 2.5 V
VOUT = 1.2 V
CIN = 1 mF
COUT = 1 mF
Figure 3. Output Voltage vs. Temperature
VOUT = 1.2 V (UDFN)
2.83
VOUT
, OUTPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
−40 9080−30 −20 −10 0 10 20 30 40 50 60 70
Figure 4. Output Voltage vs. Temperature
VOUT = 2.8 V (UDFN)
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
IOUT = 1 mA
IOUT = 300 mA
80
IQ, QUIESCENT CURRENT (mA)
VIN, INPUT VOLTAGE (V)
0.0 0.5
Figure 5. Quiescent Current vs. Input Voltage
70
60
50
40
30
20
10
0
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
25°C
−40°C
85°C
85°C
25°C
−40°C
1000
IGND, GROUND CURRENT (mA)
IOUT
, OUTPUT CURRENT (mA)
0.001
Figure 6. Ground Current vs. Output Current
10000.01 0.1 1 10 100
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
1000
IGND, GROUND CURRENT (mA)
TJ, JUNCTION TEMPERATURE (°C)
−40
Figure 7. Ground Current vs. Temperature
−30 −20 −10 0 10 9080706050403020
IOUT = 300 mA
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
0.1
REGLINE, LINE REGULATION (%/V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 8. Line Regulation vs. Output Current
VOUT = 1.2 V
0.08
0.06
0.04
0.02
0
−0.02
−0.04
−0.06
−0.08
−1
−40 −30 −20 −10 0 10 9080706050403020
VIN = 1.7 V to 5.5 V
VOUT = 1.2 V
IOUT = 1 mA
CIN = 1 mF
COUT = 1 mF
IOUT = 1 mA
1.205
1.200
1.195
1.190
1.185
1.180
1.175
1.170
1.165
1.160
2.82
2.81
2.80
2.79
2.78
2.77
2.76
2.75
2.74
2.73
900
800
700
600
500
400
300
200
100
0
900
800
700
600
500
400
300
200
100
0
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TYPICAL CHARACTERISTICS
0.1
REGLINE, LINE REGULATION (%/V)
TJ, JUNCTION TEMPERATURE (°C)
−40 9080−30 −20 −10 0 10 20 30 40 50 60 70
VIN = 3.8 V to 5.5 V
VOUT = 2.8 V
IOUT = 1 mA
CIN = 1 mF
COUT = 1 mF
Figure 9. Line Regulation vs. Temperature
VOUT = 2.8 V
20
REGLOAD, LOAD REGULATION (mV)
TJ, JUNCTION TEMPERATURE (°C)
−40 9080−30 −20 −10 0 10 20 30 40 50 60 70
Figure 10. Load Regulation vs. Temperature
VOUT = 1.2 V (UDFN)
20
REGLOAD, LOAD REGULATION (mV)
TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Load Regulation vs. Temperature
VOUT = 2.8 V (UDFN)
200
VDROP
, DROPOUT VOLTAGE (mV)
IOUT
, OUTPUT CURRENT (mA)
0
Figure 12. Dropout Voltage vs. Output Current
VOUT = 2.8 V (UDFN)
50 100
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
250
VDROP
, DROPOUT VOLTAGE (mV)
TJ, JUNCTION TEMPERATURE (°C)
−40
Figure 13. Dropout Voltage vs. Output Current
VOUT = 3.45 V (UDFN)
−30 −20 −10 0 10 9080706050403020
IOUT = 0 mA
IOUT = 300 mA
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
Figure 14. Dropout Voltage vs. Temperature
VOUT = 2.8 V (UDFN)
VIN = 2.5 V
VOUT = 1.2 V
IOUT = 1 mA to 300 mA
CIN = 1 mF
COUT = 1 mF
0.08
0.06
0.04
0.02
0
−0.02
−0.04
−0.06
−0.08
−0.1
VIN = 3.8 V
VOUT = 2.8 V
IOUT = 1 mA to 300 mA
CIN = 1 mF
COUT = 1 mF
−40 9080−30 −20 −10010203040506070 250 300
TJ = 85°C
TJ = −40°C
TJ = 25°C
IOUT = 100 mA
18
16
14
12
10
8
6
4
2
0
18
16
14
12
10
8
6
4
2
0
180
160
140
120
100
80
60
40
20
0
225
200
175
150
125
100
75
50
25
0
150 200
VDROP
, DROPOUT VOLTAGE (mV)
IOUT
, OUTPUT CURRENT (mA)
0 50 100
VIN = 4.45 V
VOUT = 3.45 V
CIN = 1 mF
COUT = 1 mF
250 300
TJ = 85°C
TJ = −40°C
TJ = 25°C
180
160
140
120
100
80
60
40
20
0
150 200
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TYPICAL CHARACTERISTICS
800
ISC, SHORT−CIRCUIT CURRENT (mA)
TJ, JUNCTION TEMPERATURE (°C)
−40 9080−30 −20 −10 0 10 20 30 40 50 60 70
VIN = VOUT(nom) + 1 V or 2.5 V
VOUT = 0 V
CIN = 1 mF
COUT = 1 mF
Figure 15. Dropout Voltage vs. Temperature
VOUT = 3.45 V (UDFN)
800
ISC, SHORT−CIRCUIT CURRENT (mA)
VIN, INPUT VOLTAGE (V)
3.0 5.65.43.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2
Figure 16. Current Limit vs. Temperature
1
VEN, VOLTAGE ON ENABLE PIN (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 17. Short−Circuit Current vs.
Temperature
350
IEN, ENABLE CURRENT (nA)
TJ, JUNCTION TEMPERATURE (°C)
Figure 18. Short−Circuit Current vs. Input
Voltage
Figure 19. Enable Voltage Threshold vs.
Temperature
VOUT = 0 V
CIN = 1 mF
COUT = 1 mF
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
−40 9080−30 −20 −10 0 10 20 30 40 50 60 70
VOUT = 2.8 V
VOUT = 1.2 V
750
700
650
600
550
500
450
400
350
300
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
OFF −> ON
ON −> OFF
315
280
245
210
175
140
105
70
35
0
−40 9080−30 −20 −10010203040506070
VEN = 5.5 V
VEN = 0.4 V
VIN = 5.5 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
750
700
650
600
550
500
450
400
350
300
Figure 20. Current to Enable Pin vs.
Temperature
800
ICL, CURRENT LIMIT (mA)
TJ, JUNCTION TEMPERATURE (°C)
−40 −30 −20 −10 0 10 9080706050403020
VIN = VOUT(nom) + 1 V or 2.5 V
VOUT = 90% VOUT(nom)
CIN = 1 mF
COUT = 1 mF
750
700
650
600
550
500
450
400
350
300
VOUT = 2.8 V
VOUT = 1.2 V
VDROP
, DROPOUT VOLTAGE (mV)
TJ, JUNCTION TEMPERATURE (°C)
−40 −30 −20 −10 0 10 9080706050403020
IOUT = 0 mA
IOUT = 300 mA
VIN = 4.45 V
VOUT = 3.45 V
CIN = 1 mF
COUT = 1 mF
IOUT = 100 mA
180
160
140
120
100
80
60
40
20
0
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TYPICAL CHARACTERISTICS
Figure 22. Output Voltage Noise Spectral Density for VOUT = 1.2 V, COUT = 1 mF
FREQUENCY (kHz)
10001010.10.01
10000
Figure 23. Output Voltage Noise Spectral Density for VOUT = 2.8 V, COUT = 1 mF
Figure 24. Output Voltage Noise Spectral Density for VOUT = 2.8 V, COUT = 4.7 mF
OUTPUT VOLTAGE NOISE (nV/rtHz)
VIN = 2.5 V
VOUT = 1.2 V
CIN = 1 mF
COUT = 1 mF
IOUT = 10 mA
1 mA 60.93 59.11
10 mA 52.73 50.63
300 mA 52.06 50.17
10 Hz − 100 kHz 100 Hz − 100 kHz
RMS Output Noise (mV)
IOUT
FREQUENCY (kHz)
10000
OUTPUT VOLTAGE NOISE (nV/rtHz)
FREQUENCY (kHz)
OUTPUT VOLTAGE NOISE (nV/rtHz)
100
10001010.10.01 100
10001010.10.01 100
IOUT = 1 mA
IOUT = 300 mA
1000
100
10
1
1 mA 79.23 74.66
10 mA 75.03 70.37
300 mA 87.74 83.79
10 Hz − 100 kHz 100 Hz − 100 kHz
RMS Output Noise (mV)
IOUT
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
1000
100
10
1
IOUT = 10 mA
IOUT = 1 mA
IOUT = 300 mA
1 mA 80.17 75.29
10 mA 81.28 76.46
300 mA 93.23 89.62
10 Hz − 100 kHz 100 Hz − 100 kHz
RMS Output Noise (mV)
IOUT
IOUT = 10 mA
IOUT = 1 mA
IOUT = 300 mA
10000
1000
100
10
1
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 4.7 mF
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TYPICAL CHARACTERISTICS
100
RR, RIPPLE REJECTION (dB)
FREQUENCY (kHz)
Figure 25. Power Supply Rejection Ratio,
VOUT = 2.8 V, COUT = 1 mF
RR, RIPPLE REJECTION (dB)
FREQUENCY (kHz)
Figure 26. Power Supply Rejection Ratio,
VOUT = 2.8 V, COUT = 4.7 mF
100
ESR (W)
IOUT
, OUTPUT CURRENT (mA)
0
Figure 27. Power Supply Rejection Ratio,
VOUT = 3.45 V, COUT = 1 mF
0.1
IOUT = 1 mA
IOUT = 10 mA
IOUT = 150 mA
IOUT = 300 mA
1 10000100010 100
100
10
1
0.1
0.01
50 100 150 200 250 300
VIN = 5.5 V
CIN = 1 mF
COUT = 1 mF
MLCC, X7R,
1206 size
UNSTABLE OPERATION
STABLE OPERATION
0.1 1 10000100010 100
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
VIN = 3.8 V, VOUT = 2.8 V
CIN = none, COUT = 1 mF
MLCC, X7R,
1206 size
IOUT = 1 mA
IOUT = 10 mA
IOUT = 150 mA
IOUT = 300 mA
VIN = 3.8 V, VOUT = 2.8 V
CIN = none, COUT = 4.7 mF
MLCC, X7R,
1206 size
Figure 28. Output Capacitor ESR vs. Output
Current
100
RR, RIPPLE REJECTION (dB)
FREQUENCY (kHz)
0.1
IOUT = 1 mA
IOUT = 10 mA
IOUT = 150 mA
IOUT = 300 mA
1 10000100010 100
90
80
70
60
50
40
30
20
10
0
VIN = 4.4 V, VOUT = 3.45 V
CIN = none, COUT = 1 mF
MLCC, X7R,
1206 size
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TYPICAL CHARACTERISTICS
Figure 29. Enable Turn−on Response,
COUT = 1 mF, IOUT = 1 mA
Figure 30. Enable Turn−on Response,
COUT = 1 mF, IOUT = 300 mA
VIN = 3.8 V
VOUT = 2.8 V
VEN = 1 V
COUT = 1 mF
CIN = 1 mF
IOUT = 1 mA
500 mV/div1 V/div
200 mA/div
IINRUSH
40 ms/div
VEN
VOUT
VIN = 3.8 V
VOUT = 2.8 V
VEN = 1 V
COUT = 1 mF
CIN = 1 mF
IOUT = 300 mA
200 mA/div
500 mV/div1 V/div
VEN
IINRUSH
VOUT
40 ms/div
Figure 31. Enable Turn−on Response,
COUT = 4.7 mF, IOUT = 1 mA
500 mV/div1 V/div
200 mA/div
IINRUSH
40 ms/div
VEN
VOUT
VIN = 3.8 V
VOUT = 2.8 V
VEN = 1 V
COUT = 1 mF
CIN = 1 mF
IOUT = 1 mA
200 mA/div
500 mV/div1 V/div
VIN = 3.8 V
VOUT = 2.8 V
VEN = 1 V
COUT = 1 mF
CIN = 1 mF
IOUT = 300 mA
Figure 32. Enable Turn−on Response,
COUT = 4.7 mF, IOUT = 300 mA
40 ms/div
IINRUSH
VEN
VOUT
500 mV/div10 mV/div
Figure 33. Line Transient Response − Rising
Edge, VOUT = 2.8 V, IOUT = 1 mA
20 ms/div
tRISE = 1 ms
VIN
VOUT
Figure 34. Line Transient Response − Falling
Edge, VOUT = 2.8 V, IOUT = 1 mA
10 ms/div
500 mV/div10 mV/div
tFALL = 1 ms
VOUT
VIN
VIN = 3.8 V to 4.8 V
VOUT = 2.8 V
COUT = 1 mF
CIN = 1 mF
IOUT = 1 mA
VIN = 4.8 V to 3.8 V
VOUT = 2.8 V
COUT = 1 mF
CIN = 1 mF
IOUT = 1 mA
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TYPICAL CHARACTERISTICS
Figure 35. Line Transient Response − Rising
Edge, VOUT = 2.8 V, IOUT = 300 mA
500 mV/div20 mV/div
4 ms/div
VIN
VOUT
VIN = 3.8 V to 4.8 V
VOUT = 2.8 V
COUT = 10 mF
CIN = 1 mF
IOUT = 300 mA
500 mV/div20 mV/div
Figure 36. Line Transient Response − Falling
Edge, VOUT = 2.8 V, IOUT = 300 mA
4 ms/div
VIN
VOUT
100 mA/div20 mV/div
Figure 37. Load Transient Response − Rising
Edge, VOUT = 1.2 V, IOUT = 1 mA to 300 mA,
COUT = 1 mF, 4.7 mF
4 ms/div
VIN = 2.5 V
VOUT = 1.2 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
tRISE = 1 ms
COUT = 4.7 mF
COUT = 1 mF
IOUT
VOUT
Figure 38. Load Transient Response − Falling
Edge, VOUT = 1.2 V, IOUT = 1 mA to 300 mA,
COUT = 1 mF, 4.7 mF
20 ms/div
20 mV/div
COUT = 4.7 mF
COUT = 1 mF
tFALL = 1 ms
VOUT
20 mV/div
Figure 39. Load Transient Response − Rising
Edge, VOUT = 2.8 V, IOUT = 1 mA to 300 mA,
COUT = 1 mF, 4.7 mF
4 ms/div
COUT = 1 mF
COUT = 4.7 mF
tRISE = 1 ms
VOUT
Figure 40. Load Transient Response − Falling
Edge, VOUT = 2.8 V, IOUT = 1 mA to 300 mA,
COUT = 1 mF, 4.7 mF
10 ms/div
20 mV/div
tFALL = 1 ms
COUT = 4.7 mF
COUT = 1 mF
VOUT
VIN = 4.8 V to 3.8 V
VOUT = 2.8 V
COUT = 1 mF
CIN = 1 mF
IOUT = 300 mA
tRISE = 1 ms
tFALL = 1 ms
VIN = 2.5 V
VOUT = 1.2 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
IOUT
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
100 mA/div
IOUT
IOUT VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
100 mA/div100 mA/div
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TYPICAL CHARACTERISTICS
100 mA/div20 mV/div
Figure 41. Load Transient Response − Rising
Edge, VOUT = 2.8 V, IOUT = 1 mA to 300 mA,
VIN = 3.8 V, 5.5 V
2 ms/div
VIN = 5.5 V
tRISE = 1 ms
IOUT
VOUT
VIN = 3.8 V
Figure 42. Load Transient Response − Falling
Edge, VOUT = 2.8 V, IOUT = 1 mA to 300 mA,
VIN = 3.8 V, 5.5 V
10 ms/div
20 mV/div
tFALL = 1 ms
IOUT
VOUT
1 V/div
Figure 43. Turn−on/off − Slow Rising VIN
4 ms/div
Figure 44. Short−Circuit and Thermal
Shutdown
10 ms/div
VOUT
200 mA/div500 mA/div
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VIN = 5.5 V
VIN = 3.8 V
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
VIN
VIN = 5.5 V
VOUT = 2.8 V
IOUT = 10 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
Overheating
Full Load
IOUT
Thermal Shutdown
TSD Cycling
VIN = 5.5 V
VOUT = 1.2 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
100 mA/div
NCP114
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13
APPLICATIONS INFORMATION
General
The NCP114 is a high performance 300 mA Low Dropout
Linear Regulator. This device delivers very high PSRR
(over 75 dB at 1 kHz) and excellent dynamic performance
as load/line transients. In connection with very low
quiescent current this device is very suitable for various
battery powered applications such as tablets, cellular
phones, wireless and many others. The device is fully
protected in case of output overload, output short circuit
condition and overheating, assuring a very robust design.
Input Capacitor Selection (CIN)
It is recommended to connect at least a 1 mF Ceramic X5R
or X7R capacitor as close as possible to the IN pin of the
device. This capacitor will provide a low impedance path for
unwanted AC signals or noise modulated onto constant
input voltage. There is no requirement for the min. /max.
ESR of the input capacitor but it is recommended to use
ceramic capacitors for their low ESR and ESL. A good input
capacitor will limit the influence of input trace inductance
and source resistance during sudden load current changes.
Larger input capacitor may be necessary if fast and large
load transients are encountered in the application.
Output Decoupling (COUT)
The NCP114 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
recommended capacitor value is 1 mF and X7R or X5R
dielectric due to its low capacitance variations over the
specified temperature range. The NCP114 is designed to
remain stable with minimum effective capacitance of
0.22mF to account for changes with temperature, DC bias
and package size. Especially for small package size
capacitors such as 0402 the effective capacitance drops
rapidly with the applied DC bias.
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the COUT but the
maximum value of ESR should be less than 2 W. Larger
output capacitors and lower ESR could improve the load
transient response or high frequency PSRR. It is not
recommended to use tantalum capacitors on the output due
to their large ESR. The equivalent series resistance of
tantalum capacitors is also strongly dependent on the
temperature, increasing at low temperature.
Enable Operation
The NCP114 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function.
If the EN pin voltage is <0.4 V the device is guaranteed to
be disabled. The pass transistor is turned−off so that there is
virtually no current flow between the IN and OUT. The
active discharge transistor is active so that the output voltage
VOUT is pulled to GND through a 100 W resistor. In the
disable state the device consumes as low as typ. 10 nA from
the VIN.
If the EN pin voltage >0.9 V the device is guaranteed to
be enabled. The NCP114 regulates the output voltage and
the active discharge transistor is turned−off.
The EN pin has internal pull−down current source with
typ. value of 300 nA which assures that the device is
turned−off when the EN pin is not connected. In the case
where the EN function isn’t required the EN should be tied
directly to IN.
Output Current Limit
Output Current is internally limited within the IC to a
typical 600 mA. The NCP114 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to 630 mA (typ). The current limit and
short circuit protection will work properly over whole
temperature range and also input voltage range. There is no
limitation for the short circuit duration.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold (TSD − 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU − 140°C typical).
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.
Power Dissipation
As power dissipated in the NCP114 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part.
The maximum power dissipation the NCP114 can handle
is given by:
PD(MAX) +ƪ85°C*TAƫ
qJA
(eq. 1)
The power dissipated by the NCP114 for given
application conditions can be calculated from the following
equations:
PD[VINǒIGND@IOUTǓ)IOUTǒVIN *VOUTǓ(eq. 2)
NCP114
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14
Figure 45. qJA vs. Copper Area (uDFN4)
140
170
200
230
260
290
0 100 200 300 400 500 600 700
COPPER HEAT SPREADER AREA (mm2)
qJA, JUNCTION−TO−AMBIENT
THERMAL RESISTANCE (°C/W)
PD(MAX), TA = 25°C, 2 oz Cu
PD(MAX), MAXIMUM POWER
DISSIPATION (W)
PD(MAX), TA = 25°C, 1 oz Cu
qJA, 1 oz Cu
qJA, 2 oz Cu
0.5
0.4
0.3
0.2
0.1
0.0
Figure 46. qJA vs. Copper Area (TSOP−5)
0.3
150
200
250
300
350
400
450
0 100 200 300 400 500 600 700
COPPER HEAT SPREADER AREA (mm2)
qJA, JUNCTION−TO−AMBIENT
THERMAL RESISTANCE (°C/W)
PD(MAX), TA = 25°C, 2 oz Cu
PD(MAX), MAXIMUM POWER
DISSIPATION (W)
PD(MAX), TA = 25°C, 1 oz Cu
qJA, 1 oz Cu
qJA, 2 oz Cu
0.25
0.2
0.15
0.1
0.05
0
Reverse Current
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Power Supply Rejection Ratio
The NCP114 features very good Power Supply Rejection
ratio. If desired the PSRR at higher frequencies in the range
100 kHz − 10 MHz can be tuned by the selection of COUT
capacitor and proper PCB layout.
Turn−On Time
The turn−on time is defined as the time period from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT(NOM), COUT and TA.
For example typical value for VOUT = 1.2 V, COUT = 1 mF,
IOUT = 1 mA and TA = 25°C is 90 ms.
PCB Layout Recommendations
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 capacitors. Larger
copper area connected to the pins will also improve the
device thermal resistance. The actual power dissipation can
be calculated from the equation above (Equation 2). Expose
pad should be tied the shortest path to the GND pin.
NCP114
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15
ORDERING INFORMATION
Device
Voltage
Option Marking
Marking
Rotation Option Package Shipping
†
NCP114AMX075TCG 0.75 V AW 0°
With active output
discharge function
UDFN4
(Pb-Free) 3000 / Tape & Reel
NCP114AMX080TCG 0.80 V AT 0°
NCP114AMX090TAG 0.9 V AP 0°
NCP114AMX090TCG 0.9 V AP 0°
NCP114AMX092TAG 0.92 V A2 0°
NCP114AMX100TCG 1.0 V 6 180°
NCP114AMX105TCG 1.05 V R 0°
NCP114AMX110TBG 1.1 V F 180°
NCP114AMX110TCG 1.1 V F 180°
NCP114AMX115TCG 1.15 V AM 0°
NCP114AMX120TBG 1.2 V T 0°
NCP114AMX120TCG 1.2 V T 0°
NCP114AMX125TCG 1.25 V A 180°
NCP114AMX130TCG 1.3 V AA 0°
NCP114AMX135TCG 1.35 V AN 0°
NCP114AMX150TCG 1.5 V V 0°
NCP114AMX160TCG 1.6 V 2 180°
NCP114AMX180TBG 1.8 V J 180°
NCP114AMX180TCG 1.8 V J 180°
NCP114AMX185TCG 1.85 V Y 0°
NCP114AMX210TCG 2.1 V L 180°
NCP114AMX220TCG 2.2 V Q 180°
NCP114AMX240TCG 2.4 V AH 0°
NCP114AMX250TBG 2.5 V AF 0°
NCP114AMX250TCG 2.5 V AF 0°
NCP114AMX260TCG 2.6 V T 180°
NCP114AMX270TCG 2.7 V AJ 0°
NCP114AMX280TBG 2.8 V 2 0°
NCP114AMX280TCG 2.8 V 2 0°
NCP114AMX285TCG 2.85 V 3 0°
NCP114AMX290TCG 2.9 V AZ 0°
NCP114AMX300TCG 3.0 V 4 0°
NCP114AMX310TBG 3.1 V 5 0°
NCP114AMX310TCG 3.1 V 5 0°
NCP114AMX320TCG 3.2 V AG 0°
NCP114AMX330TBG 3.3 V 6 0°
NCP114AMX330TCG 3.3 V 6 0°
NCP114AMX345TCG 3.45 V AC 0°
NCP114AMX350TCG 3.5 V 4 180°
NCP114AMX360TCG 3.6 V AU 0°
NCP114
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16
ORDERING INFORMATION
Device Shipping†
PackageOption
Marking
Rotation
Marking
Voltage
Option
NCP114BMX075TCG 0.75 V CW 0°
Without active output
discharge function
UDFN4
(Pb-Free) 3000 / Tape & Reel
NCP114BMX100TCG 1.0 V 6 270°
NCP114BMX120TCG 1.2 V T 90°
NCP114BMX150TCG 1.5 V V 90°
NCP114BMX180TCG 1.8 V J 270°
NCP114BMX250TCG 2.5 V CF 0°
NCP114BMX280TCG 2.8 V 2 90°
NCP114BMX300TCG 3.0 V 4 90°
NCP114BMX330TCG 3.3 V 6 90°
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ORDERING INFORMATION
Device Voltage Option Marking Option Package Shipping
†
NCP114ASN080T1G 0.8 V CAY
With output active
discharge function TSOP−5
(Pb−Free) 3000 / Tape & Reel
NCP114ASN120T1G 1.2 V CAC
NCP114ASN120T2G
NCP114ASN150T1G 1.5 V CAX
NCP114ASN150T2G
NCP114ASN180T1G 1.8 V CAD
NCP114ASN180T2G
NCP114ASN250T1G 2.5 V CAG
NCP114ASN250T2G
NCP114ASN260T1G 2.6 V CAQ
NCP114ASN270T1G 2.7 V CAV
NCP114ASN280T1G 2.8 V CAH
NCP114ASN280T2G
NCP114ASN290T1G 2.9 V CAU
NCP114ASN300T1G 3.0 V CAK
NCP114ASN330T1G 3.3 V CAL
NCP114ASN330T2G
NCP114BSN330T1G 3.3 V CDL Without output
active discharge
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
TSOP−5
CASE 483
ISSUE N
DATE 12 AUG 2020
SCALE 2:1
1
5
XXX MG
G
GENERIC
MARKING DIAGRAM*
1
5
0.7
0.028
1.0
0.039
ǒmm
inchesǓ
SCALE 10:1
0.95
0.037
2.4
0.094
1.9
0.074
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
XXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
G= Pb−Free Package
1
5
XXXAYWG
G
Discrete/Logic
Analog
(Note: Microdot may be in either location)
XXX = Specific Device Code
M = Date Code
G= Pb−Free Package
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
DIM MIN MAX
MILLIMETERS
A
B
C0.90 1.10
D0.25 0.50
G0.95 BSC
H0.01 0.10
J0.10 0.26
K0.20 0.60
M0 10
S2.50 3.00
123
54 S
A
G
B
D
H
C
J
__
0.20
5X
CAB
T0.10
2X
2X T0.20
NOTE 5
CSEATING
PLANE
0.05
K
M
DETAIL Z
DETAIL Z
TOP VIEW
SIDE VIEW
A
B
END VIEW
1.35 1.65
2.85 3.15
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ARB18753C
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
TSOP−5
© Semiconductor Components Industries, LLC, 2018 www.onsemi.com
ÉÉ
ÉÉ
UDFN4 1.0x1.0, 0.65P
CASE 517CU
ISSUE A
DATE 18 DEC 2014
SCALE 4:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.03 AND 0.07
FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
E
D
D2
BOTTOM VIEW
b
e
4X
NOTE 3
2X 0.05 C
PIN ONE
REFERENCE
TOP VIEW
2X 0.05 C
A
A1
(A3)
0.05 C
0.10 C
CSEATING
PLANE
SIDE VIEW
L
3X
12
1
DIM MIN MAX
MILLIMETERS
A−−− 0.60
A1 0.00 0.05
A3 0.15 REF
b0.20 0.30
D1.00 BSC
D2 0.38 0.58
E1.00 BSC
e0.65 BSC
L0.20 0.30
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MOUNTING FOOTPRINT*
1.30
0.30
0.53 4X
DIMENSIONS: MILLIMETERS
RECOMMENDED
GENERIC
MARKING DIAGRAM*
XX = Specific Device Code
M = Date Code
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
XX M
1
PACKAGE
OUTLINE
NOTE 4
e/2
D2
45 5
43
0.65
PITCH
DETAIL A
L2 0.27 0.37
0.58
2X
L2
DETAIL A
C0.27 x 0.25
1
DETAIL B 0.23
4X
DETAIL B
0.10
3X
A
M
0.10 BC
M
0.05 C
3X C0.18
X 45 5
0.43
3X
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98AON76666F
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
UDFN4, 1.0X1.0, 0.65P
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
www.onsemi.com
1
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ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
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