LTC6702
1
6702fa
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
Tiny Micropower,
Low Voltage
Dual Comparators
The LTC
®
6702 is an extremely small dual comparator
designed to maximize battery life while providing both
speed and low voltage operation in applications where
board space is a premium.
These comparators operate on supplies between 1.7V and
5.5V, and have a maximum guaranteed propagation delay
of 500ns while drawing only 30µA maximum quiescent
current. Internal hysteresis desensitizes the LTC6702 to
input noise and makes it easy to use, even with slow mov-
ing signals. CMOS inputs allow the use of large source
impedances.
The LTC6702 is available in the 8-pin SOT-23 and the tiny
2mm × 2mm DFN package.
Propagation Delay vs Input Overdrive
n Low Supply Operation: 1.7V Minimum
n Low Supply Current: 30μA/Comparator Maximum
n Propagation Delay: 500ns Maximum (–40°C to
125°C)
n 3.2MHz Toggle Frequency
n Input Voltage Range Extends 100mV Below Ground
n Internal Hysteresis: 4mV
n High Output Drive: TTL and CMOS Compatible
Specifi ed at ±15mA (–40°C to 125°C),
Capacitive Load Handling to 10,000pF
n Specifi ed for –40°C to 125°C Temperature Range
n Available in Low Profi le (1mm) ThinSOT™ and
2mm × 2mm DFN Packages
n Battery Powered Systems
n Window Comparators
n Threshold Detectors/Discriminators
n Clock Regeneration
n Automotive Sensing and Controls
Clock Regeneration Circuit
0.1µF
6702 TA01
–
+
–
+
1/2 LTC6702
LT6650
1k
RECOVERED
CLOCK
(UP TO 3.2MHz)
CLOCK INPUT > 100mVP-P
C1
0.1µF
V+ = 3V
VR= 400mV
REFERENCE
IN
OUT
FB
INPUT OVERDRIVE (mV)
0
PROPAGATION DELAY (ns)
400
500
600
30 50 80
6702 TA01b
300
200
100
10 20 40 60 70
FALLING
RISING
V+ = 5V
VSTEP = 100mV
CLOAD = 10pF
TA = 25°C
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
LTC6702
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PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (V+ to GND) ........................................6V
Input Voltage ...............................................................6V
Input Current ........................................................–10mA
Output Short-Circuit Duration (Note 2) ............ Indefi nite
Operating Temperature Range (Note 3)
LTC6702C ...........................................–40°C to 85°C
LTC6702I .............................................–40°C to 85°C
LTC6702H .........................................–40°C to 125°C
(Note 1)
TOP VIEW
OUT A
–IN A
+IN A
GND
V+
OUT B
–IN B
+IN B
DC PACKAGE
8-LEAD (2mm × 2mm) PLASTIC DFN
9
4
1
2
36
5
7
8
A
B
TJMAX = 150°C, θJA = 102°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
OUT A
–IN A
+IN A
GND
V+
OUT B
–IN B
+IN B
TOP VIEW
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
TJMAX = 150°C, θJA = 130°C/W
ORDER INFORMATION
Specifi ed Temperature Range (Note 4)
LTC6702C ............................................... 0°C to 70°C
LTC6702I .............................................–40°C to 85°C
LTC6702H .........................................–40°C to 125°C
Junction Temperature .......................................... 150°C
Storage Temperature Range ...................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)
TSOT Packages ................................................. 300°C
Lead Free Finish
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION
SPECIFIED
TEMPERATURE RANGE
LTC6702CDC#TRMPBF LTC6702CDC#TRPBF LCZJ 8-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C
LTC6702IDC#TRMPBF LTC6702IDC#TRPBF LCZJ 8-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C
LTC6702HDC#TRMPBF LTC6702HDC#TRPBF LCZJ 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C
LTC6702CTS8#TRMPBF LTC6702CTS8#TRPBF LTCZK 8-Lead Plastic TSOT-23 0°C to 70°C
LTC6702ITS8#TRMPBF LTC6702ITS8#TRPBF LTCZK 8-Lead Plastic TSOT-23 –40°C to 85°C
LTC6702HTS8#TRMPBF LTC6702HTS8#TRPBF LTCZK 8-Lead Plastic TSOT-23 –40°C to 125°C
TRM = 500 pieces. *Temperature grades are identifi ed by a label on the shipping container.
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
LTC6702
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ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V+Supply Voltage Guaranteed by PSRR l1.7 5.5 V
I+ Supply Current per Comparator V+ = 3V
l
24 30
40
µA
µA
V+ = 5V
l
25 32
42
µA
µA
VOS Input Offset Voltage (Note 5)
LTC6702C/LTC6702I
LTC6702H
l
l
1 3.5
5
6
mV
mV
mV
VHYST Input Hysteresis Voltage (Note 5)
LTC6702C/LTC6702I
LTC6702H
l
l
2.5
1.6
1.6
4.3 6.2
7.2
8.2
mV
mV
mV
∆VOS /∆T Input Offset Voltage Drift (Note 5) l6µV/°C
IIN Input Leakage Current
LTC6702C/LTC6702I
LTC6702H
l
l
0.001
1
10
nA
nA
nA
CMRR Common Mode Rejection Ratio VCM = –0.1V to VDD – 1.2V
l
58
56
70 dB
dB
Input Voltage Range Guaranteed by CMRR l–0.1 VDD – 1.2 V
PSRR Power Supply Rejection Ratio V+ = 1.7V to 5.5V, VCM = 0.5V
l
56
54
65 dB
dB
VOL Output Swing Low Overdrive = 20mV (Note 6)
ISINK = 100µA
ISINK = 15mA
l
l
10
250
mV
mV
mV
VOH Output Swing High Overdrive = 20mV (Note 6)
ISOURCE = 100µA
ISOURCE = 15mA
l
l
10
350
mV
mV
mV
tPD Propagation Delay (Note 7)
l
320 450
500
ns
ns
∆tPD Differential Propagation Delay Between Channels 4 ns
tSKEW Propagation Delay Skew Between tPDLH/tPDHL 4 ns
trOutput Rise Time 11 ns
tfOutput Fall Time 15 ns
fMAX Maximum Toggle Frequency 3.2 MHz
ISC Short-Circuit Current V+ = 5V ±250 mA
The l denotes the specifi cations which apply over the full specifi ed
temperature range, otherwise specifi cations are at TA = 25°C. V+ = 3V, VCM = 1.5V, COUT = 20pF, unless otherwise noted.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below absolute maximum. This depends on the power supply voltage and
how many comparators are shorted. The θJA specifi ed for the DC and
TS packages is with minimal PCB heat spreading metal. Using expanded
metal area on all layers of a board reduces this value.
Note 3: The LTC6702C and LTC6702I are guaranteed functional over
the temperature range of –40°C to 85°C. The LTC6702H is guaranteed
functional over the operating temperature range of –40°C to 125°C.
Note 4: The LTC6702C is guaranteed to meet specifi ed performance from
0°C to 70°C. The LTC6702C is designed, characterized and expected to
meet specifi ed performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LTC6702I is guaranteed to meet
specifi ed performance from –40°C to 85°C. The LTC6702H is guaranteed
to meet specifi ed performance from –40°C to 125°C.
Note 5: The LTC6702 comparators include internal hysteresis. The offset
voltage is defi ned as the average of the input voltages (trip points)
required to change the output in each direction minus VCM, while the
hysteresis voltage is the difference of these trip points.
Note 6: Output voltage swings are measured between the output and
power supply rails.
Note 7: Propagation delay is for 200mV steps, and 50mV of overdrive.
Overdrive is measured relative to the positive and negative trip points.
LTC6702
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Supply Current
vs Supply Voltage
Supply Current
vs Temperature
Input Leakage Current
vs Input Voltage
Input Offset Current
vs Input Voltage
Input Offset Voltage
vs Supply Voltage Hysteresis vs Supply Voltage
Input Common Mode Limits
vs Temperature
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Toggle Rate
Maximum Toggle Rate
vs Temperature
SUPPLY VOLTAGE (V)
0
0
SUPPLY CURRENT PER COMPARATOR (µA)
10
20
30
40
50
123456
125°C
25°C
–55°C
6702 G01
TEMPERATURE (°C)
–50
20
25
35
25 75
6702 G02
15
10
–25 0 50 100 125
5
0
30
SUPPLY CURRENT PER COMPARATOR (µA)
V+ = 5V
V+ = 1.7V
V+ = 3V
–55°C
INPUT VOLTAGE (V)
–1
–1
INPUT LEAKAGE CURRENT (nA)
0
2
3
4
5
134
1
0256
6702 G03
125°C
85°C
V+ = 3V
25°C
INPUT VOLTAGE (V)
–1
0
INPUT OFFSET CURRENT (pA)
30
40
50
100
70
134
80
90
60
0256
6702 G04
V+ = 3V
10
20
125°C
85°C
25°C
–55°C
TOGGLE RATE (Hz)
10k
200
SUPPLY CURRENT PER COMPARATOR (µA)
250
300
350
400
100k 1M 10M
150
100
50
0
450
6702 G05
V+ = 1.7V
V+ = 3V
V+ = 5V
VSTEP = 200mV
OVERDRIVE = 100mV
TA = 25°C
NO CLOAD
TEMPERATURE (°C)
–50
4
25 75
6702 G06
3
–25 0 50 100 125
2
MAXIMUM TOGGLE RATE (MHz)
V+ = 5V
V+ = 1.7V
V+ = 3V
VSTEP = 200mV
OVERDRIVE = 100mV
CLOAD = 10pF
6702 G07
SUPPLY VOLTAGE (V)
1
INPUT OFFSET VOLTAGE (mV)
1
3
5
5
–1
–3
0
2
4
–2
–4
–5 2346
125°C
–55°C
25°C
SUPPLY VOLTAGE (V)
1
HYSTERESIS (mV)
3
4
5
46
2
1
023 5
6
7
8
6702 G08
125°C
25°C
–55°C
TEMPERATURE (°C)
–50
INPUT COMMON MODE LIMITS (V)
V+–1.0
V+–0.5
V+
25 75
V+–1.5
GND
–25 0 50 100 125
–0.5
–1.0
6702 G09
LTC6702
5
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TYPICAL PERFORMANCE CHARACTERISTICS
Propagation Delay
vs Supply Voltage
Propagation Delay
vs Load Capacitance
Output Rise and Fall
Times vs Load Capacitance
Output Low Voltage
vs Load Current
Output High Voltage
vs Load Current Output Voltage vs Temperature
Propagation Delay Propagation Delay with Load 1MHz Sinusoid Response
SUPPLY VOLTAGE (V)
1
PROPAGATION DELAY (ns)
340
360
380
46
320
300
280 23 5
400
420
6702 G10
FALLING
FALLING
RISING
RISING
VSTEP = 100mV
CLOAD = 10pF
25°C, 125°
–55°C
LOAD CAPACITANCE (pF)
10
200
PROPAGATION DELAY (ns)
600
700
800
100 1000 10000
6702 011
500
400
300
V+ = 1.7V
FALLING
RISING
VSTEP = 100mV
OVERDRIVE = 50mV
TA = 25°C
FALLING
RISING
V+ = 3V, 5V
LOAD CAPACITANCE (pF)
10
1
TIME (ns)
10
100
1000
100 1000 10000
6702 G12
VSTEP = 100mV
OVERDRIVE = 50mV
TA = 25°C
tf
tr
tf
tr
tf
tr
V+ = 1.7V
V+ = 3V
V+ = 5V
SINK CURRENT (mA)
0.1
0.001
OUTPUT VOLTAGE (V)
0.01
0.1
1.0
1 10 100
6702 G13
V+ = 3V
V+ = 1.7V
V+ = 5V
TA = 25°C
SOURCE CURRENT (mA)
0.1
0.001
OUTPUT VOLTAGE (V+-VOUT) (V)
0.01
0.1
1.0
1 10 100
6702 G14
V+ = 3V
V+ = 1.7V
V+ = 5V
TA = 25°C
TEMPERATURE (°C)
–50
0
OUTPUT VOLTAGE (mV)
10
30
40
50
50
90
20
0
–25 75 100
25 125
60
70
80
6702 G15
LOW
LOW
HIGH
HIGH
HIGH = V+ – VOUT
IOUT = ±4mA
V+ = 1.7V
V+ = 5V
100ns/DIV
VOUT
1V/DIV
GND
VIN
50mV/DIV
6702 G16
V+= 3V
CL= 20pF
VCM = 500mV
100ns/DIV
VOUT
1V/DIV
GND
VIN
50mV/DIV
6702 G17
V+= 3V
CL= 20pF
VCM = 500mV
RL = 10k, 200Ω
200Ω
10k
200ns/DIV
VOUT
1V/DIV
GND
VIN
50mV/DIV
6702 G18
V+= 3V
CL= 20pF
VCM = 500mV
LTC6702
6
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PIN FUNCTIONS
OUT A (Pin 1): Output of Comparator A.
–IN A (Pin 2): Inverting Input of Comparator A.
+IN A (Pin 3): Noninverting Input of Comparator A.
GND (Pin 4): Ground.
+IN B (Pin 5): Noninverting Input of Comparator B.
–IN B (Pin 6): Inverting Input of Comparator B.
OUT B (Pin 7): Output of Comparator B.
V+ (Pin 8): Positive Supply Voltage
Exposed Pad (Pin 9, DC Package Only): Ground. The
Exposed Pad must be soldered to PCB.
SIMPLIFIED SCHEMATIC
V+
OUT
750Ω
750Ω
GND
–IN
+IN
6702 SS
LTC6702
7
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APPLICATIONS INFORMATION
The LTC6702 device is a fast (500ns delay), low power,
low voltage (1.7V to 5.5V supply) general purpose dual
comparator. It provides rail-to-rail outputs able to interface
to TTL/CMOS, draws low supply currents (30µA/compara-
tor), and has internal hysteresis (approximately 4mV).
Hysteresis
Each comparator has built-in hysteresis to simplify designs,
to insure stable operation in the presence of noise at the
inputs, and to reject supply rail noise. The reference voltage
applied to the input is not the exact switching threshold
value due to the built-in hysteresis. Actual output switching
typically occurs within ±2.2mV of the reference voltage,
plus or minus the input offset voltage. External positive
feedback circuitry can be employed to increase effective
hysteresis if desired, as shown in Figure 1. This circuitry
will provide an apparent effect on both the rising and fall-
ing input thresholds (the actual internal trip points remain
unaffected). If an inverting confi guration with hysteresis is
needed, simply swap the VIN and VREF connections.
Unused Inputs
Any unused inputs should be connected in a way that fi xes
the output logic state high or low. One easy way to do this
is to tie +IN to V+ and –IN to GND.
Input Protection
External input protection circuitry is only needed if currents
would otherwise exceed the absolute maximum rating.
Inputs driven further negative than 100mV below ground
will not cause damage provided the current is limited to
10mA. ESD protection diodes are provided to prevent
damage during handling.
Comparator Input
The allowable input voltage ranges from 100mV below GND
to within 1.2V of the positive supply. The input may be
forced below ground without causing an improper output,
though some additional input current will begin to fl ow
from the ESD input protection diode. The inputs can reach
up to 6V independent of the V+ supply voltage without
causing additional input current or damage to the part.
As long as one input is within the allowable input voltage
range, the LTC6702 will continue to function normally.
Comparator Output
The comparator output is a push-pull CMOS stage
guaranteed to swing to within 350mV of V+ and 250mV
of ground, over temperature when sourcing or sinking
15mA. No external pull-up/down resistor is required. To
Figure 1. Additional Hysteresis Circuit for Noninverting Confi guration
Additional Hystersis R
RV
Trip Voltages
VIN
=+
1
3•
:
(()
()
••
LH REF
IN H L R
VR
RR R
VV
→
→
=++
⎛
⎝
⎜⎞
⎠
⎟
=
11
1
1
2
1
3
EEF RRR R
R
RV
Examp
•• •11
1
1
2
1
3
1
3
++
⎛
⎝
⎜⎞
⎠
⎟−⎛
⎝
⎜⎞
⎠
⎟+
lle Additional Hysteresis mV V V
Rk
R
:,==
=
+
50 5
110
2==
==→=
249
31
05 0525
k
M
FOR V V V L H V
V
REF IN
IN
R
.: ( ) .
(HHL V→=).0 475
–
+
1/2 LTC6702
R2 VREF
R3
6702 F01
VIN
R1
LTC6702
8
6702fa
APPLICATIONS INFORMATION
maintain micropower operation, the output stage uses a
break-before-make circuit. The break interval of this circuit
turns off both the pull-up and pull-down devices for tens
of nanoseconds before activating the appropriate output
transistor (depends on the output transition direction).
Any load connected to the output will charge or discharge
internal capacitance during this interval. This can create a
soft corner during output transitions and also decrease the
propagation delay. The Typical Performance Characteristics
section shows this behavior under three load conditions:
unloaded, 10k to ground and 200 to ground. Loads to
V+ have a similar affect when the output is transitioning
from low to high.
Power Supplies
The comparator circuitry operates from a single 1.7V
to 5.5V. A 0.1µF minimum bypass capacitor is required
between the V+ pin and GND. When the output is sinking
at least 1mA, a 1µF bypass capacitor is recommended.
Pulsing the V+ supply to the comparators on and off may
engage the ESD protection circuitry at the V+ pin. If this
occurs, current is pulled from the V+ pin through the output
stage. Using the recommended supply bypass capacitors
with some series resistance in the V+ supply line will help
to prevent this action in pulsed supply applications.
Level Translators
The level translators in the Typical Applications section
show an adjustable high-precision voltage reference
enabling the user to vary the threshold voltage. Simply
adjusting the ratio of the two resistors changes the thresh-
old voltage according to the following equation:
VTHR =0.4 1+RF
RG
Low to High Level Translator
TYPICAL APPLICATIONS
–
+
1/2 LTC6702
2V
0V
0V
OUT
6702 TA02
5.5V
5.5V
100k
24.9k
LT6650
GND FB
OUT
IN
500mV
1µF0.1µF
LTC6702
9
6702fa
TYPICAL APPLICATIONS
High to Low Level Translator
Micropower Battery Monitor with Fast Response
–
+
1/2 LTC6702
6V
0V
0V
OUT
6702 TA03
1.8V
1.8V
LT6650
GND FB
OUT
IN
500mV
1µF0.1µF
100k
24.9k
6702 TA04
–
+
–
+
R1
909k
R2
332k
R3
1M
VBATT
OUTA (0V IF VBATT < 2.8V)
OUTB (0V IF VBATT < 2.1V)
COMPA
COMPB
LT1790-1.25
LTC6702
GND OUTIN
1µF
C1
0.1µF0.1µF
LTC6702
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6702fa
PACKAGE DESCRIPTION
2.00 p0.10
(4 SIDES)
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 p 0.10
BOTTOM VIEW—EXPOSED PAD
0.64 p 0.10
(2 SIDES)
0.75 p0.05
R = 0.115
TYP
R = 0.05
TYP
1.37 p0.10
(2 SIDES)
1
4
85
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DC8) DFN 0106 REVØ
0.23 p 0.05
0.45 BSC
0.25 p 0.05
1.37 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.64 p0.05
(2 SIDES)
1.15 p0.05
0.70 p0.05
2.55 p0.05
PACKAGE
OUTLINE
0.45 BSC
PIN 1 NOTCH
R = 0.20 OR
0.25 s 45o
CHAMFER
DC Package
8-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1719 Rev A)
LTC6702
11
6702fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
PACKAGE DESCRIPTION
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.22 – 0.36
8 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3) TS8 TSOT-23 0802
2.90 BSC
(NOTE 4)
0.65 BSC
1.95 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.52
MAX
0.65
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
LTC6702
12
6702fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
LT 0609 REV A • PRINTED IN USA
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DFN Package
GND
LED B
LED A
6702 TA05
–
+
–
+
1k
1k
RSB
0.1
LTC6702
5.5V
COMP A
ILOADB
ILOADA RSA
0.1
61.9k
37.4k
24.9k
500mV
LEDA ON IF ILOADA > 2.5A
LEDB ON IF ILOADB > 5.0A
COMP B
V+
LOAD B
LOAD A
LT6650
GND
FB
OUTIN
1µF0.1µF
Dual Low Side Current Sense Alarm
