0BDESCRIPTION
Evaluation circuit DC1653A is a Battery Monitoring
System to demonstrate the functional operation of the
LTC6803-3
integrated circuit. The design includes the
ability to
daisy-chain up to 10 devices with built-in
board-to-board ribbon-cable interconnects and selec-
tively apply resistive loading to any cell for purposes of
“Passive Balancing.” Additionally, the board includes
an available DC-DC boost conversion section to power
the IC from an isolated external 5V supply.
1BLTC6803-3 KEY FEATURES
Separate Cell 0 ADC input (bottom-cell connection).
Conversion range down to –300mV per cell.
Robust daisy chain SPI common-mode immunity.
Packet Error Checking on command writes.
6X lower standby current than LTC6802.
Power-down mode for “no battery drain”.
Active pullup on discharge-control outputs (S pins).
Extensive diagnostic commands.
2BDC1653A DEMO FEATURES
Controllable discharging for Passive Balancing.
Enhanced protection circuitry for IC and external
discharge transistors during hot plugging of cells.
Graphical User Interface (GUI) screen for demon-
stration of new features and program code devel-
opment.
Available 60V boost supply from isolated 5V exter-
nal supply. Jumper configuration offers –5V offset
for V– to support negative cell readings.
Footprint for LTC6655-3.3 calibration reference.
DC1653A
Oct. 4, 2010
LTC6803-3 Battery Monitor
HARDWARE/SOFTWARE USERS GUIDE
CELLS CONNECTOR
DISCHARGE SWITCHES
BOTTOM
PORT
LTC6803-3
TOP
PORT
DC-DC
BOOST
DC1653A
2
3BGETTING STARTED WITH ONE BOARD CONNECTED
5B
SINGLE BOARD CONNECTION TO PC AND GUI
Step 1.
Set jumpers on DC1653A to the default posi-
tions indicated in Table 1.
6B
TABLE 1. JUMPER FUNCTIONS
JUMPER FUNCTION DEFAULT
POSITION
DEFAULT POSITION ALTERNATIVE POSITION
JP6
Top of Stack (TOS) Active Indicates that the cells monitored by the
board are at the top of the battery stack. Data
is not transferred in or out of the Top Port of
this board.
Allows data to be passed to and from both the
Top and Bottom Ports of the board.
JP5
General Purpose I/O
(GPIO1)
Active Output connected to pull-up resistor to Vreg.
Can be programmed as an input or an output.
Forced to a logic low level.
JP4
General Purpose I/O
(GPIO2)
Active Output connected to pull-up resistor to Vreg.
Can be programmed as an input or an output.
Forced to a logic low level.
JP3
Voltage Mode
(VMODE)
Active Bottom SPI port is configured as normal TTL
voltage level inputs and outputs. Required
setting for the board on the bottom of the
battery cell stack.
A 5K
Ω
PULL-UP RESISTOR
MUST BE CONNECTED FROM THE SDO
OUTPUT LINE (CONNECTOR J2, PIN 5) TO
THE LOGIC POWER RAIL OF THE CIRCUIT
DRIVING THE BOTTOM SPI PORT (SEE
TEXT).
Bottom Port is configured as a current inputs
and outputs. Required setting for all boards on
a cell stack above the bottom board.
JP2
-POWER Stac
k
Connects V- of the LTC6803 to the Cell 0
potential of the stack.
Forces V- to be at a potential 5V below Cell 0.
Only usable if separate external power is ap-
plied. Permits all cells to properly measure
down to -300mV.
JP1
+POWER Stac
k
Connects V+ of the LTC6803 to the Cell 12
potential of the stack.
Connects V+ to the isolated boost power
supply. Only usable if separate external power
is applied. Permits full power-down of the
LTC6803 when external power is removed.
Step 2.
Connect DC590B Quick Eval USB cable to
PC/Laptop USB port. Connect ribbon cable from
DC590B to the Bottom Port of DC1653A (J2).
Make sure that the driver for DC590B has been
downloaded from
HU
www.linear.com
UH
and installed on
the computer. This can be verified by running
Quick Eval and seeing the message that there is a
missing module for this board type. Close the
Quick Eval program and then launch only the con-
trol program:
LTC6803-1-3_GUI_Vxx_yyyymmdd.exe
When the DC590B Quick Eval board recognizes the
String ID code from the DC1653A board, the pro-
gram will open and present the control screen.
This sometimes requires two launches of the GUI
program to properly initialize.
A DC590B board has the required pull-up resistor
to the SDO line already connected.
If a system
other than DC590 is driving the bottom port
(which must be set to Voltage Mode) must have a
5K
Ω
pull-up resistor added between the SDO line
(J2, PIN 5) and the 3V/5V logic supply rail of the
DC1653A
3
driving system.
This pull-up resistor was not add-
ed to the DC1653 because it cannot be present
when the port is configured for current mode op-
eration on a multiple board monitor of a stack of
cells.
Step 3.
Connect the cells to be monitored to the cells
connector J1. This connector is in two pieces. The
setscrew piece can be unplugged to make it safer
to attach wiring from a four to twelve cell battery
stack. The LTC6803-3 is intended to measure from
four to twelve individual cells with a total stack vol-
tage of 10V to 50V.
With fewer than 12 cells to be monitored, the bot-
tom cell of the stack should always be connected
as Cell 1 between terminals J1-5(+cell contact) and
J1-4(-cell contact). Terminal J1-4, is the Cell 0 ref-
erence point for the battery cell stack. The second
cell on the stack connects between terminals J1-
6(+cell contact) and J1-5(-cell contact). All higher
numbered terminals on J1 not used for cell con-
nections may be shorted together. If the V+ posi-
tive supply for the DC1653A is to be the cell stack,
then the terminal J1-16 must connect to the top of
the battery stack. Figure 1 illustrates a connection
for fewer than 12 cells.
7B
SPECIAL NOTE FOR DEMONSTRATION PURPOSES
DC1653A and the GUI program are useful to serve as a
demonstration tool to highlight the features of the
LTC6803-3. If actual battery cells are not available, a
series string of 150
Ω
resistors connected between
each of the J1 connector terminals can be used in-
stead. Each resistor will serve as a cell voltage. A lab
power supply voltage of 10V to 50V can be connected
across the resistor string between terminals J1-16(+)
and J1-4(-).
When using resistors instead of cells, the discharge
indicating LEDs on the DC1653A board will not light
due to limited available current in the resistor-string.
Step 4.
Apply power.
Inserting the setscrew piece into connector J1 will
apply power to the board from the battery cell stack.
For the demo set up simply turn on the lab power
supply preset to a voltage between 10V and 50V.
Figure 1.
Connection of four cells (cell voltages at least 2.5V)
DC1653A
4
THE CONTROL PROGRAM
8B
THE GRAPHICAL USER INTERFACE (GUI) SCREEN
Figure 2 shows the control panel that appears on the
computer screen. The DC1653A board must be con-
nected to the DC590 interface card for the program to
open. The control screen will close if any of the boards
are disconnected. Controls on this panel are used to
communicate with the LTC6803-3. Commands are is-
sued and information is retrieved and displayed on this
screen. This panel is useful not only for demonstrating
the operation of the LTC6803-3, but also for software
developers to observe the Hex codes exchanged with
the device.
The control screen makes good use of color to provide
cell status and operating conditions at a glance. White
indicates non-existent or stale data. A step by step
procedure for one board connected to a stack of cells
follows to explain the operation of the control panel.
Sections are highlighted for each procedure.
Figure 2.
GUI Control Panel Start-up Screen
DC1653A
5
4BOPERATING THE CONTROL
SCREEN
9B
FIRST THINGS FIRST
Figure 2 is the initial start-up screen that appears when
the program is launched and the Quick Eval interface
card recognizes that the DC1653A board is connected.
Once power is supplied to the board from a stack of
cells or a power supply, the communication between
the PC and the board can be checked.
10B
1: READ CONFIGURATION
Click the command button labeled
READ CONFIG.
If all
is properly connected and operating the start-up de-
fault configuration of the LTC6803-3 will be read from
the board. The Hex codes for the six bytes of configu-
ration setting will appear in the
CONFIGURATION
REGISTERS
section in the boxes labeled
CONFIGURATION READ FROM LTC6803
. The initial
configuration bytes should be 0xE0 for register 0 and
0x00 for the other five bytes.
This default configura-
tion is the standby mode for the LTC6803. To enable
the device and begin taking cell voltage measure-
ments, a CDC (Comparator Duty Cycle) setting other
than Standby must be selected from the SET I/O
MODE set CDC selection box at the bottom of the
GUI screen. Once chosen, a WRITE CONFIG com-
mand must be executed.
In addition the LTC6803 calculates a Packet Error
Code, PEC, and appends it to the data stream each
time it sends out data. For the six bytes sent by this
command and received by the GUI, the control pro-
gram calculates a PEC in the same manner. This byte
is compared with the appended receive byte to check
that the data transmission was properly executed. The
Received PEC byte and the calculated PEC from the
received data are displayed in the top section labeled
PACKET ERROR CODE
and both bytes should match.
The oval located at the top of the color-coded status
panel for the one board will turn green if the PEC bytes
match. Data transmission errors will produce red
warning indications if the PEC bytes do not match.
There is also a display of the PEC that was sent with
the most recent command to the LTC6803, which had
to match an internally calculated value to be accepted
as a valid command.
11B
2: WRITE CONFIGURATION
Nothing is changed within the LTC6803 until the Write
Configuration command is executed. Clicking the
WRITE CONFIG
command button does this. When the
command is sent, the six Hex bytes shown in the
CONFIGURATION REGISTERS
section in the boxes
labeled
CONFIGURATION WRITTEN TO LTC6803
will
become
bold
type. Software developers can note the
exact hex values required by the LTC6803 for specific
conditions in these boxes to facilitate their control pro-
gram development.
Clicking the
READ CONFIG
button can see confirma-
tion that the configuration change was actually made.
The six bytes read back should match the six bytes
sent and the PEC/CRC check bytes should be a match
(green PEC oval on stack display).
When any configuration information is changed on the
screen the
WRITE CONFIG
command button will be
back-lit illuminated. This serves as a reminder that this
command still needs to be executed.
12B
IMPORTANT NOTE
32B
No configuration changes take effect until the
WRITE CONFIG button is clicked. The GUI provides
a periodic background command so that watchdog
does not trigger a CDC reset back to 0.
DC1653A
6
13B
3: PROGRAM THE CELL MONITORING VOLTAGE
THRESHOLDS
In the section labeled
SET VOLTAGE LIMITS
click on
the boxes and enter voltage values for the over-voltage
and under-voltage thresholds required for the cells be-
ing monitored. The voltage value entered will be
rounded to the actual value used by the LTC6803 and
displayed in the box. The voltage ranges for these thre-
sholds is -0.74V to 5.35V and the program will not al-
low the under-voltage to be greater than the over-
voltage threshold.
These monitor thresholds can be applied globally to
each and every cell in the system or customized for the
cells connected to an individual board by clicking the
desired option button. Individual boards are selected
for programming by the left hand tabs in multiple
board systems.
14B
4: READ CELL VOLTAGES
The essential function of the LTC6803 is to measure
and report the voltage on each battery cell when com-
manded. Once again this is accomplished from the
control screen with two command button clicks. First
click on the
START CELL VOLTAGE
button. This com-
mands an A/D conversion of all 12-cell voltages in the
time configured from the selected Set CDC option in
the
SET I/O MODE
box. The actual cell voltage mea-
surements are not displayed until the
READ CELL
VOLTAGE
command button is clicked.
15B
5: READ FLAGS
When any cell in a stack exceeds the programmed over
or under voltage threshold limit, one of two flag bits is
set in an internal register for that cell to serve as a
warning. This is important feedback for battery charg-
ing algorithms to know when to start or stop charging.
To read the state of these warning flags at any time is a
simple click of the
READ FLAG
command button. The
Hex code for the three flag bytes appears in the
FLAG
REGISTERS
section of the control panel.
One of the configuration options is to mask these flags
from appearing in the register bytes that are read from
the LTC6803. This feature can be used to prevent or
allow these flags to affect a control algorithm. A check
box is provided for each cell in a stack to select the
mask interrupt option for that cell. To implement the
masking requires checking the box and then writing
the new configuration with a
WRITE CONFIG
button
push.
If the measured voltage of a cell is within the monitor-
ing thresholds all indications for the cell appear green.
DC1653A
7
16B
5: READ TEMPERATURE
The LTC6803 has three ADC channels dedicated to
measuring temperature. The temperature indications
are for the internal die temperature of the LTC6803 and
two externally connected thermistors. The display re-
turns a voltage measurement.
The internal die temperature sensor produces a voltage
that changes at a rate of 8mV/°C relative to absolute
zero. To convert the voltage reading to degrees Cel-
sius, divide the voltage by 8mV then subtract 273°C.
For example, 25°C is a reading of 2.384V.
For external temperature measurements connect ther-
mistors across cells connector terminals J1-3 to J1-1
and J1-2 to J1-1. A thermistor with a 25°C value of
10K
Ω
will produce a voltage reading of ~VREF/2 at
25°C. Other thermistor values may be used but scaling
the voltage measurement may require changing the
values of resistors R31 and R32 on the DC1653A cir-
cuit board.
To take a temperature reading simple click the
START
TEMP
command button to make the LTC6803 ADC
conversion followed by clicking the
READ TEMP
command button to download the data from the board
and display the voltage readings.
17B
6: READ AN INDIVIDUAL CELL OR TEMPERATURE
18B
Each cell and each temperature channel has a check
box to allow individual measurements. Checking
these “Only” boxes sends the command (
STARTCELL
VOLT
then
READCELL VOLT
,
START TEMP
then
READ
TEMP
) to read only that channel and display its
status. Cell 8 and Internal Temp are shown in the
example screen above. Older or stale readings for all
other cells and temperatures are faded out.
DC1653A
8
19B
8: DISCHARGE CELLS
Another major feature of the LTC6803 is the ability to
remove charge from individual cells. This can help to
distribute the cell charge evenly over a stack of batte-
ries. DC1653A contains a P channel Mosfet in series
with a 33
Ω
resistor across each cell connection. When
enabled, a cell is loaded and charge is pulled from the
cell with energy dissipated in the switch and resistor.
A check box is provided for each cell to be discharged.
Checking this box (Cell 3 in the above example screen
shot) and then writing the new configuration with a
WRITE CONFIG
button push will load the cell.
IMPORTANT NOTE:
The discharge transistors are au-
tomatically turned off momentarily while the A/D con-
verter is measuring the cell voltage using the normal
STARTCELL VOLT
command. This prevents any vol-
tage drop errors caused by the discharge current flow-
ing through the cell inter-connection wiring. An accu-
rate indication of the true state of charge of the cells is
then obtained.
The LTC6803 offers the option of keeping the dis-
charge transistors on while measuring the cell voltag-
es. This is done using the
STARTCELL hold DCC
command button. A blue indicator is illuminated when
this command has been executed. This lower voltage
reading also includes I*R errors introduced by cabling
and connectors.
20B
OTHER CONTROL FEATURES
Three additional command buttons are provided on the
control screen. The
POLL ADC
and
POLL INTERRUPT
command buttons are used to test if the ADC is busy
making conversion and to test if any of the LTC6803
devices in a system have an interrupt condition respec-
tively. The result of these commands can be observed
by monitoring the serial data output line of the SPI in-
terface to the Bottom Port, J2. There is no indication
provided on the control screen.
The
START OPENWIRE
command button connects the
built in open wire detection circuitry to all cells. This
command must be followed by
READCELL VOLT
command button click to see the result. An open wire
connection to any cell will be indicated by an abnor-
mally high voltage measurement for the cell above the
open wire and a near 0V measurement for the cell with
the open wire.
21B
CONTINUOUS OPERATION
For convenience, the control panel allows for conti-
nuous operation of the DC1653A board. The command
button labeled
START
CONTINUOUS READ CELLS
can
be clicked and the board control is placed in a conti-
nuous loop executing the following commands auto-
matically in the following sequence:
Start cell voltage
Read cell voltage
Start temp
Read temp
Read flags
All values are updated continually (~800ms update
rate). While running, the configuration can be changed
on the fly. Simply changing a configuration item (Dis-
charge cells for example) and clicking the
WRITE
CONFIG
button will implement the new configuration
and return to continuous operation.
A green box in the lower right hand corner indicates
that the system is running continuously. A red box
means that the system is stopped and waiting for a
new command to be sent.
DC1653A
9
22B
DISPLAYING VALID DATA TRANSFERS ONLY
Each time data is transferred from the LTC6803 by the
four READ commands (Cell Voltage, Configuration,
Flag Status and Temperature), a Packet Error Code,
PEC, is appended based on the data stream sent. The
control program also calculates a PEC value based on
the data it receives. If the calculated PEC matches the
transmitted value the data transfer is assumed to be
error free and therefore the data is valid.
If the two PEC values do not match, the transmitted
data stream has been somehow corrupted. This type of
data error becomes more of a concern when boards
are stacked and the transmit data stream is leng-
thened. The transmitted and calculated PEC values are
displayed on the GUI and turn red when a mismatch
occurs.
23B
LOW CURRENT STANDBY
An important system consideration is the ability to put
the monitoring circuitry into a low current drain condi-
tion. This is done by setting the LTC6803 into its
standby configuration. A command button in the lower
right corner of the screen is provided to facilitate this
function. Once pushed all data and configuration set-
tings are reset and the screen goes white on all indica-
tors.
24B
SELF TEST & DIAGNOSTIC FUNCTIONS
The LTC6803 has built in self test and diagnostic func-
tions. These commands apply a test signal to the ADC
to check that the internal cell voltage and temperature
connections are functioning. The cell voltage and open
wire test signals can be applied with or without the
discharge transistors active. Checking the functionality
of each bit in the internal data registers for cell voltages
and temperatures can also be seen by choosing which
test code (0x555, 0xAAA, or 0xFFF) to expect to be
returned from the device when a self test command is
issued.
25B
OTHER CONFIGURATION OPTIONS
The SET I/O MODE group of checkboxes can be used
to adjust other features of the LTC6803. Configuring
the general purpose I/O pins and setting the type of
activity polling scheme can be selected then configured
with a WRITE CONFIG button push.
EXTERNAL POWERING OPTION
The DC1653A includes circuitry that can power the
LTC6803 separately from the monitored cells. A low-
power isolated DC-DC conversion function accepts a
5.0V input and provides about 60V between V+ and V-.
To enable this mode, the +POWER jumper JP1 must
be set to the EXTernal setting. This disconnects V+
from the battery stack and allows the LTC6803 to
completely power-down with removal of the external
energy source, dropping battery drain to mere nA lea-
kage levels for best long-term storage conditions. The
external 5V supply will have to provide about 50mA in
normal operation.
When using the external power option, there is also a
choice of configuration for the biasing point of V-. The
–POWER jumper JP2 will tie the bottom cell potential
(cell 0) to either V- (the STACK position) or to 5V
above V- (the EXTernal position). The latter provides
the needed common-mode headroom the ADC re-
quires to support negative cell-voltage readings by
forcing V- to be 5V below cell 0.
DC1653A
10
EXTERNAL CALIBRATION OPTION
The DC1653A provides a solder-pad footprint to accept
the LTC6655 high-accuracy reference. The reference is
powered from the external DC-DC function through the
local 5V regulator provided (which also creates the
biasing for the –POWER EXT option). The reference
voltage is digitized by the VTEMP1 ADC channel (in-
stead of a thermistor signal) and may be used to pro-
vide corrective information on the battery readings. A
3.300V or 4.096V model is recommended. The refer-
ence is enabled by setting GPIO1 to “0” using a confi-
guration command, or placing the GPIO1 jumper JP5
to the GND position.
STACKING BOARDS TO ADD MORE BATTERY CELLS
A unique characteristic of the LTC6803-3 is the ability
to communicate serial data up and down a stack of
devices connected to any number of battery cell
stacks. Likewise any number of DC1653A boards,
monitoring up to 12 cells each, can be stacked in daisy
chain fashion. The control GUI however is limited to
only 10 boards (120 cells maximum). To stack and
control more than one board requires the following
hardware and software modifications:
27B
MULTI-BOARD HARDWARE ADJUSTMENTS
1.
The bottom board on the stack, which connects to
a system controller or to a DC590 Quick Eval link
to a PC, must have its Bottom Port set to voltage
mode. Jumper JP3 (VMOD) must be connected to
the ACTIVE position.
If not using DC590,
a 5K
Ω
pull-up resistor must be connected from the SDO
output line (connector J2, pin 5) to the 3V/5V log-
ic power rail of the circuit driving the bottom SPI
port.
2.
Every board connected above the bottom board
must have its serial ports set to Current Mode.
Connect VMODE Jumper JP3 to the GND position
on each board to set this.
3.
The final board on the top of the stack must have
JP6 (TOS) set to ACTIVE. Connect JP6 (TOS) on
all other boards to the GND position.
4.
A ribbon cable must connect the Top Port (J3) of a
lower board to the Bottom Port (J2) of the next
board up on the stack. The daisy chain linking
with ribbon cables from the Top port of a lower
board on the stack to the Bottom port of the next
board above it establishes the serial data link for
the entire stack.
28B
CAUTION! CAUTION! CAUTION!
As battery cells are stacked on top of each other, great
care must be taken to prevent damage and personal
injury from the very high voltage potentials that may be
present. Do not allow short circuit connections, wheth-
er electrical or human, between a high voltage point
and the system or chassis ground at the bottom of the
stack. Be very careful and respect the potential danger
of high voltage!
29B
IMPORTANT NOTE FOR DEMONSTRATION OR
EVALUATION WHEN NOT USING BATTERY CELLS IN
A STACK
When using DC1653A boards in a stacked application
where a resistor string is used to simulate cell voltages
an extra wire must be added to connect the V+ poten-
tial of a lower board to the V- potential of the next
board up on the stack. Connector J1, pin 16 of a the
lower board must be connected to the connector J1,
pin 4 of the next board above it on the stack. The wire
making this connection should be kept as short as
possible (less then 2 inches or 5 cm).
This supply
connection is not provided by the ribbon connector
and is required to enable data communication up and
down the stack.
DC1653A
11
30B
SOFTWARE ADJUSTMENTS
The GUI program can control up to ten boards on a
stack.
1.
Select the number of boards on the stack from the
pop up window located near the command buttons
at the bottom of the screen.
2.
Select whether the Operating Configuration (CDC
Comparator) and Over/Under voltage thresholds
for each board are to be the same (GLOBAL) or dif-
ferent for each board (CUSTOM) and set the duty
cycle and voltages accordingly.
3.
A tab will appear on the left edge of the control
panel for each board on the stack. Clicking on any
of these tabs will transfer control commands and
data to and from the display screen to that selected
board.
31B
COLOR CODED STATUS PANEL
The color-coded status panel will expand to include all
boards connected in a stack. Each small square in this
array represents an individual battery in the stack of
boards. The intent of this display is to provide a way to
see the status of all cells at a glance. The significance
of the colors used is explained in the legend on the
screen.
Any grayed box indicates that the cell’s interrupt flag
has been masked so the LTC6803 is no longer report-
ing this status. The cell voltage value measured for this
cell however is still accurate.
The next page shows the schematic for DC1653A.
Consult the data sheet for detailed information con-
cerning the operation of the LTC6803-3.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ACTIVE
GND
GND ACTIVE
GND ACTIVE
GND ACTIVE
VMODE
GPI02
GPI01
TOS
EXT STACK
+POWER
-POWER
EXTSTACK
CELL VOLTAGES
72V MAX
SPI TOP
SPI BOTTOM
NOTES: UNLESS OTHERWISE SPECIFIED,
1. CAPACITORS AND RESISTORS ARE 0603.
1206 1206
1206
1206
1206
1206
1206
1206
1206
1206
1206
1206
1206
1206
1206
2512
2512
2512
2512
2512
2512
2512
2512
2512
2512
2512
2512
1206 1206
1206
1206
1206
1206
1206
1206
1206
1206
GPI02
V2
VMODE
V1
GPI01/W DTB
TOS
VREF
S12
S11
S9
S8
S7
S3
S2
S10
S5
S6
S4
CELL1
CELL2
CELL3
CELL4
CELL5
CELL6
CELL8
CELL9
CELL10
CELL11
CELL12
VTEMP2
VTEMP1
CELL0
C12
CELL7
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
S1
60VLOCAL
TMPRTN
VTEMP2
VTEMP1
60VLOCAL
CS
DO
DI
CK
VREG
VREG
VREG
VREG
VREG
VREG
VREG
VREG
VREG
VREG
+5V
+5V
REVISION HISTORY
DESCRIPTION DATE APPROVEDECO REV
JON M.
SECOND PROTOTYPE
206/24/10
REVISION HISTORY
DESCRIPTION DATE APPROVEDECO REV
JON M.
SECOND PROTOTYPE
206/24/10
REVISION HISTORY
DESCRIPTION DATE APPROVEDECO REV
JON M.
SECOND PROTOTYPE
206/24/10
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//
12-CELL BATTERY STACK MONITOR
N/A
LTC6803IG-3
DEMO CIRCUIT 1653A
TECHNOLOGY !
"#$%#&'()
*+,-./)
/0"12&*3$45
+,6#5-,&#$+27'&+8-29'-,$3
9"
:"
9"9"9;
<("9"=:
:9
"99
9:9"::9
":
:
9::
"
99<:
>
???$#,-21+8
2
//
12-CELL BATTERY STACK MONITOR
N/A
LTC6803IG-3
DEMO CIRCUIT 1653A
TECHNOLOGY !
"#$%#&'()
*+,-./)
/0"12&*3$45
+,6#5-,&#$+27'&+8-29'-,$3
9"
:"
9"9"9;
<("9"=:
:9
"99
9:9"::9
":
:
9::
"
99<:
>
???$#,-21+8
2
//
12-CELL BATTERY STACK MONITOR
N/A
LTC6803IG-3
DEMO CIRCUIT 1653A
Q7
RQJ0303PGDQALT-E
Q7
RQJ0303PGDQALT-E
3 2
1
LED5LED5
L9
74476410
L9
74476410
L10
74476410
L10
74476410
R24
3.3k
R24
3.3k
L3
74476410
L3
74476410
R56
475
1%
R56
475
1%
Q11
RQJ0303PGDQALT-E
Q11
RQJ0303PGDQALT-E
3 2
1
R68
33
R68
33
R28
3.3k
R28
3.3k
R26
3.3k
R26
3.3k
D19
PDZ7.5B
D19
PDZ7.5B
R59
33
R59
33
R22
3.3k
R22
3.3k
C30
1uF
C30
1uF
LED9LED9
LED10LED10
JP2JP2
1 3
2
L24
74476410
L24
74476410
R57
33
R57
33
L18 74476410
L18 74476410
R42
1M
R42
1M
C16
100nF
C16
100nF
JP5JP5
13
2
LED6LED6
Q12
RQJ0303PGDQALT-E
Q12
RQJ0303PGDQALT-E
3 2
1
R58
33
R58
33
D24
BAV99
D24
BAV99
LED12LED12
R60
33
R60
33
C29
1uF
C29
1uF
U5
24LC025-I/ST
U5
24LC025-I/ST
A0
1
A1
2
A2
3
GND
4
SDA 5
SCL
6
WP
7
VCC 8
C34
10uF
C34
10uF
R20
3.3k
R20
3.3k
D5
BAT46W
D5
BAT46W
R23
100 1%
R23
100 1%
D23
BAV99
D23
BAV99
R37
1M
1%
R37
1M
1%
R69
100 1%
R69
100 1%
R27
100 1%
R27
100 1%
C8
100nF
C8
100nF
C28
1uF
C28
1uF
R4
100
R4
100
R6
3.3k
R6
3.3k
D20
PDZ7.5B
D20
PDZ7.5B
D22
BAV99
D22
BAV99
R61
33
R61
33
U4
LT1790BCS6-5
U4
LT1790BCS6-5
VIN
4
GND
1
VOUT 6
GND 2
R25
100 1%
R25
100 1%
C23
1uF
C23
1uF
D15
PDZ7.5B
D15
PDZ7.5B
R21
100 1%
R21
100 1%
C7
100nF
C7
100nF
R43
1M
R43
1M
R12
3.3k
R12
3.3k
R10
3.3k
R10
3.3k
R34
4.99K
1%
R34
4.99K
1%
-
+
U2B
LT6004CMS8
-
+
U2B
LT6004CMS8
5
6
7
84
R18
3.3k
R18
3.3k
C11
100nF
C11
100nF
R31
10K
1%
R31
10K
1%
D4
BAT46W
D4
BAT46W
D12
PDZ7.5B
D12
PDZ7.5B
R41
1M
1%
R41
1M
1%
D1
RS07J
D1
RS07J
C31
1uF
100V
C31
1uF
100V
U6
LTC6655BHMS8-3.3 OPT
U6
LTC6655BHMS8-3.3 OPT
SHDN
1
VIN
2
GND 5
VOUT_S 6
VOUT_F 7
GND 8
GND
3
GND
4
R19
100 1%
R19
100 1%
C12
100nF
C12
100nF
L23
74476410
L23
74476410
R65
33
R65
33
R36
1M
1%
R36
1M
1%
C14
1uF
C14
1uF
R66
33
R66
33
R47
475
1%
R47
475
1%
R62
33
R62
33
E2
GPI02
E2
GPI02
L13
74476410
L13
74476410
GND CS
D0 DI CK VREF
TP1
GND CS
D0 DI CK VREF
TP1
1
2
3
4
5
6
R45
475
1%
R45
475
1%
LED8LED8
L16
74476410
L16
74476410
D3
RS07J
D3
RS07J
R46
475
1%
R46
475
1%
T1
PA0264NL
T1
PA0264NL
6
4
5
2
3
1
R1
33.2K
1%
R1
33.2K
1%
E4
V-
E4
V-
R48
475
1%
R48
475
1%
LED7LED7
L21 74476410
L21 74476410
R11
100 1%
R11
100 1%
R32
10K
1%
R32
10K
1%
D9
PDZ7.5B
D9
PDZ7.5B
L19 74476410
L19 74476410
L4
74476410
L4
74476410
R9
100 1%
R9
100 1%
D2
RS07J
D2
RS07J
R17
100 1%
R17
100 1%
E6
EXT RTN
E6
EXT RTN
D8
PDZ7.5B
D8
PDZ7.5B
JP3JP3
13
2
LED11LED11
C17
100nF
C17
100nF
C33
1000pF
630V
C33
1000pF
630V
R40
OPT
R40
OPT
R49
475
1%
R49
475
1%
D14
PDZ7.5B
D14
PDZ7.5B
Q3
RQJ0303PGDQALT-E
Q3
RQJ0303PGDQALT-E
3 2
1
C24
1uF
C24
1uF
L15
74476410
L15
74476410
L5
74476410
L5
74476410
J2J2
VCC
2
SCK
4
CS
6
GND2
8
EEVCC
10
EEGND
12
NC
14
VIN
1
GND1
3
MISO
5
MOSI
7
EESDA
9
EESCL
11
GND3
13
Q1
RQJ0303PGDQALT-E
Q1
RQJ0303PGDQALT-E
3 2
1
JP6JP6
13
2
R30
100
1%
R30
100
1%
C21
10uF
C21
10uF
L12
74476410
L12
74476410
Q2
RQJ0303PGDQALT-E
Q2
RQJ0303PGDQALT-E
3 2
1
C22
100nF
C22
100nF
R14
3.3k
R14
3.3k
Q4
RQJ0303PGDQALT-E
Q4
RQJ0303PGDQALT-E
3 2
1
R44
1M
R44
1M
R33
4.99K
1%
R33
4.99K
1%
R16
3.3k
R16
3.3k
&
100nF
&
100nF
R53
475
1%
R53
475
1%
R54
475
1%
R54
475
1%
R64
33
R64
33
D10
PD27.5B
D10
PD27.5B
R50
475
1%
R50
475
1%
R8
3.3k
R8
3.3k
L6
74476410
L6
74476410
C15
1uF
C15
1uF
D7
BAT46W
D7
BAT46W
Q5
RQJ0303PGDQALT-E
Q5
RQJ0303PGDQALT-E
3 2
1
J3J3
VCC 2
SCK 4
CS 6
GND2 8
EEVCC 10
EEGND 12
NC 14
VIN
1
GND1
3
MISO
5
MOSI
7
EESDA
9
EESCL
11
GND3
13
R63
33
R63
33
C13
100nF
C13
100nF
D6
75V
D6
75V
R67
33
R67
33
C19
100nF
C19
100nF
R13
100 1%
R13
100 1%
L11
74476410
L11
74476410
C32
10uF
C32
10uF
C20
220pF
C20
220pF
C3
100nF
C3
100nF
Q9
RQJ0303PGDQALT-E
Q9
RQJ0303PGDQALT-E
3 2
1
R15
100 1%
R15
100 1%
D16
PDZ7.5B
D16
PDZ7.5B
Q10
RQJ0303PGDQALT-E
Q10
RQJ0303PGDQALT-E
3 2
1
D17
PDZ7.5B
D17
PDZ7.5B
Q6
RQJ0303PGDQALT-E
Q6
RQJ0303PGDQALT-E
3 2
1
R39
1M
1%
R39
1M
1%
R5
100 1%
R5
100 1%
C1
100nF
C1
100nF
R7
100 1%
R7
100 1%
C2
100nF
C2
100nF
C4
100nF
C4
100nF
U3
LT1693-2IS8
U3
LT1693-2IS8
IN1
1
GND1
2
IN2
3
GND2
4OUT2 5
VCC2 6
OUT1 7
VCC1 8
L1
74476410
L1
74476410
D13
PDZ7.5B
D13
PDZ7.5B
L25 74476410L25 74476410
L17
74476410
L17
74476410
R52
475
1%
R52
475
1%
D21
BAV99
D21
BAV99
C35
1uF
C35
1uF
C27
1uF
C27
1uF
R29
100
1%
R29
100
1%
D18
PDZ7.5B
D18
PDZ7.5B
C5
100nF
C5
100nF
R51
475
1%
R51
475
1%
LED3LED3
R70
10K 1%
R70
10K 1%
R35
OPT
R35
OPT
L7
74476410
L7
74476410
D11
PDZ7.5B
D11
PDZ7.5B
L22
74476410
L22
74476410
E5
EXT +5V
E5
EXT +5V
LED1LED1
E3
VREG
E3
VREG
C26
1uF
C26
1uF
R55
475
1%
R55
475
1%
L2
74476410
L2
74476410
L20 74476410
L20 74476410
U1
LTC6803IG-3
U1
LTC6803IG-3
C7
15
V+
4
C6
17
C9
11
SDIO
2
S9
12
C10
9
C11
7
C5
19
S7
16
C8
13
S8
14
S10
10
S11
8
CSBO
1
SCKO
3
C12
5
S12
6
S3 24
C3 23
S4
22
C4
21
S5
20
S6
18
C2 25
S2 26
C1 27
S1 28
C0 29
V- 30
NC 31
VTEMP1 32
VTEMP2 33
VREF 34
VREG 35
TOS 36
WDTB 37
GPI01 38
GPI02 39
VMODE 40
SCKI 41
SDI 42
SD0 43
CSBI 44
LED2LED2
J1J1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
E1
GPI01
E1
GPI01
-
+
U2A
LT6004CMS8
-
+
U2A
LT6004CMS8
3
2
1
84
L14
74476410
L14
74476410
LED4LED4
JP4JP4
13
2
L8
74476410
L8
74476410
C9
100nF
C9
100nF
C10
100nF
C10
100nF
C25
1uF
C25
1uF
Q8
RQJ0303PGDQALT-E
Q8
RQJ0303PGDQALT-E
3 2
1
C6
100nF
C6
100nF
JP1JP1
13
2
