®
Altera Corporation 1
Configuration Devices for
ACEX, APEX, FLEX & Mercury Devices
March 2001, ver. 11 Data Sheet
A-DS-EPROM-11
Features S erial device family for configuring ACEXTM, APEXTM (includi ng
APEX 20K, APEX 20KC, and APEX 20KE), FLEX® (FLEX 10KE an d
FLEX 10KA), and MercuryTM devices
Easy-to-use 4-pin interface to ACEX, APEX, FLEX, and Mercury
devices
Low current during configuration and near-zero standby current
5.0-V and 3.3-V operation
Software design sup port with the Alte ra® QuartusTM and
MAX+PLUS®II developmen t sys tems for Windows-based PCs as
well as Sun SPARCstation, and HP 9000 Series 700/800
Programming support with Alteras Master Programming Unit
(MPU) and programming hardware from Data I/O,
BP Microsystems, and other manufacturers
Available in compact plastic packages (see Figures 1 and 2)
8-pin plastic dual in-line package (PDIP)
20-pin plastic J-lead chip carrier (PLCC) package
32-pin plastic thin quad flat pack (TQFP) package
EPC2 device has reprogrammable Flash configuration memory
5.0-V and 3.3-V in-system programmability (ISP) through the
built-in IEEE St d. 1149.1 Joint Test Action Grou p (JTAG)
interface
Built-in JTAG boundary-scan test (BST) circuit ry compliant with
IEEE Std. 1149 .1
ISP circuitry is compatible with IEEE Std. 1532 for EPC2
configuration device
Suppor ts prog ra m mi ng th rou gh Seria l Ve ct or For ma t Files
(.svf), JamTM Standard Test and Programming Language
(STAPL) Files (.jam), Jam STAPL Byte-Code Files (.jbc), and the
MAX+PLUS II software via the MasterBlasterTM,
ByteBlasterMVTM, or BitBlasterTM download cable
nINIT_CONF pin allows a JTAG instruction to initiate APEX,
FLEX, or Merc ury device configuration
Can be programmed with Programmer Object Files (.pof) for
EPC1 and EPC1441 de vices
Available in 20-pin PLCC and 32-pin TQFP packages
2Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
Figure 1. EPC1, EPC1441, EPC1213, EPC1064, & EP C1064V Package Pi n-Out Diagrams
Note:
(1) The nCASC pin is available on EPC1 and EPC1213 devices. On the EPC1064, EPC1064V, and EPC1441 devices, it is
a rese r v e d pin and should no t be co nnec te d .
Figure 2. EPC2 Package Pin-Out Diagrams
8-Pin PDIP 32-Pin TQFP
EPC1441
EPC1064
EPC1064V
20-Pin PLCC
EPC1
EPC1441
EPC1213
EPC1064
EPC1064V
EPC1
EPC1441
EPC1213
EPC1064
EPC1064V
DATA
DCLK
OE
nCS
VCC
VCC
nCASC
(1)
GND
1
2
3
4
8
7
6
5
123
4
5
6
7
8
20 19
111091213
18
17
16
15
14
OE
N.C.
N.C.
DCLK
N.C.
N.C.
N.C.
DATA
N.C.
VCC
VCC
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
(1)
nCASC
nCS
GND
303132
1
2
3
4
5
29 28
N.C.
N.C.
DCLK
N.C.
N.C.
N.C.
N.C.
nCS
N.C.
GND
N.C.
N.C.
N.C.
24
23
22
21
20
N.C.
VCC
N.C.
N.C.
19
18
17
N.C.
N.C.
DATA
N.C.
N.C.
N.C.
VCC
N.C.
25
916
8
N.C.
OE
N.C.
N.C.
N.C.
N.C.
6
7
10 11 12 13 14 15
27 26
N.C.
32-Pin TQFP
20-Pin PLCC
123
4
5
6
7
8
20 19
111091213
18
17
16
15
14
OE
N.C.
VCCSEL
DCLK
N.C.
TMS
TCK
DATA
TDO
VCC
VPP
N.C.
N.C.
N.C.
VPPSEL
TDI
nCASC
nCS
GND
303132
1
2
3
4
5
29 28
N.C.
N.C.
DCLK
N.C.
VCCSEL
TDI
N.C.
nCS
N.C.
GND
nINIT_CONF
N.C.
N.C.
24
23
22
21
20
N.C.
VPP
N.C.
N.C.
19
18
17
TDO
TCK
DATA
N.C.
N.C.
TMS
VCC
N.C.
25
916
8
N.C.
OE
N.C.
VPPSEL
N.C.
N.C.
6
7
10 11 12 13 14 15
27 26
nCASC
nINIT_CONF
Altera Corporation 3
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Functional
Description
With SRAM -based devices, conf igur ation data must be re load ed ea ch
time the system initializes, or wh en new configuration data is needed.
Altera configuration dev ices store configuration data for SRAM-based
ACEX, APEX, FLEX, and Mercur y devices. Table 1 lists Altera
configuration devices.
Table 2 lists th e configur ation dev ice used wit h each ACEX, APEX, FLEX
and Mercury device.
Table 1. Configuration Devices
Device Description
EPC2 1,695,680 × 1-bit device with 5.0-V or 3.3-V operation
EPC1 1,046,496 × 1-bit device with 5.0-V or 3.3-V operation
EPC1441 440,800 × 1-bit device with 5.0-V or 3.3-V operation
EPC1213 212,942 × 1-bit device with 5.0-V operation
EPC1064 65,536 × 1-bit device with 5.0-V operation
EPC1064V 65,536 × 1-bit device with 3.3-V operation
Table 2. Appropriate Configuration Device for Each ACEX, APEX, FLEX & Mercury Device (Part 1 of 2)
ACEX, APEX, FLEX & Me rcury Device Configuration Device
EP20K30E EPC2, EPC1, or EPC1441
EP20K60E EPC2 or EPC1
EP20K100, EP20K100 E EPC2 or EPC1
EP20K160E EPC2
EP20K200, EP20K200 E Two EPC2 devices (1)
EP20K300E Two EPC2 devices (1)
EP20K400, EP20K400 E Three EPC2 devices (1)
EP20K600E Four EPC2 devices (1)
EP20K1000E Six EPC2 devices (1)
EP20K1500E Eight EPC2 devices (1)
EP1K10 EPC2, EPC1, or EPC1441
EP1K30 EPC2, EPC1, or EPC1441
EP1K50 EPC2 or EPC1
EP1K100 EPC2 or two EPC1 devices
EPF10K10, EPF10K 10A EPC2, EPC1, or EPC1441
EPF10K20 EPC2, EPC1, or EPC1441
EPF10K3 0E EPC2 or EPC1
EPF10K30, EPF10K 30A EPC2, EPC1, or EPC1441
EPF10K4 0 EPC2 or EPC1
4Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
Note:
(1) This device can be conf igur e d by a smaller numb er of EPC1 6 config uration devices . Fo r more info rmation, see the
EPC16 Confi guration Device Da ta Sh eet.
Table 3 shows which configuration devi ces can be used with each device
family.
EPF10K50, EPF10K 50V, EPF10K50E EPC2 or EPC1
EPF10K70 EPC2 or EPC1
EPF10K100 , EPF10K 100A, EPF10K100B,
EPF10K100E E PC2 or two EP C1 devices
EPF10K130V EPC2 or two EPC1 devices
EPF10K130E Two EPC2 or two EPC1 devices
EPF10K200E Two EPC2 or three EPC1 devices
EPF10K250A Two EPC2 or four EPC1 devices
EPF8282A EPC1, EPC1441, or EPC1064
EPF8282AV EPC1, EPC1441, or EPC1064V
EPF8452A EPC1, EPC1441, EPC1064, or EPC1213
EPF8636A EPC1, EPC1441, or EPC1213
EPF8820A EPC1, EPC1441, or EPC1213
EPF81188A EPC1, EPC1441, or EPC1213
EPF81500A EPC1 or EPC1441
EPF6010A EPC1 or EPC1441
EPF6016, EPF6016A EPC1 or EPC1441
EPF6024A EPC1 or EPC1441
EP1M120 EPC2 or EPC16
EP1M350 EPC16 or three EPC2 devices
Table 2. Appropriat e Conf iguration Device for Each ACEX, APEX, FLEX & M ercur y Device (Part 2 of 2)
ACEX, APEX, FLEX & Mercury Device Config uration Device
Table 3. Configuration Device & PLD Compatibility
PLD Configuration Device
EPC2 EPC1 EPC1441 EPC1213
EPC1064
EPC1064V
ACEX 1K (1) vvv
APEX 20K (1) vvv
FLEX 10K (1) vvv
FLEX 10KE (1) vv
Altera Corporation 5
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Note to Table:
(1) EPC16 c onf ig u rat ion de vices support this de vi ce. For mo re infor m ation, see the
EPC16 Confi gu ra ti o n De vice Data Sheet.
Figure 3 shows the configuration device block diagram.
FLEX 8000 vvv
FLEX 6000 vv
Mercury (1) vvv
Table 3. Configuration Device & PLD Compatibility
PLD Config ura tio n De vice
EPC2 EPC1 EPC1441 EPC1213
EPC1064
EPC1064V
6Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
Figure 3. Configuration Device Block Diagram
D
CL
K
nCS
OE
Decode
Logic
Address
DATA
DATA
nCASC (1)
Shift
Register
EPROM
Array
nCS
Decode
Logic
Address
O
scillato
r
Oscillator
Control
EPROM
Array
Shif
t
Re
g
iste
r
DA
TA
TA
TA
TA
D
CL
K
nCASC (1
)
ACEX 1K, APEX 20K, FLEX 10K, & FLEX 6000 Device Confi
g
uration Usin
g
an EPC2, EPC1, or EPC1441 Device
FLEX 8000 Device Confi
g
uration Usin
g
an EPC1, EPC1441, EPC1213, EPC1064, or EPC1064V Device
A
dd
r
ess
Counter
CL
K
ENA
nRESET
A
dd
r
ess
Counter
CL
K
ENA
nRESET
Error
Detection
Circuitry
OE (2)
Notes:
(1) The EPC14 41, EPC1 064, and EP C1064V devices do not sup por t dat a casc ading . The EPC 2, EPC1, and EP C1213
devices support data cascading.
(2) The OE pin is a bidirectional open-dr ain pin.
Altera Corporation 7
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Device
Configuration
The control sign als for co nfiguration devicesnCS, OE, and DCLK
interfac e directly with ACEX, APEX, FLEX, and Merc u ry devic e cont rol
signals. All ACEX, APEX, FLEX, and Mercury devices can be configured
by a config uration device without requiring an e xternal intel lige nt
controller.
The config uration devices OE and nCS pins co nt rol the tri -sta te buffer on
the DATA ou tput pin, and enable th e address counter (a nd the oscillator in
EPC2, EPC1, and EPC1441 devices). When OE is driven low, the
configuration device resets the address counter and tri-states its DATA pin.
The nCS pin contro ls the output of t he config uration d evice. If nCS is held
high after the OE reset pulse, the cou nter i s disabled a nd the DATA output
pin is tri-stated. When nCS is driven low, the counter and DATA output pin
are enabled. When OE is driven low again, the address counter is reset and
the DATA output pin is tri-stated, regardless of the state of nCS.
1The EPC2, EPC1 , an d EP C1441 devic es det er mi ne the oper at ion
mode and whether the ACEX 1K, APEX 20K, FLEX 10K,
FLEX 8000, FLEX 6000, or Mercury protocols should be used
when OE is driven high.
When the configuration device has driven out all of its data and has
driven nCASC low, the device tri-st ates the DATA pin to avoid contention
with other configuration devices.
The EPC2 device allows the user to initiate configuration of the ACEX,
APEX, FL EX, or Mercury device via an additi onal pin, nINIT_CONF, that
can be ti ed to th e nCONFIG pin of the ACEX, APEX, FLEX, or Mercury
device(s) to be configured. A JTA G ins tr uct ion causes the EPC2 device t o
drive nINIT_CONF low, which in turn pulls nCONFIG low. The EPC2
device then drives nINIT_CONF high to start configurati on. W hen the
JTAG state machine exits this state, nINIT_CONF releases nCONFIG and
con figu ration is initiated .
1An EPC2 device can be progr amme d with a POF gener at ed for
an EPC1 or EPC1441 device, however, an EPC2 device cannot
configure FLEX 6000 or FLEX 8000 devices. An EPC1 device can
be programmed using a POF generated for an EPC1441 device.
8Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000 & Mercury Device
Configuration
ACEX 1K, APE X 20K, FLEX 10K, a nd Mercur y devices can b e config ured
with EPC2, EPC1, or EPC1441 devices. FLEX 6000 devices can be
configured with EPC1 or EPC1441 devices. The EPC2, EPC1, or EPC1441
device stores configuration data in its EPROM array and serially clocks
data out with an internal oscillator. The OE, nCS, and DCLK pins supply
the control signals for th e address counter and th e output tri-state buffer.
The config uration device sen ds a ser ial bit stream of configu ration da ta to
its DATA pin, which is routed to the DATA0 or DATA input pin on the
ACEX 1K, AP EX 20K, FLEX 10K, FLEX 6000 , or Me rcury devic e. Figure 4
shows an ACEX 1K, APEX 20K , FLEX 10K, FLEX 6000, or Mercury de vice
configu red with a single EP C2, EP C1, or EPC1 44 1 dev ice .
Figure 4. ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000, or Mercury Device
Configured with an EPC2, EPC1, or EPC1441 Configur atio n Device
Table 4 describes EPC2, EPC1, an d EPC1441 pin functions during
ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000, and Mercury device
configuration.
ACEX 1K, APEX 20K, FLEX 10K,
FLEX 6000, or Mercury Device
(2)
Configuration
Device
DCLK
DATA
OE
nCS
nINIT_CONF
(4)
MSEL0
MSEL1
DCLK
DATA0
nSTATUS
CONF_DONE
nCONFIG
VCC VCC
GND GND
(3) (3)
nCE
(1) (1)
Notes:
(1) The pull-u p resistor should be connecte d to the sam e su pply voltage as the
configurat ion de vic e .
(2) The diagram shows an ACEX 1K, APEX 20K, FLEX 10K or Mercury device, which
has MSEL0 and MSEL1 tied to ground. For FLEX 6000 devices, MSEL is tied to
ground, and the DATA0 pin is named DATA. EPC2 cannot be used with FLEX 6000
devices. All other connections are the same for ACEX 1K, APEX 20K, FLEX 10K,
FLEX 6000 and Me r cur y devices .
(3) All pull-up resistors are 1 k¾. APEX 20KE pull up resistors are 10 k¾. The OE, nCS,
and nINIT_CONF pins on EPC2 devices have internal, user-configurable 1-k¾
pull-up r e sis tor s. If internal pull-up r esistors are used , ex te r nal pu ll- up resis tor s
should not be used on these pins.
(4) The nINIT_CONF pin is only available on EPC2 devices and has an internal pull up
of 1 k¾ that is always active. If nINIT_CONF is not available or not used, nCONFIG
must be pulled to VCC either directly or th rough a 1-k¾ resistor.
Altera Corporation 9
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Tab le 4. EPC2, EPC1, & EPC14 4 1 Pin Functi ons Dur ing ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000 &
Mercury Co nfigu ration (Part 1 of 2)
Pin Name Pin Number Pin
Type Description
8-Pin
PDIP (1) 20-Pin
PLCC 32-Pin
TQFP (2)
DATA 1 2 31 Output Serial data output. The DATA pin is tri-s tated before
configuration when the nCS pin is high, and after the
configuration device finishes sending its configuration
data. This operation is independent of the devic es
position in the cascade chain.
DCLK 242I/ODCLK is a clock output when configuring with a single
configuration device or when the configuration device is
the first device in a configuration device chain. DCLK is
a clock input for subsequent configuration devices in a
configuration device chain. Rising edges on DCLK
increment the internal address counter and present the
next bit of data to the DATA pin. The counter is
incremented only if the OE input is held high, the nCS
input is held low, and all configuration data has not
been transferred to the target device. When configuring
with the first EPC2 or EPC1 device in a configuration
device chain or with a single EPC1441 device, the
DCLK pin drives low after configuration is complete or
when OE is low.
OE (3) 3 8 7 Open-
Drain
I/O
Output enable (active high) and reset (active low). A
low logic level resets the address counter. A high logic
level enables DATA and permits the address counter to
count. If this pin is low (reset) during configuration, the
internal oscillator becomes inactive and DCLK drives
low. See Error Detection Circuitry on page 17.
nCS (3) 4 9 10 Input Chip select input (active low). A low input allows DCLK
to increment the address counter and enables DATA to
drive out. If the EPC1 or EPC2 is reset with nCS low, the
device initializes as the first device in a configuration
chain. If the EPC1 or EPC2 device is reset with nCS
high, the device initializes as the subsequent device in
the chain.
nCASC (4) 6 12 15 Output Cascade select output (active low). This output goes
low when the address counter has reached its
maximum value. In a chain of EPC1 or EPC2 devices,
the nCASC pin of one device is connected to the nCS pin
of the next device, which permits DCLK to clock data
from the next EPC1 or EPC2 device in the chain.
10 Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
Notes:
(1) This pac ka ge is availab le fo r EPC1 and EP C1441 devices only.
(2) This pac ka ge is availab le fo r EPC2 and EP C1441 devices only.
(3) The OE, nCS, and nINIT_CONF pins on EPC2 devic e s have inter nal , user -config u ra ble 1-k ¾ pull-up resistors. If
internal pull-up resistors are used, external pull-up res ist ors should not be used on these pins.
(4) The EPC1441 device does no t su pp ort data c asc ading. EPC2 and EPC1 devi ces support data cascading.
(5) T his pin ap plies to the EPC2 devic e only .
nINIT_CONF
(3), (5) 13 16 Open-
Drain
Output
Allows the INIT_CONF JTAG instruction to initiate
configuration. This pin is connected to the nCONFIG pin
of the ACEX, APEX, FLEX or Mercury device to initiate
configuration from the EPC2 via a JTAG instruction. If
multiple EPC2 devices are used to configure an ACEX,
APEX, FLEX or Mercury device, only the first EPC2 has
its nINIT_CONF pin tied to the devices nCONFIG pin.
TDI (5) 11 13 Input JTAG data input pin. Connect this pin to VCC if the
JTAG circuitry is not used.
TDO (5) 1 28 Output JTAG data output pin. Do not connect this pin if the
JTAG circuitry is not used.
TMS (5) 19 25 Input JTAG mode select pin. Connect this pin to VCC if the
JTAG circuitry is not used.
TCK (5) 3 32 Input JTAG clock pin. Connect this pin to ground if the JTAG
circuitry is not used.
VCCSEL (5) 5 3 Input Mode select for VCC supply. VCCSEL must be
connected to ground if the device uses a 5.0-V power
supply (i.e., VCC = 5.0 V). VCCSEL must be connected
to VCC if the device uses a 3.3-V power supply (i.e.,
VCC =3.3V).
VPPSEL (5) 14 17 Input Mode select for VPP. VPPSEL must be connected to
ground if VPP uses a 5.0-V power supply
(i.e., VPP =5.0V). VPPSEL must be connected to VCC
if VPP uses a 3.3-V power supply (i.e, VPP = 3.3 V).
VPP (5) 18 23 Power Programming power pin. For the EPC2 device, this pin
is normally tied to VCC. If the EPC2 VCC is 3.3 V, VPP
can be tied to 5.0 V to improve in-system programming
times. For EPC1 and EPC1441 devices, VPP must be
tied to VCC.
VCC 7, 8 20 27 Power Power pin.
GND 5 10 12 Ground Ground pin. A 0.2-µF decoupling capacitor must be
placed between the VCC and GND pins.
Tab le 4. EPC2, EPC1, & EPC1441 Pi n Functions During ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000 &
Mercury Co nfigu ration (Part 2 of 2)
Pin Name Pin Number Pin
Type Description
8-Pin
PDIP (1) 20-Pin
PLCC 32-Pin
TQFP (2)
Altera Corporation 11
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000 & Mercury Device
Configuration with Multiple EPC2 or EPC1 Configuration Devices
When configuration data for ACEX 1K, APEX 20K, FLE X 10K, FLEX 6000,
or Mercury devices exceeds the capacity of a singl e EPC2 or E PC1 devi ce,
multiple EPC2 or EPC1 devices can be cascaded together. (The EPC14 41
device does not support data cascading.) If multiple EPC2 or EPC1
devices are required, the nCASC and nCS pins provide han dshaking
between the dev ices.
When configuring ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000, or
Mercury devices with cascaded EPC2 or EPC1 dev ices, the position of the
EPC2 or EPC1 device in the cha in determines its operatio n. When the first
or maste r device in a config uration device c hain is powered-up or reset
and the nCS pin is driven low, the master device controls configuration.
The master devic e suppl ies al l clock pulses to one or m ore AC EX, APEX ,
FLEX, or Mercu ry devic es and to an y subsequ en t slave dev ice s during
configurat ion. The master EPC2 or EPC1 device also provides the first
stream of data to the ACEX, APEX, FLEX, or Mercury devices during
multi-device configurat ion. After the master EPC2 or EPC1 device
finishes sending configuration data, the master EPC2 or EPC1 device
drives its nCASC pin low, whic h drives the nCS pin of th e firs t slave EP C2
or EPC1 device low. This action causes the slave EPC2 or EPC1 device to
send configuration data to the ACEX, APEX, FLEX, or Mercury devices.
The maste r EPC2 or E PC1 device c locks all sub sequent sla ve devices u ntil
configuration is complete. Once all configuration data is transferred and
the nCS pin on the master EPC2 or EPC1 device is driven high by the
ACEX, APEX, FLEX, or Mercury devices CONF_DONE pin, the m aster
EPC2 or EPC 1 device clocks 16 additional cycles to initialize the ACEX,
APEX, FLEX, or Mercury device(s). Th e master EPC2 or EPC1 devic e then
goes into zero-power (idle) state. If nCS on the master EPC2 or EPC1
device i s driven high before all conf iguration d ata is tra nsferred, or if nCS
is not driven high after all configuration data is transferred, the master
EPC2 or EPC1 device drives t he ACEX, AP EX, FLEX, or M ercury devic es
nSTATUS pin low, indicating a configuration error.
Configuration automatically restarts if the project is compiled with the
Auto-Restart Configuration on Frame Error option turned on in the
MAX+PLUS II softwares Global Proje ct Devic e Options dialog box
(Assign menu).
Figure 5 shows an AC EX 1K, APE X 20K, FLEX 10K, FLE X 60 00, or
Mercury device configured with two EPC2 or EPC1 devices. Additional
EPC2 or EPC1 devices can be added by connecting nCASC to nCS of the
subsequen t slave EP C2 or EPC1 dev ice in the chain and connec ting DCLK,
DATA, and OE in parallel.
12 Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
1A mixtur e of ACEX 1K, APEX 20K, APEX 20KE, and Mercury
devices can be config ured in the same chain. A mixt ure of
FLEX 10K, FLEX 10KA, FLEX 10KE, and 5.0- V and 3.3-V
FLEX 6000 devices can be configured in the same chain. See
Configura tion Chain with Mu ltiple Voltage Lev els on page 19.
Figure 5. ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000, or Mercury D evice Configured wi th Two EPC2 or EPC1
Configuration Devic es
Notes:
(1) T he pu ll- up res istor should be con ne c te d to the same suppl y volt ag e as the c onf ig ur ation device.
(2) The diagra m shows an ACE X 1K, APEX 20K, FLEX 10K, or Mercury device, whic h has MSEL0 and MSEL1 tie d to
ground. For FLEX 6000 devices, MSEL is tied to g rou nd , and the DATA0 pin is named DATA. EPC2 cannot be used
with FLEX 6000 devices. All other connections are the same for ACEX 1K, APEX 20K , FLEX 10K, FLEX 6 000, and
Mercury devices.
(3) A ll pu ll- u p r e sistors are 1 k¾ (APEX 20KE pull-resistors are 10k¾). The OE and nCS pins on EPC2 devices have
internal, user-config u ra ble 1-k¾ p ull-up resis tor s. If in te rn al pull-up r esistors are used, ex te r nal pu ll- up resis tor s
should not be used on these pins.
(4) The nINIT_CONF pin is only available on EPC2 devices and has an internal pull up of 1 k¾ that is always active. If
nINIT_CONF is not available or not used, nCONFIG must be pulled to VCC either directly or through a 1-k¾ resistor.
Figure 6 shows two AC EX 1K, APEX 20K, FLEX 10 K, FLEX 6000, or
Merc ury devices configur ed with two EPC2 or EPC1 devices.
Configuration
Device 1
DCLK
DATA
OE
nCS
nINIT_CONF
(4)
MSEL0
MSEL1
DCLK
DATA0
nSTATUS
CONF_DONE
nCONFIG
VCC
VCC
GND GND
(3)
nCE
DCLK
DATA
nCS
OE
Configuration
Device 2
(3)
(1) (1)
nCASC
ACEX 1K, APEX 20K, FLEX 10K,
FLEX 6000, or Mercury Device
(2)
Altera Corporation 13
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Figure 6. Two A CEX 1K, APEX 20K, FLEX 10K, FLEX 6000, or Mercury Device s Configured with Two EPC 2 or
EPC1 Configuration Devices
Notes:
(1) T he pu ll- u p res istor should be con ne c te d to the same supp ly vol tag e as the c onf ig ur at ion de vic e .
(2) The diagr am shows an AC EX 1K, APEX 20K, FLEX 10K, or Mercury device, which has MSEL0 and MSEL1 tie d to
ground. For FLEX 6000 devices, MSEL is tie d to ground, and th e DATA0 pin is named DATA. EPC2 cannot be used
with FLEX 6000 devices. All other connections are the sa me for ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000, and
Mercury devices.
(3) A ll p ull-up resis tor s are 1 k¾ (APEX 20K E pu ll- resistors are 10k¾). The OE and nCS pins on EPC2 devices have
internal, user-config u ra ble 1-k¾ p ull-up resistors. If in te r nal pull-up r e sistors are used , e xte rnal pull-u p r e sistors
should not be used on these pins.
(4) The nINIT_CONF pin is only available on EPC2 devices and has an internal pull up of 1 k¾ that is always active. If
nINIT_CONF is not available or not used, nCONFIG must be pulled to VCC either directly or through a 1-k¾ resisto r.
fFor more information on ACEX 1K, APEX 20K, FLEX 10K, or FLEX 6000
device configuration, see App lic ation Note 116 (Configurin g ACEX 1K,
APEX 20K, FLEX 10K & FLEX 6000 Devices).
FLEX 8000 Device Configuration
FLEX 8000 devices differ from ACEX 1K, APEX 20K, FLEX 10K, and
FLEX 6000 dev ices in that t hey have internal oscilla tors th at can provide a
DCLK signal to the configuration device. The configuration device sends
configuration data out as a serial bitst ream on the DATA output pin. This
data is routed into the FLEX 8000 device via the DATA0 input pin. The
EPC1, EPC1441, EPC1213, EPC1064, and EPC1064V configuration devices
support this type of configuration.
Configuration
Device 1
DCLK
DATA
OE
nCS
nINIT_CONF
(4)
DCLK
DATA0
nSTATUS
CONF_DONE
nCONFIG
VCC VCC
GND
GND
nCE
DCLK
DATA
nCS
OE
Configuration
Device 2
MSEL0
MSEL1
DCLK
DATA0
nSTATUS
CONF_DONE
nCONFIG
GND
nCE
MSEL0
MSEL1
nCEO
(2) (2)
(1) (1)
nCASC
ACEX 1K, APEX 20K, FLEX 10K, ACEX 1K, APEX 20K
FLEX 6000 or Mercury Device
(3)
FLEX 10K, FLEX 6000
or Mercury Device
(3)
14 Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
EPC1 and EPC1441 devices can replace the EPC1213, EPC1064, and
EPC1064V configuration devices. The EPC1 or EPC1441 device
automatically emulates the EPC1213, EPC1064, or EPC1064V when it is
programmed with the appropriate POF. When the EPC1 or EPC1441
device is programm ed with an EPC12 13, EPC1064, or EPC1 064V POF, the
FLEX 8000 device drives the EPC1 or EPC1441 devices OE pin high and
clocks the EPC1 or EPC1441 device. One EPC1 dev ice can store more
configuration data than the E P C1064, EP C1064V, EPC1213, or E P C1441
device. Therefore, designers can use one type of configuration dev ice for
all FLEX devices. In addition, a single EPC1 or EPC1441 device can
configure any FLEX 8000 device.
For multi-de vice configura tion of FLEX 8000 devices, the nCASC and nCS
pins provide handshaking between m u ltiple conf iguration devices,
allowing se ver al casc a ded EP C1 or EP C12 13 devices to seria lly c onfig ure
multiple FLEX 8000 devices. The EPC1441, EPC1064, an d EPC1064V do
not support data cascading. Figure 7 show s a FLEX 8 000 device
configur ed with a single EPC1, EPC1441, EPC1213, EPC1064, or
EPC1064V configuration device.
Figure 7. FLEX 8000 Device Configured with an EPC1, EPC1441, EPC1213,
EPC1064, or E PC1064 V Config uration Device
Notes:
(1) The pu ll- up resis tor shou ld be c o nne c ted to the same su pply voltag e as the
configurat ion de vic e .
(2) All pull-up resistors are 1 k¾.
FLEX 8000 Device
"0"
"0"
"0"
Configuration
Device
VCC
nCS
OE
DCLK
nS/P
MSEL1
MSEL0
DATA0
nCONFIG
CONF_DONE
nSTATUS
DCLK DATA
VCC
(2)
VCC
(2)
(1)(1) (1)
Altera Corporation 15
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Figure 8 shows three FLEX 8000 devices configured with tw o EPC1 or
EPC1213 configuration devices.
Figure 8. FLEX 8000 Mu lti-D evice Configuration wit h Two EP C1 or EP C1213 Configurat ion Device s
Notes:
(1) T he pu ll- r esistor should be c o nnec te d to the same supply voltage as the confiur a tion dev ic e.
(2) A ll p ull-up resis tor s are 1 k¾.
FLEX 8000 Device 1
"0"
"0"
"0"
Configuration
Device 1
VCC
nCS
OE
DCLK
nS/P
MSEL1
MSEL0
DATA0
nCONFIG
CONF_DONE
nSTATUS
DCLK
nCASC
DATA
VCC
(2)
VCC
VCC
FLEX 8000 Device 2
"0"
"1"
"0"
nS/P
MSEL1
MSEL0
DCLK
DATA0
nCONFIG
CONF_DONE
nSTATUS
FLEX 8000 Device 3
"0"
"1"
"0"
nS/P
MSEL1
MSEL0
DCLK
DATA0
nCONFIG
CONF_DONE
nSTATUS
Configuration
Device 2
nCS
OE
DCLK
DATA
VCC
VCC
VCC
(2) (2)
(2)
(1)(1)
(1)
(1)
(1)
(2)
(2)
(1)
(1)
16 Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
Table 5 describes the pin functions of all configuration devices during
FLEX 8000 device configuration.
Notes:
(1) This packa ge is available for EPC1, EPC1441, EPC 1213 , EPC1064, and EPC1064V devi ces only .
(2) This packa ge is availab le fo r EPC1441, EPC1064, and EPC 1064V devices only.
(3) The EPC 1441, EPC1064, an d EPC1 064V device s do not support data cascading. The EPC1 and EPC1 213 devic e s
support data cascading for FLEX 8000 devices.
fFor more information on FLEX 8000 device configuration, see the
following documents:
Application Note 33 (Confi gurin g FLEX 8000 Device s)
Application Note 38 (Configuring Multiple FLEX 8000 Devices)
Table 5. Configuration Device Pin Functions During FLE X 8000 Device Configurat ion
Pin N ame Pin N umber Pin
Type Description
8-Pin
PDIP (1) 20-Pin
PLCC 32-Pin
TQFP (2)
DATA 12 31 Output Serial data output. The DATA pin is tri-stated before
configuration when the nCS pin is high and after the
configuration device finishes sending its configuration
data. This operation is independent of the devices
position in the cascade chain.
DCLK 24 2Input DCLK is a clock input when us ing EPC1, EPC1213,
EPC1064, and EPC1064V configuration devices. Rising
edges on DCLK increment the internal address counter
and present the next bit of data to the DATA pin. The
counter is incremented only if the OE input is held high,
the nCS input is held low, and all configuration data has
not been transferred to the target device.
OE 38 7Open-
Drain
I/O
Output enable (active high) and reset (active low). A low
logic level resets the address counter. A high logic level
enables DATA and permits the address counter to count.
nCS (3) 4 9 10 Input Chip-select input (active low). A low input allows DCLK to
increment the address counter and enables DATA.
nCASC 6 12 15 Output Cascade-select output (active low). This output goes low
when the address counter has reached its maximum
value. The nCASC output is usually connected to the nCS
input of the next dev ice in a configuration chain, so the
next DCLK clocks data out of the next device.
VCC 7, 8 20 27 Power Power pin.
GND 5 10 12 Ground Ground pin. A 0.2-µF decoupling capacitor must be
placed between the VCC and GND pins.
Altera Corporation 17
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Power &
Operation
This section describes Power-On Reset (POR) delay, error detection, and
3.3-V and 5.0-V o perati on of Alte ra conf iguration dev ices.
Power-On Reset
During initial power-up, a POR delay occurs to permit voltage levels to
stabilize. When configuring an ACEX 1K, APEX 20K, FLEX 10K,
FLEX 6000, or Mercury device with an EPC2, EPC1, or EPC1441 device,
the PO R del ay occ u rs ins ide the configura tion device, and t he P OR delay
is a maximum of 100 ms. When configuring a FLEX 8000 device with an
EPC1213, EP C1064, or EPC1064 V device, the POR delay occurs inside the
FLEX 8000 device, and the POR delay is typically 100 ms, with a
maximum of 200 ms.
Error Detection Circuitr y
The EPC2, EPC1, and EPC1441 configuration devices have built-in error
detection circuitry for configuring ACEX 1K, APEX 20K, FLEX 10K,
FLEX 6000, and Mercury devices only.
Built-in error-detection circuitry uses the nCS pin of the configuration
device, whic h monit ors the CONF_DONE pin on the A CEX 1K, APEX 20K,
FLEX 10K, FLEX 6000, or Mercury device. An error condition occurs if the
CONF_DONE pin does n ot go high after all t he config uration data has b een
sent, or if the CONF_DONE pin goes high before the configuration device
has c omplete d send ing c onfiguration data. When an error condition
occu rs, the con figu ration device driv es its OE pin low, which drives th e
ACEX 1K, AP EX 20K, FLEX 10K , FLEX 6000 , or Merc ury devices
nSTATUS pin low, indicating an error. After an error, configuration
automa tic a lly rest a rts if the Auto-Restart Configuration on Frame Error
option is turned on in the G lob al Pr oje ct Devic e Options dialog bo x
(Assign menu) in the MAX+PLUS II software. For APEX 20K and
Mercury devi ce s, the Quar tus soft wa re prov ides a simila r option.
In additi on, if the ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000, or
Mercury device detects a cyclic redu ndancy code (CRC) error in the
received data, it may also flag the error by driving nSTATUS low. This low
signal on nSTATUS resets the configuration device, allowing
reconfiguration. CRC checking is performed when configuring all
ACEX 1K, APEX 20K, FL EX 10K, FL EX 6000, and Mercury de vic es .
18 Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
3.3-V or 5.0-V Operation
EPC2, EPC1, and EPC1441 devices can configure 5.0-V, 3.3-V, or 2.5-V
devices. For each configuration device, an option must be set for 5.0-V or
3.3-V operation. For EPC1 and EPC1441 configuration devices, the Use
Low-Voltage Configuration EPROM option in the Global Proje c t Device
Options dialog box (Assign menu) in the MAX+PLUS II software sets this
parameter. (For APEX 20K and Mercury devices, the Quartus software
provides a similar option.) For EPC 2 devices, this option is set externa lly
by the VCCSEL pin. In addition, the EPC2 device has an externally
contro lled option, set by the VPPSEL pin, to adjust the programming
voltage to 5.0 V or 3.3 V.
The functions of the VCCSEL and VPPSEL pins are describe d below.
VCCSEL pinFor EPC2 configu r at ion dev ice s, 5.0- V or 3.3-V
operation is controlled by the VCCSEL option pin. The device
functions in 5.0-V mode when VCCSEL is connected to GND; the
device functions in 3.3-V mode when VCCSEL is connected to VCC.
VPPSEL pinThe EPC2 VPP programming power pin is normally
tied to VCC. For EPC2 devices operat ing wi th a 3.3-V suppl y, it is
possible to improve EPC2 in-system programming times by
providing VPP with a 5.0-V supply. For all other devices, VPP must be
tied to VCC. The EPC2 devices VPPSEL pin must be set in accordance
with the EPC2 VPP pin. If the VPP pin is supplied by a 5.0-V supply,
VPPSEL must be connected to GND; if the VPP pin is supplied by a
3.3-V power supply, VPPSEL must be connected to VCC.
Table 6 describes the r elationship between th e VCC and VPP voltage levels
and the required logi c leve l for VCCSEL and VPPSEL (i.e., high or low
logic level).
Table 6. VCCSEL & VPPSEL Pin Functio ns on the EPC2
VCC Voltage Level
(V) VPP Voltage Level
(V) VCCS EL Pi n Logic
Level V PPSEL Pin Log ic
Level
3.3 3.3 High High
3.3 5.0 High Low
5.0 5.0 Low Low
Altera Corporation 19
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
For EPC1 an d EP C14 41 con figu r at ion devi ces , 3.3 -V or 5.0-V operation is
controlled by a progr amming b it in t he POF. The pr ogra mming bit v alue
is determined by the core supply volt age of the targeted device during
design comp il at ion w it h th e MA X+P LUS II software. Fo r exa m ple, EP C1
devices are programmed automatically to operate in 3.3-V mode when
configuring FLEX 10KA devices, which have a VCC voltage of 3.3 V. In this
example, the EPC1 devices VCC pin is connected to a 3.3-V power supply.
Designe rs may choose to set th e configuration device for low voltage
when using the MultiVoltTM feature, which allows an ACEX, APEX, FLEX,
or Mercury device to bridge between systems operating with different
voltages. When compiling for 3.3-V FLEX 6000 devices, set the
configuration device for low -vol t age o peration. To set the EPC1 and
EPC1441 configuration devices for low-voltage operation, turn on the
Low-Voltage I/O option in the Global Project Device Options dialog box
(Assign menu) in the MAX+PLUS II software.
Configuration Chain with Mult iple Voltage Levels
An EPC2 or EPC1 device can configure a device chain with multiple
voltage levels. All 3.3-V and 2.5-V ACEX, APEX, FLEX, and Mercury
devices can be dri ven by higher-v olt ag e signa ls.
When config uring a mixed-v oltage dev ice chain , the ACEX, APEX, FLEX
and Mercury devices VCCINT and VCCIO pins may be connected to 2.5 V,
3.3 V, or 5.0 V, depending upon the device. The configuration device may
be powe red a t 3.3 V or 5.0 V. If an EPC1, EP C144 1, E PC121 3, EP C1064 , or
EPC1064V configuration device is powered at 3.3 V, the nSTATUS and
CONF_DONE pull-up resistors must be connected to 3.3 V. If these
configuration devices are powered at 5.0 V, the nSTATUS and CONF_DONE
pull-up resistors must be connected to 3.3 V or 5.0 V.
At 3.3-V operation, all EPC2 inputs are 5.0-V tolerant, except DATA, DCLK,
and nCASC. The DATA, DCLK, and nCEO pins are used only to interface
between the EPC2 and the ACEX 1K, APEX 20K, FLEX 10K, FLEX 6000, or
Mercury dev ice it is configuring. The voltage tolerances of all EPC2 pins
at 5.0 V and 3.3 V are listed in Table 7.
Table 7. EPC2 I nput & Bidirectional Pin Voltage Tole rance
Pin 5.0-V Operatio n 3.3-V Operation
5.0-V
Tolerant 3.3-V
Tolerant 5.0-V
Tolerant 3.3-V
Tolerant
DATA vv v
DCLK vv v
20 Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
fFor mo re informat ion on ACE X 1K, APEX 20K, FLEX 10K , FLEX 8000,
FLEX 6000, and Mercury devices, see the following document s:
ACEX 1K Programmable Logic Device Family Data Sheet
APE X 20K Prog ra m m able Logic Device Famil y Da t a She e t
FLEX 10K Embedded Programmable Lo gic Family Data Sheet
FLEX 10 KE Embedded Programmable Logic Family Data Sheet
FLEX 8000 Programmab le Logic Device Fa mily Data Sheet
FLEX 6000 Programmable Logi c Device Family Data Sheet
Mercury Programmable Log i c Device Family Data Shee t
Programming
& Configuration
File Support
The Quartus and MAX+PLUS II development systems provide
programm ing support for A ltera config uration devices. The Qua rtus and
MAX+PLUS II software automatically generates a POF to program each
con figuration device in a project. In a mult i-dev ice pro ject , the soft ware
can c ombine the programmin g files for m ultiple ACEX, APEX, FLEX, or
Mercury devices into one or more configuration devices. The software
allows you to select the appropriate configuration device to most
efficiently store the data for each ACEX, APEX, FLEX, and Mercury
device. Moreover, when compiling for ACEX 1K, FLEX 10KA,
FLEX 10KE, or Mercury devices, the MAX+PLUS II software
automatically defaults to generate the EPC1 or EPC1441 POF with the
programming bit set for 3.3-V operation.
All Altera configuration devices are programmab le using Altera
programming hardware in conjunction with the Quartus or
MAX+PLUS II software. In addition, many manufacturers offer
program ming har dware that supports other A ltera con figuration dev ices.
nCASC vv v
OE vvv v
nCS vvv v
VCCSEL vvv v
VPPSEL vvv v
nINIT_CONF vvv v
TDI vvv v
TMS vvv v
TCK vvv v
Table 7. EPC2 Input & Bidirectional Pin Voltage Tolerance
Pin 5.0-V Operat ion 3.3-V Operation
5.0-V
Tolerant 3.3-V
Tolerant 5.0-V
Tolerant 3.3-V
Tolerant
Altera Corporation 21
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
The EPC2 con figuration devi ce can be progra mmed in-system t hrough its
industry-standard 4-pin JTAG interface. ISP capability in the EPC2
provides ease in prototyping and updating ACEX, APEX, FLEX, and
Mercury device functionality. The EPC2 configurat ion device ca n be
programmed in-system via test equipment u sing SVF Files, Jam STAPL
Files (.jam), or Jam STAPL Byte-Code Files (.jbc), embedded processors
using the Jam programming and test language, and the MAX+PLUS II
software via the MasterBlaster, ByteBlasterMV, or BitBlaster download
cables. When programming multipl e EP C2 d evices in a JTAG chain, the
Quartus and MAX+PLUS II sof tware and other progra mmi ng methods
employ concurrent programming to simultaneously program multiple
devices and reduce programming time. EPC2 devices can be programmed
and erased up to 100 times.
After programming an EPC2 device in-system, ACEX, APEX, FLEX, or
Mercury device configuration can be initiated by including the EPC2
JTAG configur ation in str uct ion. See Table 8 on page 21.
fFor more information on programming and configuration support, see the
following doc umen ts :
Altera Programming Hardware Data Sheet
Programming Hardware Manufacturers
MasterBlaster Serial/USB Communication s Cable Data Sheet
ByteBlasterMV Parallel Port Download Cable Data Sheet
ByteBlaster Parallel Port Download Cable Data Sheet
BitBlaster Serial Download Cable Data Sheet
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Testing
The EPC2 provides JTAG BST circuitr y that complies with the IEEE Std.
1149.1-1990 specification. JTAG boundary-scan testing can be performed
before or after configuration, but not during configuration. The EPC2
device supports the JTAG instructions shown in Table 8.
The ISP cir cuitry in EPC2 devices is compatible with tools that support the
IEEE Std. 1532. The IEEE Std. 1532 is a standard developed to allow
concurrent ISP between multiple PLD vendors.
Table 8. EPC2 JTAG Instructions
JTAG Instruction Description
SAMPLE/PRELO AD Allows a snapshot of a signal at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins.
EXTEST Allows the external circuitry and board-level interconnections to be tested by forcing a
test pattern at the output pins and capturing results at the input pins.
22 Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
fFor more information, see Application Note 39 (IEEE 1149.1 (JTAG)
Boundary-Scan Testing in Altera Devices).
Figure 9 shows the timing requirements for the JTAG signals.
BYPASS Places the 1-bit bypass register between the TDI and TDO pins, which allows the BST
data to pass synchronously through a selected device to adjacent devices during
normal device operation.
IDCODE Selects the device IDCODE register and places it between TDI and TDO, allowing the
device IDCODE to be serially shifted out of TDO. The device IDCODE for the EPC2 is
shown below:
0000 0001000000000010 00001101110 1
USERCODE Selects the USERCODE register and places it between TDI and TDO, allowing the
USERCODE to be serially shifted out of TDO. The 32-bit USERCODE is a
programmable user-defined pattern.
ISP Instructions These instructions are used when programming an EPC2 device via JTAG ports with
a MasterBlaster, ByteBlaster MV, ByteBlaster, or BitBlaster download cable, or using
a Jam STAPL File (.jam), Jam STAPL Byte-Code File (.jbc), or SVF File via an
embedded processor.
INIT_CONF This function allows the user to initiate the APEX or FLEX configuration process by
tying nINIT_CONF to the APEX or FLEX device(s) nCONFIG pin (s ). Afte r this
instruction is updated, the nINIT_CONF pin is driven low. W hen the Initiate
Configuration instruction is cleared, nINIT_CONF is released, which starts the APEX
or FLEX device configuration. This instruction is used by the MAX+PLUS II software,
Jam STAPL Files, and JBC Files.
Table 8. EPC2 JTAG Instructions
JTAG Instruction Descript ion
Altera Corporation 23
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Figu re 9. EP C2 J TAG Wave forms
Table 9 shows the timing parameters and values for configuration
devices.
Table 9. JTAG Timing Pa r am et ers & Val ue s
Symbol Parameter Min Max Unit
tJCP TCK clock period 100 ns
tJCH TCK clock high time 50 ns
tJCL TCK clock low time 50 ns
tJPSU JTAG port setup time 20 ns
tJPH JTAG port hold time 45 ns
tJPCO JTAG port clock to output 25 ns
tJPZX JTAG port high impedance to valid output 25 ns
tJPXZ JTAG port valid output to high impedance 25 ns
tJSSU Capture register setup time 20 ns
tJSH Capture register hold time 45 ns
tJSCO Update register clock to output 25 ns
tJSZX Update register high-impedance to valid output 25 ns
tJSXZ Update register valid output to high impedance 25 ns
TDO
TCK
tJPZX tJPCO
tJPH
tJPXZ
tJCP
tJPSU
tJCL
tJCH
TDI
TMS
Signal
to Be
Captured
Signal
to Be
Driven
tJSZX
tJSSU tJSH
tJSCO tJSXZ
24 Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
Operating
Conditions
Tables 10 th roug h 17 provide information on absolute maximum ratings,
recommen ded opera ting co ndit ion s, DC operati ng co ndit ion s, and
capacitance for configuration devices.
Table 10. Absolute Maximum Ratings Note (1)
Symbol Parameter Conditions Min Max Unit
VCC Supply voltage With respect to ground (2) 2.0 7.0 V
VIDC input voltage With respect to ground (2) 2.0 7.0 V
IMAX DC VCC or ground current 50 mA
IOUT DC output current, per pin 25 25 mA
PDPower dissipation 250 mW
TSTG Storage temperature No bias 65 150 ° C
TAMB Ambient temperature Under bias 65 135 ° C
TJJunction temperature Under bias 135 ° C
Table 11. Recommended Oper atin g Conditions
Symbol Parameter Conditions Min Max Unit
VCC Supply voltage for 5.0-V operation (3), (4) 4.75 (4.50) 5.25 (5.50) V
Supply voltage for 3.3-V operation (3), (4) 3.0 (3.0) 3.6 (3.6) V
VIInput voltage With respect to ground 0.3 VCC + 0.3
(5) V
VOOutput volta ge 0V
CC V
TAOperating temperature For commercial use 0 70 ° C
For industrial use 40 85 ° C
tRInput rise time 20 ns
tFInput fall time 20 ns
Table 12. DC Operating Conditions
Symbol Parameter Conditions Min Max Unit
VIH High-level input voltage 2.0 VCC + 0.3
(5) V
VIL Low-level input voltage 0.3 0.8 V
VOH 5.0-V mode high-level TTL output voltage IOH = 4 mA DC (6) 2.4 V
3.3-V mode high-level CMOS output
voltage IOH = 0.1 mA DC (6) VCC 0.2 V
VOL Low-level output voltage IOL = 4 mA DC (6) 0.4 V
IIInput leakage current VI = VCC or ground 10 10 µA
IOZ Tri-state output off-state current VO = VCC or gr ound 10 10 µA
Altera Corporation 25
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Notes to tables:
(1) See the Operating Requirements for Altera Devices Data Shee t in this data book.
(2) The minimum DC input is 0.3 V. During transitions, the inputs may undershoot to 2.0 V or overshoot to 7.0 V for
input currents less than 100 mA and periods shorter than 20 ns under no-load conditions.
(3) Numbers in parentheses are for ind us tria l -temperature-range devices.
(4) M aximu m VCC rise time is 100 ms.
(5) Certain EP C2 pins may be driven to 5. 75 V when oper at ed with a 3.3-V VCC. See Table 7 on page 19.
(6) The IOH paramet er refers to high-level TTL or CMOS output curr ent; the IOL parameter refers to low-level TTL or
CMOS o u tput current.
(7) Capacitance is sample-tested only.
Table 13. EPC1213, EPC1064 & EPC1064V Device ICC Supply Current Values
Symbol Parameter Conditions Min Typ Max Unit
ICC0 VCC supply current (standby) 100 200 µA
ICC1 VCC supply current
(during configuration) 10 50 mA
Table 14. EPC2 Device ICC Supply Current Values
Symbol Parameter Conditions Min Typ Max Unit
ICC0 VCC supply current (standby) VCC = 5.0 V or 3.3 V 50 100 µA
ICC1 VCC supply current (during configuration) VCC = 5.0 V or 3.3 V 18 50 mA
Table 15. EPC1 Device ICC Supply Current Values
Symbol Parameter Conditions Min Typ Max Unit
ICC0 VCC supply current (standby) 50 100 µA
ICC1 VCC supply current (during configuration) VCC = 5.0 V 30 50 mA
VCC = 3.3 V 10 16.5 mA
Table 16. EPC1441 Device ICC Supply Current Values
Symbol Parameter Conditions Min Typ Max Unit
ICC0 VCC supply current (standby) 30 60 µA
ICC1 VCC supply current (during configuration) VCC = 5.0 V 15 30 mA
ICC1 VCC supply current (during configuration) VCC = 3.3 V 5 10 mA
Table 17. Capacit ance Note (7)
Symbol Parameter Conditions Min Max Unit
CIN Input pin capacitance VIN = 0 V, f = 1.0 MHz 10 pF
COUT Output pin capacitance VOUT = 0 V, f = 1.0 MHz 10 pF
26 Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
Tables 18 th rou gh 22 show the device configuration parameters for
FLEX 10K, FLEX 8000, and FLEX 6000 devices.
Tabl e 18. ACEX 1K, FLEX 10K & FLEX 6000 Device Config ura tion Pa rame ters Us ing EPC 2 Devi ce s at 5.0 -V
Symbol Parameter Conditions Min Typ Max Unit
tCE OE high to first clock delay 200 ns
tOEZX OE high to data output enabled 50 ns
tCO DCLK to data out delay 20 ns
tMCH DCLK high time for the first device in the
configuration chain 30 50 75 ns
tMCL DCLK low time for the first device in the
configuration chain 30 50 75 ns
fCK Clock frequency 6.7 10 16.7 MHz
tSCH DCLK high time for subsequent devices 30 ns
tSCL DCLK low time for subsequent devices 30 ns
tCASC CLK rising edge to nCASC 20 ns
tCCA nCS to nCASC cascade delay 10 ns
fCDOE CLK to data enable/disable 20 ns
tOEC OE low to CLK disab l e delay 20 ns
tNRCAS OE low (reset) to nCASC delay 25 ns
tNRR OE low time (reset) minimum 100 ns
Tabl e 19. ACEX 1K, APEX 20K , FLEX 10K & Mercu ry Device Co nfiguration Parameter s Using EPC 2 Devices
at 3.3-V
Symbol Parameter Conditions Min Typ Max Unit
tCE OE high to first clock delay 300 ns
tOEZX OE high to data output enabled 80 ns
tCO DCLK to data out delay 30 ns
tMCH DCLK high time for the first device in the
configuration chain 40 65 100 ns
tMCL DCLK low time for the first device in the
configuration chain 40 65 100 ns
fCK Clock frequency 5 7.7 12.5 MHz
tSCH DCLK high time for subsequent devices 40 ns
tSCL DCLK low time for subsequent devices 40 ns
tCASC CLK rising edge to nCASC 25 ns
tCCA nCS to nCASC cascade delay 15 ns
fCDOE CLK to data enable/disable 30 ns
tOEC OE low to CLK disable delay 30 ns
tNRCAS OE low (reset) to nCASC delay 30 ns
tNRR OE low time (reset) minimum 100 ns
Altera Corporation 27
Configuration Devices for A CEX, APEX, FLEX & Mercury Devices Data Sheet
Table 20. ACEX 1K, FLEX 10K & FLEX 6000 Device Configuration Parameters Using EPC1 &
EPC1441 Devices at 5.0-V
Symbol Parameter Conditions Min Typ Max Unit
tCE OE high to first clock delay 200 ns
tOEZX OE high to data output enabled 50 ns
tCO DCLK to data out delay 20 ns
tMCH DCLK high time for the first device in the
configuration chain 30 50 75 ns
tMCL DCLK low time for the first device in the
configuration chain 30 50 75 ns
fCK Clock frequency 6.7 10 16.7 MHz
tSCH DCLK high time for subsequent devices 30 ns
tSCL DCLK low time for subsequent devices 30 ns
tCASC CLK rising edge to nCASC 20 ns
tCCA nCS to nCASC cascade delay 10 ns
fCDOE CLK to data enable/disable 20 ns
tOEC OE low to CLK disable del ay 20 ns
tNRCAS OE low (reset) to nCASC delay 25 ns
tNRR OE low time (reset) minimum 100 ns
Table 21. ACEX 1K, FLEX 10K & FLEX 6000 Device Configuration Parameters Using EPC1 &
EPC1441 Devices at 3.3-V
Symbol Parameter Conditions Min Typ Max Unit
tCE OE high to first clock delay 300 ns
tOEZX OE high to data output enabled 80 ns
tCO DCLK to data out delay 30 ns
tMCH DCLK high time for the first device in the
configuration chain 50 125 250 ns
tMCL DCLK low time for the first device in the
configuration chain 50 125 250 ns
fCK Clock frequency 2 4 10 MHz
tSCH DCLK high time for subsequent devices 50 ns
tSCL DCLK low time for subsequent devices 50 ns
tCASC CLK rising edge to nCASC 25 ns
tCCA nCS to nCASC cascade delay 15 ns
fCDOE CLK to data enable/disable 30 ns
tOEC OE low to CLK disable del ay 30 ns
tNRCAS OE low (reset) to nCASC delay 30 ns
tNRR OE low time (reset) minimum 100 ns
®
Altera, ACEX , APEX, BitBlaster, ByteBlaster, F LEX, Jam, Master Bla ster, MAX+PLUS I I, Mercury, Quartus,
and s pecific device d esignat ions, ar e tradem arks an d/or serv ice mar ks of Alt era Corpor ation i n the Unite d
States and other countries. Altera acknowledges the trademarks of other organizations for their respective
products or services mentioned in this document. Altera products are protected under numerous U.S. and
foreign pat ents and pend ing application s, maskwork rights, and copyrights. Altera warrants performance of
its semiconductor products to current specifications in accordance with Alteras standard warranty, but
reserves t he r ight to make chan ges to any pr oducts and services at any time w ithout notice .
Altera assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by
Altera Corporation. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for
prod ucts or ser vices.
101 Innov a tion Drive
San Jose, CA 95134
(408) 544-7000
http://www.altera.com
Applications Hotline:
(800) 800-EPLD
Customer Marketing:
(408) 544-7104
Literature Services:
lit_req@altera.com
Configuration Devices for AP EX , ACEX, FLEX & Mercur y Devices Data Sheet
28 Altera Corporation
Printed on Recycled Paper.
Tab le 22. FLEX 8000 Device Configura tion Parameters Using EPC1, EPC1441, EPC1213, EPC1064 &
EPC1064V Devices
Symbol Parameter Conditions EPC1064V EPC1064
EPC1213 EPC1
EPC1441 Unit
Min Max Min Max Min Max
tOEZX OE high to DATA output enabled 75 50 50 ns
tCSZX nCS low to DATA output enabled 75 50 50 ns
tCSXZ nCS high to DATA out put disabled 75 50 50 ns
tCSS nCS low setup time to first DCLK rising edge 150 100 50 ns
tCSH nCS low hold time after DCLK rising edge 0 0 0 ns
tDSU Data setup time before rising edge on DCLK 75 50 50 ns
tDH Data hold time after rising edge on DCLK 000ns
tCO DCLK to DATA out delay 100 75 75 ns
tCK Clock period 240 160 100 ns
fCK Clock frequency 4 6 8 MHz
tCL DCLK low time 120 80 50 ns
tCH DCLK high time 120 80 5 0 ns
tXZ OE low or nCS high to DATA output disabled 75 50 50 ns
tOEW OE pulse width to guarantee counter reset 150 100 100 ns
tCASC Last DCLK + 1 to nCASC low delay 90 60 50 ns
tCKXZ Last DCLK + 1 to DATA tri-state delay 75 50 50 ns
tCEOUT nCS hi gh to nCASC high delay 150 100 100 ns