DS05-13103-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
Memory FRAM
CMOS
1 M Bit (128 K × 8)
MB85R1001
DESCRIPTIONS
The MB85R1001 is an FRAM (Ferroelectr ic Random Access Memory) chip in a configuration of 131,072 words
x 8 bits, using the ferroelectric process and silicon gat e CMOS process technologies for fo rming the nonvolatile
memory cells.
Unlike SRAM, MB85R1001 is able to retain data without back-up battery.
The memor y cells used fo r the MB85R1001 has improved at least 1010 times of read/wr ite access, significantly
outperforming FLASH memory and E2PROM in endurance.
The MB85R1001 used a pseudo - SRAM interface compatible with conventional asynchronous SRAM.
FEATURES
Bit configuration : 131,072 words x 8bits
Read/write endurance : 1010 times
Operating power supply voltage : 3.0 V to 3.6 V
Operating temperature range : -20 °C to +85 °C
48-pin, TSOP (1) plastic package
PACKAGE
48-pin plastic TSOP(1)
(FPT-48P-M25)
MB85R1001
2
PIN ASSIGNMENTS
PIN DESCRIPTIONS
Pin name Function
A0 to A16 Address In
I/O1 to I/O8 Data Input/Output
CE1 Chip Enable 1 in
CE2 Chip Enable 2 in
WE Write Enable in
OE Output Enable in
VCC Power Supply
GND Ground
A11
A9
N.C.
A8
A13
WE
CE2
A15
N.C.
VCC
N.C.
N.C.
GND
N.C.
N.C.
VCC
N.C.
A16
A14
A12
A7
A6
A5
A4
OE
N.C.
GND
A10
CE1
N.C.
I/O8
I/O7
I/O6
I/O5
I/O4
VCC
N.C.
I/O3
I/O2
I/O1
N.C.
N.C.
N.C.
A0
A1
GND
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
(FPT-48P-M25)
(TOP VIEW)
MB85R1001
3
BLOCK DIAGRAM
FUNCTION TRUTH TABLE
L = VIL, H = VIH, X can be either VIL or VIH, High-Z = High Impedance
: Latch address at falling edge, : Latch address at rising edge
Operation Mode CE1CE2WE OE I/O1 to I/O8Supply Current
Standby Pre-charge
HXXX
High-Z Standby
(ISB)
XLXX
XXHH
Read LHHL Dout
Operation
(ICC)
Read
(Pseudo SRAM, OE control) LHH
Write L
HLH Din
Write
(Pseudo SRAM, WE control) LH H
Output Disable L H H H High-Z
A0
A16
to
Address Latch.
Row Dec. Ferro Capacitor Cell
Column Dec.
S/A
I/O1 to I/O8
I/O8
I/O1
to
intCEB
intCE2
intWE
intOE
intCE2
intCEB
CE2
intCE2
·
·
·
·
·
WE
OE
CE1
MB85R1001
4
ABSOLUTE MAXIMUM RATINGS
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
RECOMMENDED OPERATING CONDITIONS (VCC = 3.0 V to 3.6 V, TA = 20 °C to +85 °C)
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
Parameter Symbol Rating Unit
Min Max
Supply Voltage VCC 0.5 +4.0 V
Input Voltage VIN 0.5 VCC+0.5 V
Output Voltage VOUT 0.5 VCC+0.5 V
Ambient Temperature TA20 +85 °C
Storage Temperature Tstg 40 +125 °C
Parameter Symbol Value Unit
Min Typ Max
Supply Voltage VCC 3.0 3.3 3.6 V
Input Voltage (high) VIH VCC x 0.8 VCC + 0.5 V
Input Voltage (low) VIL 0.5 0.8 V
Operating Temperature TA20 ⎯+85 °C
MB85R1001
5
ELECTRICAL CHARACTERISTICS
1. DC CHARACTERISTICS (VCC = 3.0 V to 3.6 V, TA = 20 °C to +85 °C)
*1 : Iout : Output current
*2 : All other inputs (CE1, CE2, OE, WE) should be at CMOS levels, i.e., H VCC 0.2 V, L 0.2 V.
Parameter Symbol Test Condition Value Unit
Min Typ Max
Input Leakage Current |ILI|VIN = 0 V to VCC ⎯⎯10 µA
Output Leakage Current |ILO|VOUT = 0 V to VCC,
CE1 = VIH or OE = VIH ⎯⎯10 µA
Supply Current ICC CE1 = 0.2 V, CE2 = VCC0.2 V,
Iout = 0 mA*1⎯⎯10 mA
Standby Current ISB
CE1 VCC0.2 V
10 100 µACE2 0.2 V*2
OE VCC0.2 V, WE VCC0.2 V*2
Output Voltage (high) VOH IOH = 2.0 mA 0.8 x VCC ⎯⎯V
Output Voltage (low) VOL IOL = 2.0 mA ⎯⎯0.4 V
MB85R1001
6
2. AC CHARACTERISTICS
AC TEST CONDITIONS
Supply Voltage : 3.0 V to 3.6 V
Operating Temperature : 20 °C to +85 °C
Input Voltage Amplitude : 0.3 V to 2.7 V
Input Rising Time : 10 ns
Input Falling Time : 10 ns
Input Evaluation Level : 2.0 V / 0.8 V
Output Evaluation Level : 2.0 V / 0.8 V
Output Impedance : 50 pF
(1) Read Operation (VCC = 3.0 V to 3.6 V, TA = 20 °C to +85 °C)
(2) Write Operation (VCC = 3.0 V to 3.6 V, TA = 20 °C to +85 °C)
Parameter Symbol Value Unit
Min Max
Read Cycle Time tRC 250 ns
CE1 Active Time tCA1 210 2,000 ns
OE Active Time tRP 210 2,000 ns
Pre-charge Time tPC 40 ns
Address Setup Time tAS 10 ns
Address Hold Time tAH 50 ns
OE Setup Time tES 10 ns
CE1 Access Time tCE1 100 ns
CE2 Access Time tCE2 100 ns
OE Access Time tOE 100 ns
OE Output Floating Time tOHZ 25 ns
Parameter Symbol Value Unit
Min Max
Write Cycle Time tWC 250 ns
CE1 Active Time tCA1 210 2,000 ns
CE2 Active Time tCA2 210 2,000 ns
Pre-charge Time tPC 40 ns
Address Setup Time tAS 10 ns
Address Hold Time tAH 50 ns
Write Pulse Width tWP 210 ns
Data Setup Time t DS 10 ns
Data Hold Time tDH 50 ns
Write Setup Time tWS 0ns
MB85R1001
7
(3) Power ON/OFF Sequence
* : Condition for power detection circuit to function
3. Pin Capacitance (f = 1 MHz, TA = +25 °C)
4. Reliability
Data retention 10 years (TA = 0 °C to +55 °C)
Access endurance 1010 times (TA = 20 °C to +85 °C)
Parameter Sym-
bol Value Units
Min Typ Max
CE1 LEVEL holding time in Power OFF tpd 85 ⎯⎯ns
CE1 LEVEL holding time in Power ON tpu 85 ⎯⎯ns
Power interval * tpi 0.5 ⎯⎯s
Parameter Symbol Test Condition Value Unit
Min Typ Max
Input Capacitance CIN VIN = GND ⎯⎯10 pF
Output Capacitance COUT VOUT = GND ⎯⎯10 pF
MB85R1001
8
TIMING DIAGRAMS
1. Read Cycle Timing
•CE1, CE2 Control
•OE
Control
CE1
A0 to A16
OE
I/O1 to I/O8
CE2
tRC
tCA1
tCE1
tPC
tCE2
tAS tAH
tES
Valid
tRP
tOE tOHZ High-Z
Valid
CE1
A0 to A16
OE
I/O1 to I/O8
CE2
tAHtAS
Valid
High-Z
Valid
tCA1
tCA2
tRC
tPC
tRP
tOE tOHZ
MB85R1001
9
2. Write Cycle Timing
•CE1, CE2 Control
•WE
Control
tDH
CE1
A0 to A16
WE
Data In
CE2
OE
Valid
tAH
tAS
Valid
tWS tWP
tCA2
tCA1
tWC
tPC
tDS
CE1
A0 to A16
WE
Data In
CE2
OE
tDS
Valid
tAHtAS
Valid
tWC
tCA1
tCA2
tPC
tWP
tDH
MB85R1001
10
POWER ON/OFF SEQUENCE
NOTES ON USE
After IR reflow, the hold of data that was written before IR reflow is not guaranteed.
ORDERING INFOMATION
Part number Package Remarks
MB85R1001PFTN 48-pin plastic TSOP(1)
(FPT-48P-M25)
CE1 > VCC × 0.8*CE1 : Don't Care CE1 > VCC × 0.8*
tpi tputpd
VCC
CE2
3.0 V
1.0 V
VIH (Min)
VIL (Max)
GND
CE1 CE1
VCC
CE2
3.0 V
1.0 V
VIH (Min)
VIL (Max)
GND
* : CE1 (Max) < VCC + 0.5 V
CE2 0.2 V
MB85R1001
11
PACKAGE DIMENTION
48-pin plastic TSOP(1)
(FPT-48P-M25)
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max).
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
2003 FUJITSU LIMITED F48043S-c-2-2
24
1 48
25
LEAD No.
12.40±0.10(.488±.004)
14.00±0.20(.551±.008)
0.08(.003) .006
–.001
+.002
–0.03
+0.05
0.145
"A"
INDEX
12.00±0.10
(.472±.004)
1.13±0.07
0.10±0.05
0.50(.020)
.009
–.002
+.002
–0.04
+0.05
0.22
M
0.10(.004)
0.25(.010) 0.60±0.15
(.024±.006
)
0˚~8˚
Details of "A" part
(.044±.003) (Mounting height)
(Stand off)
(.004±.002)
*
2
*
1
MB85R1001
FUJITSU LIMITED
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F0501
© 2005 FUJITSU LIMITED Printed in Japan