EVAL-ADuM4136EBZ User Guide UG-1019 One Technology Way * P.O. Box 9106 * Norwood, MA 02062-9106, U.S.A. * Tel: 781.329.4700 * Fax: 781.461.3113 * www.analog.com Evaluation Board for the ADuM4136 iCoupler, Dual-Supply, High Voltage, Isolated IGBT Gate Driver FEATURES GENERAL DESCRIPTION 4 A peak drive output capability Output power device resistance: <1 Desaturation protection Isolated fault output Soft shutdown on fault Isolated fault and ready functions Low propagation delay: <50 ns Operating temperature range: -40C to +125C Output voltage range to 35 V Output and input undervoltage lockout (UVLO) Pad placement for multiple switch types Screw terminals for easy connectivity Jumpered enable/disable The EVAL-ADuM4136EBZ evaluation board supports the ADuM4136 single-channel gate driver, which is specifically optimized for driving insulated gate bipolar transistors (IGBTs). Analog Devices, Inc., iCoupler(R) technology provides isolation between the input signal and the output gate driver. EVALUATION KIT CONTENTS EVAL-ADuM4136EBZ evaluation board EQUIPMENT NEEDED The EVAL-ADuM4136EBZ evaluation board facilitates testing of the desaturation circuitry with pads available for standard desaturation detection. The evaluation board has layout locations for three different types of discrete switches, allowing for a wide range of device testing. Screw terminals provide easy access to supplying the secondary side with either a single or dual supply. For complete information about the ADuM4136, refer to the product data sheet that should be consulted in conjunction with this user guide when using the evaluation board. 14754-001 Suggested test equipment Primary side power supply: 0 V to 6 V at 100 mA Secondary side supply: 0 V to 35 V at 250 mA Optional secondary supply: 0 V to 15 V at 250 mA Square wave generator: 0 V to 5 V The ADuM4136 provides operation with voltages of up to 35 V. With a dual-rail supply, the negative rail can go as low as -15 V, providing robust turn off of the IGBT. Figure 1. Picture of the EVAL-ADuM4136EBZ in Stock Configuration PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 5 UG-1019 EVAL-ADuM4136EBZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Initial Configuration .....................................................................3 Evaluation Kit Contents ................................................................... 1 Pad Layout for the Device Under Test (DUT)...........................3 Equipment Needed ........................................................................... 1 Power Connections .......................................................................3 General Description ......................................................................... 1 Input/Output Connections ..........................................................3 Revision History ............................................................................... 2 Bill of Materials ..............................................................................4 Setting Up the EVAL-ADuM4136EBZ .......................................... 3 REVISION HISTORY 7/2016--Revision 0: Initial Version Rev. 0 | Page 2 of 5 EVAL-ADuM4136EBZ User Guide UG-1019 SETTING UP THE EVAL-ADUM4136EBZ INITIAL CONFIGURATION Before the first use, certain steps must be completed to prepare the board for operation. In the stock configuration, the R1 to R6 resistors are not placed. These are the locations of the series external resistors for the charging and discharging paths to VOUT_ON and VOUT_OFF. It is recommended to use 1206 surface-mount resistors with values between approximately 1 and 10 , depending on the load being driven. An actual IGBT or MOSFET can be placed in the provided landing patterns to the right of P1. P1 allows shorting across the series external resistors to observe overshoot and/or allow the user to probe voltage to quantify peak currents. * * case more decoupling is desired. C6 allows for a desaturation blanking capacitor to be placed. Q1, Q2, and Q3 can be populated with TO-252 MOSFETs or IGBTs with the pinout shown in Figure 2. R1 to R6 are gate resistors that control the edges of the outputs. By default, no resistors are installed; these resistors must be populated with low value 1206 resistors, generally in the 1 to 10 range. If the desaturation circuitry is tested, an IGBT or MOSFET must be added to the circuit to allow for the DESAT pin to be pulled down during on times, preventing the desaturation fault. Additionally, C6 (CBLANK), R12 (RBLANK), and D1 must have the appropriate components placed. For details about sizing, refer to the ADuM4136 data sheet. R11 is provided to allow extra DESAT pin blanking current by means of an external pull-up resistor. C7 can provide decoupling for this external pull-up current source, if desired. 1 G Figure 2. IGBT/MOSFET Footprint POWER CONNECTIONS Follow these steps to connect the ADuM4136 evaluation board to the power supply: 1. R13 and R14 come with 10 k resistors in place. These resistors provide pull-ups to the READY and FAULT pins. P2 allows for easy enabling and disabling of the device by means of jumper pins. A silkscreen reminder is included to show which pins to short to enable or disable the device. R8 and R10 allow for easy placement of 50 terminating resistors, if desired. Pins accompany the screw terminals. The user can decide which connection mechanism to use. Do not leave VSS2 floating. It must always be at or less than the potential of GND2. Shorting VSS2 and GND2 is a valid operating point. During operation, if a fault is seen, the FAULT pin is brought low. In this case, the device can be reset by either powering down VDD1 to GND1 and powering back up, or by bringing the RESET pin low then high again. The easiest way to toggle RESET is to remove the jumper on P3 from Pin 2 and Pin 3 and then replace it. An internal pull-down resistor brings RESET low on its own. PAD LAYOUT FOR THE DEVICE UNDER TEST (DUT) Figure 4 shows the top layer artwork for the dual-gate driver circuit. * * 3 E/S 14754-002 2 C/D In the stock configuration, the desaturation circuitry is left open. Before the first use, if desaturation functionality is not used, it is recommended to short the DESAT pin to ground, either by a wire or by placing a 0 resistor in the C6 component pad. Failure to do so results in a desaturation fault being observed on the first rising edge of the output. U1 is the footprint for the ADuM4136. C1, C2, and C5 are 0.1 F bypass capacitors; C3 and C4 are 10 F bypass capacitors. C7 is provided as an extra space in 2. Connect the 5 V or 3.3 V input supply with the positive terminal on VDD1 and the ground on VSS1. Connect the ADuM4136 VDD2 supply voltage (12 V to 35 V) to the VDD2 pin and its return to the VSS2 pin. VSS1 and VSS2 are functionally isolated. The emitter/source of the IGBT/MOSFET is tied to GND2. INPUT/OUTPUT CONNECTIONS The VI+ and VI- pins are complementary metal oxide semiconductor (CMOS) inputs. R8 and R10 are provided in case the user needs to terminate the inputs with a 50 load. R7 and R9 are provided to add damping, if needed. However, in most cases, the 0 resistors in the stock configuration can remain on R7 and R9. The ADuM4136 evaluation board comes with screw terminals for both the input and output connections. These terminals are to facilitate connection options but are not the best option for high performance transient testing. The best measurements performed on the load, whether it is an IGBT or MOSFET or a load capacitor, come from small loop measurements performed right at the load. Using the screw terminals as either the sensing node or for the connection of the load often results in overshoot being observed during measurement. Rev. 0 | Page 3 of 5 UG-1019 EVAL-ADuM4136EBZ User Guide VI+ TP1 GND2 R7 ADuM4136 R8 VI- 1 TP2 R10 VDD1 10k R9 C1 1 10k FAULT RESET 1 READY VSS1 1 VI+ GND2 16 2 VI- VSS2 15 3 VDD1 DESAT 14 4 VSS1 VDD2 13 5 RESET VDD2 12 6 FAULT VOUT 11 7 READY VSS2 10 8 VSS1 VSS2 COL DESAT R11 VDD2 C4 C5 C7 2 2 P1 VSS2 C2 9 D1 C GATE G E R1 C3 R2 2 EMI 2 R3 R5 R6 R4 14754-003 VSS2 GND2 VDD2 1 R12 C6 Figure 3. Schematic of the EVAL-ADuM4136EBZ BILL OF MATERIALS Table 1. Bill of Materials for Stock Board Part Resistor, 10 k, 1206 Resistor, 0 , 1206 ADuM4136 Capacitor, 0.1 F, 25 V, 10%, 1206 Capacitor, 10 F, 50 V, 10%, 1206 Capacitor, 0.1 F, 25 V, 10%, 0402 Not installed 14754-004 Reference R13, R14 R7, R9 U1 C1, C5 C3, C4 C2 R1 to R6, R11, R12, C6, C7, D1, R8, R10 Figure 4. EVAL-ADuM4136EBZ Evaluation Board Top Layer Rev. 0 | Page 4 of 5 UG-1019 14754-005 EVAL-ADuM4136EBZ User Guide Figure 5. EVAL-ADuM4136EBZ Evaluation Board Bottom Layer ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the "Evaluation Board"), you are agreeing to be bound by the terms and conditions set forth below ("Agreement") unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you ("Customer") and Analog Devices, Inc. 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Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. (c)2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG14754-0-7/16(0) Rev. 0 | Page 5 of 5