©2008 Fairchild Semiconductor Corporation Rev. A1, Oct 2008
FQB19N20C/FQI19N20C
FQB19N20C/FQI19N20C
200V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Features
19.0A, 200V, RDS(on) = 0.17 @VGS = 10 V
Low gate charge ( typical 40.5 nC)
Low Crss ( typical 85 pF)
•Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Thermal Characteristics
* When mounted on the minimum pad size recommended (PCB Mount)
Symbol Parameter FQB19N20C / FQI19N20C Units
VDSS Drain-Source Voltage 200 V
IDDrain Current - Continuous (TC = 25°C) 19.0 A
- Continuous (TC = 100°C) 12.1 A
IDM Drain Current - Pulsed (Note 1) 76.0 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 433 mJ
IAR Avalanche Current (Note 1) 19.0 A
EAR Repetitive Avalanche Energy (Note 1) 13.9 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 5.5 V/ns
PD
Power Dissipation (TA = 25°C)* 3.13 W
Power Dissipation (TC = 25°C) 139 W
- Derate above 25°C 1.11 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter Typ Max Units
RθJC Thermal Resistance, Junction-to-Case -- 0.9 °C/W
RθJA Thermal Resistance, Junction-to-Ambient* -- 40 °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W
{
{
{
{
{
{
S
D
G
D2-PAK
FQB Series
I2-PAK
FQI Series
GS
D
GSD
RoHS Compliant
October 2008
QFET
®
Rev. A1, Oct 2008
FQB19N20C/FQI19N20C
©2008 Fairchild Semiconductor Corporation
Electrical Characteristics TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 1.8mH, IAS = 19.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 19.0A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA200 -- -- V
BVDSS
/ TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.24 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 200 V, VGS = 0 V -- -- 10 µA
VDS = 160 V, TC = 125°C -- -- 100 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA2.0 -- 4.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 9.5 A -- 0.14 0.17
gFS Forward Transconductance VDS = 40 V, ID = 9.5 A (Note 4) -- 10.8 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 830 1080 pF
Coss Output Capacitance -- 195 255 pF
Crss Reverse Transfer Capacitance -- 85 110 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 100 V, ID = 19.0 A,
RG = 25
(Note 4, 5)
-- 15 40 ns
trTurn-On Rise Time -- 150 310 ns
td(off) Turn-Off Delay Time -- 135 280 ns
tfTurn-Off Fall Time -- 115 240 ns
QgTotal Gate Charge VDS = 160 V, ID = 19.0 A,
VGS = 10 V
(Note 4, 5)
-- 40.5 53.0 nC
Qgs Gate-Source Charge -- 6.0 -- nC
Qgd Gate-Drain Charge -- 22.5 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 19.0 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 76.0 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 19.0 A -- -- 1.5 V
trr Reverse Recovery Time VGS = 0 V, IS = 19.0 A,
dIF / dt = 100 A/µs (Note 4)
-- 208 -- ns
Qrr Reverse Recovery Charge -- 1.63 -- µC
Rev. A1, Oct 2008©2008 Fairchild Semiconductor Corporation
FQB19N20C/FQI19N20C
Typical Characteristics
0 1020304050
0
2
4
6
8
10
12
VDS = 100V
VDS = 40V
VDS = 160V
Note : ID = 19.0A
VGS, Gate-Source Voltage [V]
QG, Total Gate Charge [nC]
10-1 100101
0
500
1000
1500
2000
2500
3000
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Notes :
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
0.0 0.4 0.8 1.2 1.6 2.0 2.4
10-1
100
101
150
Notes :
1. VGS = 0V
2. 250µ s Pulse Test
25
IDR, Reverse Drain Current [A]
VSD, Source-Drain voltage [V]
0 102030405060
0.0
0.2
0.4
0.6
0.8
VGS = 20V
VGS = 10V
Note : TJ = 25
RDS(ON) [],
Drain-Source On-Resistance
ID, Drain Current [A]
246810
10-1
100
101
150oC
25oC
-55oC
Notes :
1. VDS = 40V
2. 250µ s Pulse Test
ID, Drain Current [A]
VGS, Gate-Source Voltage [V]
10-1 100101
100
101
VGS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
Notes :
1. 250µ s Pulse Test
2. TC = 25
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics
Rev. A1, Oct 2008
FQB19N20C/FQI19N20C
©2008 Fairchild Semiconductor Corporation
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
Notes :
1. Z θJC (t) = 0.90 /W Max.
2. D uty F a cto r, D = t1/t2
3. T JM - T C = PDM * Z θJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZθJC(t), Thermal Response
t1, S q uare W ave Pu lse D uration [sec]
25 50 75 100 125 150
0
5
10
15
20
ID, Drain Current [A]
TC, Case Temperature [ ]
100101102
10-1
100
101
102
10 ms
100 µs
DC
1 ms
Operation in This Area
is Limited by R DS( o n)
Notes :
1. TC
= 25 o
C
2. TJ = 150 oC
3. Singl e Pulse
ID, Drain Current [A]
V
DS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. VGS = 10 V
2. ID
= 9.5 A
RDS(ON), (Normalized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
Notes :
1. VGS = 0 V
2. ID
= 250 µ A
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
TJ, Junction Temperature [o
C]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs Case Temperature
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 11. Transient Thermal Response Curve
t1
PDM
t2
Figure 8. On-Resistance Variation
vs Temperature
Rev. A1, Oct 2008
FQB19N20C/FQI19N20C
©2008 Fairchild Semiconductor Corporation
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
Rev. A1, Oct 2008
FQB19N20C/FQI19N20C
©2008 Fairchild Semiconductor Corporation
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
Rev. A1, Oct 2008
FQB19N20C/FQI19N20C
©2008 Fairchild Semiconductor Corporat
10.00 ±0.20
10.00 ±0.20
(8.00)
(4.40)
1
Dimensions in Millimeters
Mechanical Dimensions
D2 - PAK
Rev. A1, Oct 2008
FQB19N20C/FQI19N20C
©2008 Fairchild Semiconductor Corporation
Mechanical Dimensions
Dimensions in Millimeters
I2 - PAK
FQB19N20C/FQI19N20C
FQB19N20C/FQI19N20C Rev. A1www.fairchildsemi.com
Rev. I37
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Definition of Terms
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