ASM0406CB/0906CB DATA SHEET 6F-3 NO.7, LANE 75, TA-AN ROAD, SEC.1, TAIPEI, TAIWAN, R.O.C. 7576F-3 TEL:886-2-27818277 FAX:886-2-27815779 http://www.aplusinc.com.tw ASM0406CB/0906CB ASM0406CB/0906CB - VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR 1.0 General Description The ASM0406CB/0906CB is very low cost voice synthesizer with 4-bit microprocessor. It has various features including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog timer ( WDT ), voice synthesizer, etc. It consists of 22 instructions in the device. With CMOS technology and halt function can minimize power dissipation. Its architecture is similar to RISC,with two stages of instruction pipeline. It allows all instructions to be executed in a single cycle, except for program branches and data table read instructions (which need two instruction cycles). 1.1 Feature Single power supply can operate from 2.4V through 5.5V Internal Program ROM: 4K x 10-bit 1 sets of 15-bit DPR can access up to 32K x 10 bits data memory space Data Registers: * 64 x 4-bit data RAM (00-1Fh plus 40h-5Fh) * Unbanked special function registers (SFR) range: 20h-3Fh I/O Ports: * PRA: 4-bit I/O Port A (2Bh) * PRB: 2-bit Output Port B (2Dh) On-chip clock generator: Resistive Clock Drive(RM) Timer: 1 * Timer0: a 9-bit auto-reload timer/counter Stack: 2-level subroutine nesting HALT and Release from HALT function to reduce power consumption Watch Dog Timer (WDT) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles Number of instruction: 22 The Voice function can be implemented by microprocessor instruction * One 8-bit COUT output for ASM0406CB/0906CB 1 Rev 1.0 ASM0406CB/0906CB FIGURE 1.1 : Block Diagram of ASM0406CB/0906CB Data Bus[3:0] ROM Latch PCLATCH(8) PCL(4) Stack(12) PC[11:0] (ADDR[14:12]) =000b (2-Level) ADDR[14:0] Instruction Bus [9:0] 1 DPR3,2,1 Instruction Latch 0 ROM_ADDR[14:0] Program (Data) ROM DPR[14:0] Instruction Decoder Control Signal DLATCH(10) ROM_Data[9:0] Data Bus[3:0] Instruction Bus [9:0] Accumlator(4) SRAM ALU(4) Immediate(4) PRA(4) PRB(2) Timer0(9) (64 x 4) Instruction Bus [9:0] PCH(8) 00h-1Fh 40h-5Fh Register(4) enter test mode One-Channel ( Voice synthesizer ) Reset Chip Reset Chip Clock Generator PRASL(4) VDD/GND Power on Reset RESET pin COUT OSC Test select PRA0 P1,P2,P3,P4 weak or strong pull-low for PRA, PRB, PRC COUT 2 Rev 1.0 ASM0406CB/0906CB FIGURE 1.2 : External ROM Map of ASM0406CB/0906CB PC[11:0] 12bit x 2 STACK 15-bit Data Pointer Reset Vector 00000h 00080h Reserved for Testing 00080h-003FFh 00400h Program and data ROM 00000h-00FFFh 00FFFh(4K) Data ROM 00000h-07FFFh 07FFFh(32Kx10-bits) 3 Rev 1.0 ASM0406CB/0906CB 1.2 Pin-Out ASM0406CB/0906CB Pin-Out VDD PRA3-1 PRA0/RESET OSC COUT GND TEST PRB0-1 I I/O Power supply during operation STI I/O port with programmable strong pull-low or weak pull-low or fix-inputStd./O.D. floating capability Output type with standard or Open-Drain output I/O STI I/O port with programmable strong pull-low or weak pull-low or fix-inputStd./O.D. floating capability Output type with standard or Open-Drain output Mask option selected as an external RESET pin with weak pull-low capability I RM mode Oscillator input O Current Output of Audio I Circuit Ground Potential O Enter Test Mode. ( TEST = High ) O Std./O.D. Output type with standard or Open-Drain output 1.3 Application circuit 4 Rev 1.0 ASM0406CB/0906CB 1.4 Bonding Diagram 32K x 10 bit ROM ASM0406CB/0906CB 1 11 CHIP SIZE: X= 1550+80(um) , Y= 1360+80(um) 2 3 4 5 6 7 8 10 9 Substrate must be connected to GND. ASM0406CB/0906CB Pad Location PAD # PAD Name X 1 RA3 -664.92 2 RA2 -664.92 3 RA1 -662.64 4 RA0 -468.24 5 OSC -281.04 6 GND -111.72 Chip Size: X= 1550 + 80 (um), Y=1360 + 80 (um) Y PAD # PAD Name X Y -275.52 7 TEST 105.44 -600.2 -403.64 8 COUT 303.96 -600.2 -600.2 9 VDD 683.04 -600.2 -600.2 10 RB0 664.92 -399.2 -600.2 11 RB1 664.92 -280.8 -600.2 5 Rev 1.0 ASM0406CB/0906CB 1.5 DC Characteristics for ASM0406CB/0906CB SYMBOL VDD PARAMETER OPERATING VOLTAGE Isb SUPPLY CURRENT Iop STANDBY OPERATING INPUT CURRENT /Internal pull low Iih Ioh OUTPUT HIGH CURRENT Iol OUTPUT LOW CURRENT DA CURRENT OUT (FULL SCALE) FREQUENCY STABILITY Cout dF/F dF/F VDD MIN. 2.4 TYP. 3 3 5 3 5 3 5 2 7 3 9 5 -5.2 3 5 3 5 3 5 -3 -8 7 20 4 5.2 Fosc VARIATION MAX. 5.5 1 1 UNIT V uA mA uA CONDITION depending on Freq. 4MHz, RM in HALT Mode 4MHz, RM IO Floating 4MHz, RM in HALT Mode (IO Ports with weak pull-high pull-low) mA -10 10 % -20 20 % 4MHz, RM (IO ports) Fosc(3v- 2.4v) Fosc (3v) VDD=3V, Rosc=850k, 4MHz FIGURE 1.3 : Frequency Range for Rosc in RM mode Resistor(k ohm) 3v Freq.(MHz) 1200 2.92 1000 3.51 820 4.13 560 7.02 R osc & F req. 8 Freq. MHz 7.02 6 4.13 4 3.51 2.92 2 0 0 200 400 600 800 1000 1200 R osc k ohm 6 Rev 1.0 1400