IRFF320 Data Sheet March 1999 2.5A, 400V, 1.800 Ohm, N-Channel Power MOSFET * 2.5A, 400V Formerly developmental type TA17404. Ordering Information PACKAGE 1890.4 Features This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. PART NUMBER File Number * rDS(ON) = 1.800 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Symbol BRAND D IRFF320 TO-205AF IRFF320 NOTE: When ordering, include the entire part number. G S Packaging JEDEC TO-205AF SOURCE DRAIN (CASE) GATE 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 IRFF320 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and Storage Junction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Temperature Range Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFF320 400 400 2.5 10 20 20 0.16 100 -55 to 150 UNITS V V A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. TC = 25oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL Drain to Source Breakdown Voltage BVDSS TEST CONDITIONS VGS = 0V, ID = 250A (Figure 10) MIN TYP MAX UNITS 400 - - V - - 100 nA Gate to Source Leakage Current IGSS VGS = 20V Zero-Gate Voltage Drain Current IDSS VDS = Rated BVDSS , VGS = 0V - - 25 A VDS = 0.8 x Rated BVDSS , VGS = 0V, TJ = 125oC - - 250 A On-State Drain Current (Note 2) VDS > ID(ON) x rDS(ON)MAX , VGS = 10V (Figure 7) 2.5 - - A Gate to Threshold Voltage VGS(TH) ID(ON) VGS = VDS, ID = 250A 2.0 - 4.0 V Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 1.25A (Figures 8, 9) Forward Transconductance (Note 2) Turn-On Delay Time gfs td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time tf Total Gate Charge (Gate to Source + Gate to Drain) Qg(TOT) Gate to Source Charge Qgs Gate to Drain "Miller" Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS - 1.5 1.800 1.7 2.2 - S VDD = 0.5 x Rated BVDSS , ID 2.5A, RG = 9.1, VGS = 10V, RL = 78.2 For VDSS = 200V, RL = 68.2 For VDSS = 175V (Figures 17, 18), MOSFET Switching Times are Essentially Independent of Operating Temperature - 20 40 ns - 25 50 ns - 50 100 ns - 25 50 ns VGS = 10V, ID = 2.5A, VDS = 0.8 x Rated BVDSS , IG(REF) = 1.5mA (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature - 12 15 nC - 6.0 - nC - 6.0 - nC - 450 - pF - 100 - pF VDS 10V, ID = 2.0A (Figure 12) VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) Internal Drain Inductance LD Measured from the Drain Lead, 5mm (0.2in) from Header to Center of Die Internal Source Inductance LS Measured from the Source Lead, 5mm (0.2in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances - 20 - pF - 5.0 - nH - 15 - nH - - 6.25 oC/W - - 175 oC/W D LD G LS S Thermal Resistance Junction to Case RJC Thermal Resistance Junction to Ambient RJA 2 Free Air Operation IRFF320 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier MIN TYP MAX UNITS - - 2.5 A - - 10 A D G S Source to Drain Diode Voltage (Note 2) TJ = 25oC, ISD = 2.5A, VGS = 0V (Figure 13) - - 1.6 V trr TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/s - 450 - ns QRR TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/s - 3.1 - C VSD Reverse Recovery Time Reverse Recovered Charge NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive Rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 40V, starting TJ = 25oC, L = 29.09mH, RG = 50, peak IAS = 2.5A (Figures 15, 16). Typical Performance Curves Unless Otherwise Specified 2.5 1.0 ID , DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 0.2 0 0 50 100 150 2.0 1.5 1.0 0.5 0 25 50 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 75 100 125 150 TC , CASE TEMPERATURE (oC) FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE ZJC, TRANSIENT THERMAL IMPEDANCE 10 0.5 0.2 PDM 1.0 0.1 t1 0.05 t2 0.02 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 0.01 SINGLE PULSE 0.1 10-5 10-4 0.1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 1 10 IRFF320 Typical Performance Curves Unless Otherwise Specified (Continued) 20 6 VGS = 6V 10 1 1ms OPERATION IN THIS REGION IS LIMITED BY rDS(ON) 10ms 100ms 0.1 1 102 10 VGS = 5V 3 2 VGS = 4.5V 1 VGS = 4V 0 103 100 0 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 6 VGS = 6V VGS = 5.5V 4 VGS = 5V 3 2 VGS = 4.5V 1 VGS = 4V VDS > ID(ON) x rDS(ON)MAX 80s PULSE TEST 5 4 3 2 TJ = 125oC 1 TJ = 25oC TJ = -55oC 0 0 0 4 8 12 16 VDS , DRAIN TO SOURCE VOLTAGE (V) 0 20 FIGURE 6. SATURATION CHARACTERISTICS 6 2s PULSE TEST 5 4 VGS = 10V VGS = 20V 3 2 1 2.2 2 4 6 8 ID , DRAIN CURRENT (A) 10 NOTE: Heating effect of 2s pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4 2 4 5 3 VGS , GATE TO SOURCE VOLTAGE (V) 6 12 ID = 1.25A VGS = 10V 1.8 1.4 1.0 0.6 0.2 0 0 1 FIGURE 7. TRANSFER CHARACTERISTICS NORMALIZED DRAIN TO SOURCE ON RESISTANCE rDS(ON) , DRAIN TO SOURCE ON RESISTANCE () 300 FIGURE 5. OUTPUT CHARACTERISTICS ID , ON-STATE DRAIN CURRENT (A) ID , DRAIN CURRENT (A) 80s PULSE TEST VGS = 10V 200 VDS , DRAIN TO SOURCE VOLTAGE (V) VDS , DRAIN TO SOURCE VOLTAGE (V) 5 VGS = 5.5V 4 DC TC = 25oC TJ = MAX RATED SINGLE PULSE 0.01 ID , DRAIN CURRENT (A) ID , DRAIN CURRENT (A) 100s 80s PULSE TEST VGS = 10V 5 10s -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 160 IRFF320 Typical Performance Curves Unless Otherwise Specified (Continued) 1.25 1000 1.15 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A 1.05 0.95 0.85 0.75 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGS 800 600 CISS 400 200 0 -40 40 80 0 160 120 COSS CRSS 0 10 20 30 40 VDS , DRAIN TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 6 100 ISD, SOURCE TO DRAIN CURRENT (A) 80s PULSE TEST 5 TJ = -55oC 4 TJ = 25oC 3 TJ = 125oC 2 1 80s PULSE TEST TJ = 25oC TJ = 150oC 10 TJ = 150oC TJ = 25oC 1.0 0 0 1 3 2 4 ID, DRAIN CURRENT (A) 5 0 6 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 1 2 3 VSD, SOURCE TO DRAIN VOLTAGE (V) FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS, GATE TO SOURCE VOLTAGE (V) gfs, TRANSCONDUCTANCE (S) 50 ID = 2.5A VDS = 80V VDS = 200V VDS = 320V 15 10 5 0 0 4 8 12 16 20 Qg(TOT), TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 4 IRFF320 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN + RG REQUIRED PEAK IAS - VGS VDS IAS VDD VDD DUT tP 0V IAS 0 0.01 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 17. SWITCHING TIME TEST CIRCUIT 0.2F 50% PULSE WIDTH 10% FIGURE 18. RESISTIVE SWITCHING WAVEFORMS VDS (ISOLATED SUPPLY) CURRENT REGULATOR 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50k Qgd 0.3F VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 6 IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRFF320 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 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