VND830SP Double channel high-side driver Features Type RDS(on) IOUT VCC VND830SP 60m(1) 6A(1) 36V 10 1. Per each channel. 1 PowerSO-10 CMOS compatible inputs Open Drain status outputs On-state open-load detection Off-state open-load detection Shorted load protection Undervoltage and overvoltage shutdown Loss of ground protection Very low standby current Reverse battery protection Description The VND830SP is a monolithic device designed in| STMicroelectronicsTM VIPowerTM M0-3 Technology. The VND830SP is intended for driving any type of multiple load with one side connected to ground. The active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects the open-load condition in both the on-state and off-state. In the off-state the device detects if the output is shorted to VCC. The device automatically turns off in the case where the ground pin becomes disconnected. Table 1. Device summary Package PowerSO-10 February 2011 Order codes Tube Tape and reel VND830SP VND830SP13TR Doc ID 7380 Rev 4 1/28 www.st.com 1 Contents VND830SP Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 4 6 2/27 3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16 3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 17 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 19 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 PowerSO-10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Doc ID 7380 Rev 4 VND830SP List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching (VCC = 13V; Tj = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Doc ID 7380 Rev 4 3/27 List of figures VND830SP List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. 4/27 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20 Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 21 PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PowerSO-10 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PowerSO-10 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Doc ID 7380 Rev 4 VND830SP 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram Vcc Vcc CLAMP OVERVOLTAGE UNDERVOLTAGE CLAMP 1 GND OUTPUT1 INPUT1 DRIVER 1 CLAMP 2 STATUS1 CURRENT LIMITER 1 DRIVER 2 LOGIC OUTPUT2 OVERTEMP. 1 OPEN LOAD ON 1 CURRENT LIMITER 2 INPUT2 OPEN LOAD OFF 1 OPEN LOAD ON 2 STATUS2 OPEN LOAD OFF 2 OVERTEMP. 2 Figure 2. Configuration diagram (top view) OUTPUT 1 OUTPUT 1 N.C. OUTPUT 2 OUTPUT 2 5 4 3 6 7 8 9 10 GROUND INPUT 1 STATUS 1 STATUS 2 INPUT 2 2 1 11 VCC Table 2. Suggested connections for unused and not connected pins Connection / pin Status N.C. Output Input Floating X X X X To ground X Doc ID 7380 Rev 4 Through 10K resistor 5/27 Electrical specifications VND830SP 2 Electrical specifications 2.1 Absolute maximum ratings Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document. Table 3. Absolute maximum ratings Symbol Value Unit 41 V VCC DC supply voltage -VCC Reverse DC supply voltage - 0.3 V -IGND DC reverse ground pin current - 200 mA IOUT DC output current Internally limited A -IOUT Reverse DC output current -6 A DC input current +/- 10 mA ISTAT DC Status current +/- 10 mA VESD Electrostatic discharge (human body model: R = 1.5 K; C = 100 pF) - INPUT - STATUS - OUTPUT - VCC 4000 4000 5000 5000 V V V V EMAX Maximum switching energy (L = 1.8 mH; RL = 0 ; Vbat = 13.5 V; Tjstart = 150 C; IL = 9 A) 100 mJ Power dissipation (per island) at Tlead = 25 C 73.5 W Internally limited C IIN Ptot Tj Junction operating temperature Tc Case operating temperature - 40 to 150 Storage temperature - 55 to 150 Tstg 6/27 Parameter Doc ID 7380 Rev 4 C VND830SP 2.2 Electrical specifications Thermal data Table 4. Thermal data (per island) Symbol Parameter Rthj-lead Thermal resistance junction-lead Rthj-amb Thermal resistance junction-ambient Value Unit 1.7 C/W 51.7(1) 37(2) C/W 2 1. When mounted on a standard single-sided FR-4 board with 0.5 cm of Cu (at least 35 m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 2.3 Electrical characteristics Values specified in this section are for 8 V < VCC < 36 V; -40 C < Tj < 150 C, unless otherwise stated. Figure 3. Current and voltage conventions IS VF1 (*) IIN1 INPUT 1 ISTAT1 VIN1 IOUT1 OUTPUT 1 STATUS 1 VSTAT1 IIN2 VOUT1 INPUT 2 IOUT2 VIN2 ISTAT2 OUTPUT 2 STATUS 2 VSTAT2 VCC VCC VOUT2 GND IGND Note: VFn = VCCn - VOUTn during reverse battery condition. Doc ID 7380 Rev 4 7/27 Electrical specifications Table 5. Symbol Parameter Operating supply voltage VUSD Test conditions Min. Typ. Max. Unit 5.5 13 36 V Undervoltage shutdown 3 4 5.5 V VOV Overvoltage shutdown 36 RON On-state resistance Supply current V IOUT = 2 A; Tj = 25 C 60 m IOUT = 2 A; VCC > 8 V 120 m Off-state; VCC = 13 V; VIN = VOUT = 0 V 12 40 A Off-state; VCC = 13 V; VIN = VOUT = 0 V; Tj = 25 C 12 25 A On-state; VCC = 13 V; VIN = 5 V; IOUT = 0 A 5 7 mA 0 50 A -75 0 A IL(off1) Off-state output current VIN = VOUT = 0 V IL(off2) Off-state output current VIN = 0 V; VOUT = 3.5 V IL(off3) Off-state output current VIN = VOUT = 0 V; VCC = 13 V; Tj = 125 C 5 A IL(off4) Off-state output current VIN = VOUT = 0 V; VCC = 13 V; Tj = 25 C 3 A Table 6. Symbol Protections Min. Typ. Max. Unit Shutdown temperature 150 175 200 C TR Reset temperature 135 Thyst Thermal hysteresis 7 tSDL Status delay in overload conditions Ilim Current limitation TTSD Vdemag Parameter Test conditions C 15 Tj > TTSD VCC = 13 V 6 9 5.5 V < VCC < 36 V Turn-off output clamp voltage IOUT = 2 A; L = 6 mH C 20 s 15 A 15 A VCC - VCC - VCC 41 48 55 V To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 7. Symbol VF 8/27 Power output VCC IS Note: VND830SP VCC - output diode Parameter Forward on voltage Test conditions -IOUT = 1.3 A; Tj = 150 C Doc ID 7380 Rev 4 Min. Typ. Max. Unit -- -- 0.6 V VND830SP Electrical specifications Table 8. Symbol Switching (VCC = 13V; Tj = 25C) Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 6.5 from VIN rising edge to VOUT = 1.3 V (see Figure 5) -- 30 -- s td(off) Turn-off delay time RL = 6.5 from VIN falling edge to VOUT = 11.7 V (see Figure 5) -- 30 -- s -- See Figure 19 -- V/s -- See Figure 21 -- V/s RL = 6.5 from VOUT = 1.3 V dVOUT/dt(on) Turn-on voltage slope to VOUT = 10.4 V (see Figure 5) dVOUT/dt(off) Turn-off voltage slope Table 9. Symbol Logic inputs Parameter Test conditions VIL Input low level IIL Low level input current VIH Input high level IIH High level input current VI(hyst) Input hysteresis voltage VICL Table 10. Symbol RL = 6.5 from VOUT = 11.7 V to VOUT = 1.3 V (see Figure 5) Min. VIN = 1.25 V Max. Unit 1.25 V 1 A 3.25 V VIN = 3.25 V 10 0.5 IIN = 1 mA Input clamp voltage Typ. A V 6 6.8 IIN = -1 mA 8 -0.7 V V Status pin Parameter Test conditions Min. Typ. Max. Unit VSTAT Status low output voltage ISTAT = 1.6 mA 0.5 V ILSTAT Status leakage current Normal operation; VSTAT = 5 V 10 A CSTAT Status pin Input capacitance Normal operation; VSTAT = 5 V 100 pF 8 V VSCL Status clamp voltage Table 11. ISTAT = 1 mA ISTAT = - 1 mA 6.8 -0.7 V Open-load detection Symbol Parameter IOL Open-load on-state detection threshold VIN = 5 V Open-load on-state detection delay IOUT = 0 A VOL Open-load off-state voltage detection threshold VIN = 0 V tDOL(off) Open-load detection delay at turn-off tDOL(on) 6 Doc ID 7380 Rev 4 Test conditions Min. 50 1.5 Typ. Max. Unit 100 200 mA 200 s 3.5 V 1000 s 2.5 9/27 Electrical specifications Figure 4. VND830SP Status timings OPEN LOAD STATUS TIMING (with external pull-up) IOUT < IOL VOUT > VOL VINn OVER TEMP STATUS TIMING Tj > TTSD VINn VSTATn VSTATn tSDL tDOL(off) Figure 5. 10/27 tDOL(on) Switching characteristics Doc ID 7380 Rev 4 tSDL VND830SP Electrical specifications Table 12. Truth table Conditions Input Output Status Normal operation L H L H H H Current limitation L H H L X X H (Tj < TTSD) H (Tj > TTSD) L Overtemperature L H L L H L Undervoltage L H L L X X Overvoltage L H L L H H Output voltage > VOL L H H H L H Output current < IOL L H L H H L Table 13. Electrical transient requirements Test level ISO T/R 7637/1 Test pulse I II III IV Delays and impedance 1 - 25V(1) - 50V(1) - 75V(1) - 100V(1) 2ms, 10 2 (1) + 50V(1) 75V(1) + 100V(1) 0.2ms, 10 - 50V(1) - 150V(1) 0.1s, 50 + 50V(1) + 100V(1) 0.1s, 50 3a 3b + 25V - 25V(1) + 25V (1) + - 100V(1) + 75V(1) 4 - 4V(1) - 5V(1) - 6V(1) - 7V(1) 5 26.5V(1) 46.5V(2) 66.5V(2) 86.5V(2) + + + + 100ms, 0.01 400ms, 2 1. All functions of the device are performed as designed after exposure to disturbance. 2. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. Doc ID 7380 Rev 4 11/27 Electrical specifications Figure 6. VND830SP Waveforms NORMAL OPERATION INPUTn LOAD VOLTAGEn STATUSn UNDERVOLTAGE VUSDhyst VCC VUSD INPUTn LOAD VOLTAGEn STATUS undefined OVERVOLTAGE VCC<VOV VCC > VOV VCC INPUTn LOAD VOLTAGEn STATUSn OPEN LOAD with external pull-up INPUTn VOUT > VOL LOAD VOLTAGEn VOL STATUSn OPEN LOAD without external pull-up INPUTn LOAD VOLTAGEn STATUSn Tj TTSD TR OVERTEMPERATURE INPUTn LOAD CURRENTn STATUSn 12/27 Doc ID 7380 Rev 4 VND830SP Electrical specifications 2.4 Electrical characteristics curves Figure 7. Off-state output current Figure 8. IL(off1) (uA) High level input current Iih (uA) 2.5 5 2.25 4.5 Off state Vcc=36V Vin=Vout=0V 2 1.75 Vin=3.25V 4 3.5 1.5 3 1.25 2.5 1 2 0.75 1.5 0.5 1 0.25 0.5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) Figure 9. 50 75 100 125 150 175 Tc (C) Input clamp voltage Figure 10. Turn-on voltage slope Vicl (V) dVout/dt(on) (V/ms) 8 800 7.8 700 Iin=1mA 7.6 Vcc=13V Rl=6.5Ohm 600 7.4 500 7.2 7 400 6.8 300 6.6 6.4 200 6.2 100 6 -50 -25 0 25 50 75 100 125 150 175 0 -50 Tc (C) Figure 11. -25 0 25 50 75 100 125 150 175 150 175 Tc (C) Overvoltage shutdown Figure 12. Turn-off voltage slope dVout/dt(off) (V/ms) Vov (V) 600 50 550 48 46 Vcc=13V Rl=6.5Ohm 500 44 450 42 40 400 38 350 36 300 34 250 32 30 200 -50 -25 0 25 50 75 100 125 150 175 Tc (C) -50 -25 0 25 50 75 100 125 Tc (C) Doc ID 7380 Rev 4 13/27 Electrical specifications VND830SP Figure 13. ILIM vs Tcase Figure 14. On-state resistance vs VCC Ilim (A) Ron (mOhm) 20 120 18 Tc=150C 110 Vcc=13V 16 100 90 14 80 12 70 10 60 8 Tc=25C 50 6 40 4 30 Tc= - 40C 20 2 Iout=5A 10 0 -50 -25 0 25 50 75 100 125 150 0 175 5 Tc (C) 10 15 20 25 30 35 40 Vcc (V) Figure 15. Input high level Figure 16. Input hysteresis voltage Vih (V) Vhyst (V) 3.6 1.5 1.4 3.4 1.3 3.2 1.2 1.1 3 1 2.8 0.9 0.8 2.6 0.7 2.4 0.6 0.5 2.2 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 Figure 17. On-state resistance vs Tcase Vil (V) 160 2.6 125 100 125 150 175 2.4 Iout=2A Vcc=8V; 13V & 36V 2.2 100 2 80 1.8 60 1.6 40 1.4 20 1.2 0 -50 -25 0 25 50 75 100 125 150 175 1 Tc (C) 14/27 100 Figure 18. Input low level Ron (mOhm) 120 75 Tc (C) Tc (C) 140 50 -50 -25 0 25 50 75 Tc (C) Doc ID 7380 Rev 4 150 175 VND830SP Electrical specifications Figure 19. Status leakage current Figure 20. Status low output voltage Vstat (V) Ilstat (uA) 0.8 0.05 0.7 Istat=1.6mA 0.04 0.6 Vstat=5V 0.5 0.03 0.4 0.3 0.02 0.2 0.01 0.1 0 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 75 100 125 150 175 Tc (C) Tc (C) Figure 21. Status clamp voltage 50 Figure 22. Open-load on-state detection threshold Iol (mA) Vscl (V) 150 8 140 7.8 Istat=1mA 7.6 Vcc=13V Vin=5V 130 7.4 120 7.2 110 7 100 6.8 90 6.6 80 6.4 70 6.2 60 6 50 -50 -25 0 25 50 75 100 125 150 175 Tc (C) -50 -25 0 25 50 75 100 125 150 175 Tc (C) Figure 23. Open-load off-state detection threshold Vol (V) 5 4.5 Vin=0V 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Doc ID 7380 Rev 4 15/27 Application information 3 VND830SP Application information Figure 24. Application schematic +5V +5V +5V VCC Rprot STATUS1 Dld C Rprot INPUT1 OUTPUT1 Rprot STATUS2 Rprot INPUT2 OUTPUT2 GND RGND VGND 3.1 DGND GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 Solution 1: a resistor in the ground line (RGND only) This can be used with any type of load. The following show how to dimension the RGND resistor: 1. RGND 600 mV / 2 (IS(on)max) 2. RGND (-VCC) / (-IGND) where - IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0 during reverse battery situations) is: PD = (-VCC)2/ RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. 16/27 Doc ID 7380 Rev 4 VND830SP Application information Please note that, if the microprocessor ground is not shared by the device ground, then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high-side drivers sharing the same RGND . If the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then ST suggests using solution 2 below. 3.1.2 Solution 2: a diode (DGND) in the ground line A resistor (RGND = 1 k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (600 mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. 3.2 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than those shown in the ISO T/R 7637/1 table. 3.3 MCU I/O protection If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from latching up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os: - VCCpeak / Ilatchup Rprot (VOHC - VIH - VGND) / IIHmax Example For the following conditions: VCCpeak = -100 V Ilatchup 20 mA VOHC 4.5 V 5 k Rprot 65 k. Recommended values are: Rprot = 10 k Doc ID 7380 Rev 4 17/27 Application information 3.4 VND830SP Open-load detection in off-state Off-state open-load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1. No false open-load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT = (VPU / (RL + RPU))RL < VOlmin. 2. No misdetection when load is disconnected: in this case the VOUT has to be higher than VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2). Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in standby. Figure 25. Open-load detection in off-state V batt. VPU VCC RPU INPUT DRIVER + LOGIC IL(off2) OUT + STATUS R VOL GROUND 18/27 Doc ID 7380 Rev 4 RL VND830SP 3.5 Application information Maximum demagnetization energy (VCC = 13.5V) Figure 26. Maximum turn-off current versus load inductance I LM AX (A) 100 10 A B C 1 0,1 1 10 100 L(mH) A = single pulse at TJstart = 150C B= repetitive pulse at TJstart = 100C C= repetitive pulse at TJstart = 125C VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL = 0 . In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Doc ID 7380 Rev 4 19/27 Package and PCB thermal data VND830SP 4 Package and PCB thermal data 4.1 PowerSO-10 thermal data Figure 27. PowerSO-10 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 m, Copper areas: from minimum pad lay-out to 8cm2). Figure 28. Rthj-amb vs PCB copper area in open box free air condition RTHj_amb (C/W) 55 Tj-Tamb=50C 50 45 40 35 30 0 2 4 6 PCB Cu heatsink area (cm^2) 20/27 Doc ID 7380 Rev 4 8 10 VND830SP Package and PCB thermal data Figure 29. Thermal impedance junction ambient single pulse Equation 1: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10 Tj_1 C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd1 Tj_2 C1 C2 R1 R2 Pd2 T_amb Doc ID 7380 Rev 4 21/27 Package and PCB thermal data Table 14. 22/27 VND830SP Thermal parameters Area / island (cm2) Footprint R1 (C/W) 0.15 R2 (C/W) 0.8 R3 (C/W) 0.7 R4 (C/W) 0.8 R5 (C/W) 12 R6 (C/W) 37 C1 (W.s/C) 0.0006 C2 (W.s/C) 2.1E-03 C3 (W.s/C) 0.013 C4 (W.s/C) 0.3 C5 (W.s/C) 0.75 C6 (W.s/C) 3 Doc ID 7380 Rev 4 6 22 5 VND830SP Package and packing information 5 Package and packing information 5.1 ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 PowerSO-10 package information Figure 31. PowerSO-10 package dimensions B 0.10 A B 10 H E E E2 1 SEATING PLANE e B DETAIL "A" A C 0.25 h E4 D = D1 = = = SEATING PLANE A F A1 A1 L DETAIL "A" Doc ID 7380 Rev 4 23/27 Package and packing information Table 15. VND830SP PowerSO-10 mechanical data mm. DIM. Min. Max. A 3.35 3.65 A(1) 3.4 3.6 A1 0 0.10 B 0.40 0.60 B(1) 0.37 0.53 C 0.35 0.55 C(1) 0.23 0.32 D 9.40 9.60 D1 7.40 7.60 E 9.30 9.50 E2 7.20 7.60 E2(1) 7.30 7.50 E4 5.90 6.10 E4(1) 5.90 6.30 e 1.27 F 1.25 1.35 F(1) 1.20 1.40 H 13.80 14.40 H(1) 13.85 14.35 h 0.50 L 1.20 1.80 L(1) 0.80 1.10 0 8 (1) 2 8 1. Muar only POA P013P. 24/27 Typ. Doc ID 7380 Rev 4 VND830SP 5.3 Package and packing information PowerSO-10 packing information Figure 32. PowerSO-10 suggested Figure 33. PowerSO-10 tube shipment pad layout (no suffix) B CASABLANCA MUAR C C A A B All dimensions are in mm. Casablanca Muar Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) 50 1000 532 10.4 16.4 0.8 50 1000 532 4.9 17.2 0.8 Figure 34. PowerSO-10 tape and reel shipment (suffix "TR") Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 600 600 330 1.5 13 20.2 24.4 60 30.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) All dimensions are in mm. 24 4 24 1.5 1.5 11.5 6.5 2 End Start Top cover tape No components Components No components 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed Doc ID 7380 Rev 4 25/27 Revision history 6 VND830SP Revision history Table 16. Document revision history Date Revision 09-Sep-2004 1 Initial release. 03-Mar-2008 2 Current and voltage convention update (page 2). Configuration diagram (top view) & suggested connections for unused and n.c. pins insertion (page 2). 6 cm2 Cu condition insertion in thermal data table (page 3). VCC - output diode section update (page 4). Protections note insertion (page 4). Revision history table insertion (page 18). Disclaimers update (page 19). 09-Dec-2008 3 Document reformatted and restructured. Added contents, list of tables and figures. Added Section 5.1: ECOPACK(R) packages information. 4 Changed document template. Updated Figure 5: Switching characteristics Updated Table 8: Switching (VCC = 13V; Tj = 25C) 07-Feb-2011 26/27 Changes Doc ID 7380 Rev 4 VND830SP Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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