DM9334J/883 - National Semiconductor

TL/F/6609

9334/DM9334 8-Bit Addressable Latch

June 1989

9334/DM9334 8-Bit Addressable Latch

General Description

The DM9334 is a high speed 8-bit Addressable Latch de-

signed for general purpose storage applications in digital

systems. It is a multifunctional device capable of storing sin-

gle line data in eight addressable latches, and being a one-

of-eight decoder and demultiplexer with active level high

outputs. The device also incorporates an active level low

common clear for resetting all latches, as well as an active

level low enable.

The DM9334 has four modes of operation which are shown

in the mode selection table. In the addressable latch mode,

data on the data line (D) is written into the addressed latch.

The addressed latch will follow the data input with all non-

addressed latches remaining in their previous states. In the

memory mode, all latches remain in their previous state and

are unaffected by the data or address inputs.

In the one-of-eight decoding or demultiplexing mode, the

addressed output will follow the state of the D input with all

other inputs in the low state. In the clear mode all outputs

are low and unaffected by the address and data inputs.

When operating the device as an addressable latch, chang-

ing more than one bit of the address could impose a tran-

sient wrong address. Therefore, this should only be done

while in the memory mode.

The function tables summarize the operation of the product.

Features

YCommon clear

YEasily expandable

YRandom (addressable) data entry

YSerial to parallel capability

Y8 bits of storage/output of each bit available

YActive high demultiplexing/decoding capability

YAlternate Military/Aerospace device (9334) is available.

Contact a National Semiconductor Sales Office/Distrib-

utor for specifications.

Connection Diagram

Dual-In-Line Package

TL/F/6609–1

Order Number 9334DMQB, 9334FMQB, DM9334J or DM9334N

See NS Package Number J16A, N16E or W16A

C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Note)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales

Office/Distributors for availability and specifications.

Supply Voltage 7V

Input Voltage 5.5V

Operating Free Air Temperature Range

Military b55§Ctoa

125§C

Commercial 0§to a70§C

Storage Temperature Range b65§Ctoa

150§C

Note:

The ‘‘Absolute Maximum Ratings’’ are those values

beyond which the safety of the device cannot be guaran-

teed. The device should not be operated at these limits. The

parametric values defined in the ‘‘Electrical Characteristics’’

table are not guaranteed at the absolute maximum ratings.

The ‘‘Recommended Operating Conditions’’ table will define

the conditions for actual device operation.

Recommended Operating Conditions

Symbol Parameter Military Commercial Units

Min Nom Max Min Nom Max

VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V

VIH High Level Input Voltage 2 2 V

VIL Low Level Input Voltage 0.8 0.8 V

IOH High Level Output Current b0.8 b0.8 mA

IOL Low Level Output Current 16 16 mA

tWENABLE Pulse Width 19 13 19 13 ns

(Fig. 1) (Note 4)

tSU Setup Time Data 1 (Fig. 4) 20 13 20 13

(Note 4) Data 0 (Fig. 4) 20 14 20 14 ns

Address (Fig. 6) 10 5 10 5

(Note 1)

tHHold Time Data 1 (Fig. 4) 0 b10 0 b10 ns

(Note 4) Data 0 (Fig. 4) 0 b13 0 b13

TAFree Air Operating Temperature b55 125 0 70 §C

Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units

(Note 2)

VIInput Clamp Voltage VCC eMin, IIeb

12 mA b1.5 V

VOH High Level Output VCC eMin, IOH eMax 2.4 3.6 V

Voltage VIL eMax, VIH eMin

VOL Low Level Output VCC eMin, IOL eMax 0.2 0.4 V

Voltage VIH eMin, VIL eMax

IIInput Current @Max VCC eMax, VIe5.5V 1mA

Input Voltage

IIH High Level Input VCC eMax E Input 60 mA

Current VIe2.4V Others 40

IIL Low Level Input VCC eMax E Input b2.4 mA

Current VIe0.4V Others b1.6

IOS Short Circuit VCC eMax MIL b30 b100 mA

Output Current (Note 3) COM b30 b100

ICC Supply Current VCC eMax 56 86 mA

Note 1: The ADDRESS setup time is the time before the negative ENABLE transition that the ADDRESS must be stable so that the correct latch is addressed

without affecting the other latches.

Note 2: All typicals are at VCC e5V, TAe25§C.

Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.

Note 4: TAe25§C and VCC e5V.

Switching Characteristics at VCC e5V and TAe25§C (See Section 1 for Test Waveforms and Output Load)

Symbol Parameter From (Input) RLe400X,C

Le15 pF Units

To (Output) Min Max

tPLH Propagation Delay Time Enable to 28 ns

Low to High Level Output Output, Fig. 1

tPHL Propagation Delay Time Enable to 27 ns

High to Low Level Output Output, Fig. 1

tPLH Propagation Delay Time Data to 35 ns

Low to High Level Output Output, Fig. 2

tPHL Propagation Delay Time Data to 28 ns

High to Low Level Output Output, Fig. 2

tPLH Propagation Delay Time Address to 35 ns

Low to High Level Output Output, Fig. 3

tPHL Propagation Delay Time Address to 35 ns

High to Low Level Output Output, Fig. 3

tPHL Propagation Delay Time Clear to 31 ns

High to Low Level Output Output, Fig. 5

Function Tables

E C Mode

L H Addressable Latch

H H Memory

L L Active High Eight

Channel Demultiplexer

H L Clear

Inputs Present Output States Mode

C E DA0A1A2 Q0 Q1 Q2 Q3 Q4Q5 Q6 Q7

L H X X X X L L L L L L L L Clear

LLL L L L L L L L L L L L

LLHLLL H L L L LL L L

LLL H L L L L L L L L L L

LLHH L L L H L L L L L L

### # # Demultiplex

### # #

LLHHHH L L L L L L L H

HHXXXXQ

1Memory

HLLLLL L Q

HLH L L L H Q

HLL H L L Q

1LQ

HLH H L L Q

1HQ

1Addressable

### # # Latch

### # #

HLLHHHQ

HLH H H H Q

Don’t Care Condition

LeLow Voltage Level

HeHigh Voltage Level

QNb1ePrevious Output State

Logic Diagram

9334

TL/F/6609–2

Switching Time Waveforms

TL/F/6609–3

Other Conditions: C eH, A eStable

Figure 1

TL/F/6609–4

Other Conditions: E eL, C eH, A eStable

Figure 2

TL/F/6609–5

Other Conditions: E eL, C eL, D eH

Figure 3

TL/F/6609–6

Other Conditions: C eH, A eStable

Figure 4

TL/F/6609–7

Other Conditons: E eH

Figure 5

TL/F/6609–8

Other Conditions: C eH

Figure 6

Note: The shaded areas indicate when the inputs are permitted to change for predictable output performance.

Physical Dimensions inches (millimeters)

16-Lead Ceramic Dual-In-Line Package (J)

Order Number 9334DMQB or DM9334J

NS Package Number J16A

16-Lead Molded Dual-In-Line Package (N)

Order Number DM9334N

NS Package Number N16E

9334/DM9334 8-Bit Addressable Latch

Physical Dimensions inches (millimeters) (Continued)

16-Lead Ceramic Flat Package (W)

Order Number 9334FMQB

NS Package Number W16A

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be reasonably expected to result in a significant injury

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