TC74VHC393F/FN/FT/FK
2008-06-01
1
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC393F,TC74VHC393FN,TC74VHC393FT,TC74VHC393FK
Dual Binary Counter
The TC74VHC393 is an advanced high speed CMOS 4-BIT
BINARY COUNTER fabricated with silicon gate C2MOS
technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
It contains two independent counter circuits in one package, so
that counting or frequency division of eight binary bits can be
achieved with one IC.
This device changes state on the negative going transition of
the CLOCK pulse. The counter can be reset to “0” (QA to QD =
“L”) by a high at the CLEAR input regardless of other inputs.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Features
• High speed: fmax = 170 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Power down protection is provided on all inputs.
• Balanced propagation delays: tpLH ∼
−
tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Low noise: VOLP = 0.8 V (max)
• Pin and function compatible with 74ALS393
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74VHC393F
TC74VHC393FN
TC74VHC393FT
TC74VHC393FK
Weight
SOP14-P-300-1.27A : 0.18 g (typ.)
SOL14-P-150-1.27 : 0.12 g (typ.)
TSSOP14-P-0044-0.65A : 0.06 g (typ.)
VSSOP14-P-0030-0.50 : 0.02 g (typ.)
TC74VHC393F/FN/FT/FK
2008-06-01
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Pin Assignment IEC Logic Symbol
Truth Table
Inputs Outputs
CK CLR QA QB QC QD
X H L L L L
L Count Up
L No Change
X: Don’t care
System Diagram
VCC
2CLR
2QA
14
13
12
11
10
1
2
3
4
5
6
7
1QA
1QB
1QC
1QD
GND
2QB
8
9 2QC
2QD
(top view)
1CLR
CK1
CK2
CTRDIV 16
(2)
+
CK1
(12)
(1)
2CLR
(3)
(5)
(11)
(4)
(6)
(10)
0
CT = 0
(13)
CK2
(9)
(8)
1CLR
3
CT
1QA
1QB
1QC
1QD
2QA
2QB
2QC
2QD
CK
CLR
1/13
3/11
CK Q
D
QA
2/12
4/10
CK Q
D
QB
RR
5/9
CK Q
D
QC
6/8
CK Q
D
QD
R R
TC74VHC393F/FN/FT/FK
2008-06-01
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Timing Chart
Absolute Maximum Ratings (Note)
Characteristics Symbol Rating Unit
Supply voltage range VCC −0.5 to 7.0 V
DC input voltage VIN −0.5 to 7.0 V
DC output voltage VOUT −0.5 to VCC + 0.5 V
Input diode current IIK −20 mA
Output diode current IOK ±20 mA
DC output current IOUT ±25 mA
DC VCC/ground current ICC ±75 mA
Power dissipation PD 180 mW
Storage temperature Tstg −65 to 150 °C
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Operating Ranges (Note)
Characteristics Symbol Rating Unit
Supply voltage VCC 2.0 to 5.5 V
Input voltage VIN 0 to 5.5 V
Output voltage VOUT 0 to VCC V
Operating temperature Topr −40 to 85 °C
Input rise and fall time dt/dv 0 to 100 (VCC = 3.3 ± 0.3 V)
0 to 20 (VCC = 5 ± 0.5 V) ns/V
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
CK
CLR
QA
QB
QC
QD
TC74VHC393F/FN/FT/FK
2008-06-01
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Electrical Characteristics
DC Characteristics
Test Condition Ta = 25°C Ta =
−40 to 85°C
Characteristics Symbol
V
CC (V) Min Typ. Max Min Max
Unit
High-level input
voltage VIH ―
2.0
3.0 to
5.5
1.50
VCC ×
0.7
―
―
―
―
1.50
VCC ×
0.7
―
― V
Low-level input
voltage VIL ―
2.0
3.0 to
5.5
―
―
―
―
0.50
VCC ×
0.3
―
―
0.50
VCC ×
0.3
V
IOH = −50 μA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
―
―
―
1.9
2.9
4.4
―
―
―
High-level output
voltage VOH VIN
= VIH or VIL
IOH = −4 mA
IOH = −8 mA
3.0
4.5
2.58
3.94
―
―
―
―
2.48
3.80
―
―
V
IOL = 50 μA
2.0
3.0
4.5
―
―
―
0.0
0.0
0.0
0.1
0.1
0.1
―
―
―
0.1
0.1
0.1
Low-level output
voltage VOL VIN
= VIH or VIL
IOL = 4 mA
IOL = 8 mA
3.0
4.5
―
―
―
―
0.36
0.36
―
―
0.44
0.44
V
Input leakage
current IIN VIN = 5.5 V or GND 0 to 5.5 ― ― ±0.1 ― ±1.0 μA
Quiescent supply
current ICC VIN = VCC or GND 5.5 ― ― 4.0 ― 40.0 μA
Timing Requirements (input: tr = tf = 3 ns)
Test Condition Ta = 25°C
Ta =
−40 to
85°C
Characteristics Symbol
VCC (V) Typ. Limit Limit
Unit
Minimum pulse width
(CK )
tw (H)
tw (L)
― 3.3 ± 0.3
5.0 ± 0.5
―
―
5.0
5.0
5.0
5.0 ns
Minimum pulse width
(CLR) tw (H) ― 3.3 ± 0.3
5.0 ± 0.5
―
―
5.0
5.0
5.0
5.0 ns
Minimum removal time trem ― 3.3 ± 0.3
5.0 ± 0.5
―
―
5.0
4.0
5.0
4.0 ns
TC74VHC393F/FN/FT/FK
2008-06-01
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AC Characteristics (input: tr = tf = 3 ns)
Test Condition Ta = 25°C Ta =
−40 to 85°C
Characteristics Symbol
VCC (V) CL (pF) Min Typ. Max Min Max
Unit
15 ― 8.6 13.2 1.0 15.5
3.3 ± 0.3
50 ― 11.1 16.7 1.0 19.0
15 ― 5.8 8.5 1.0 10.0
Propagation delay
time
(CK -QA)
tpLH
tpHL
―
5.0 ± 0.5
50 ― 7.3 10.5 1.0 12.0
ns
15 ― 10.2 15.8 1.0 18.5
3.3 ± 0.3
50 ― 12.7 19.3 1.0 22.0
15 ― 6.8 9.8 1.0 11.5
Propagation delay
time
(CK -QB)
tpLH
tpHL
―
5.0 ± 0.5
50 ― 8.3 11.8 1.0 13.5
ns
15 ― 11.7 18.0 1.0 21.0
3.3 ± 0.3
50 ― 14.2 21.5 1.0 24.5
15 ― 7.7 11.2 1.0 13.0
Propagation delay
time
(CK -QC)
tpLH
tpHL
―
5.0 ± 0.5
50 ― 9.2 13.2 1.0 15.0
ns
15 ― 13.0 19.7 1.0 23.0
3.3 ± 0.3
50 ― 15.5 23.2 1.0 26.5
15 ― 8.5 12.5 1.0 14.5
Propagation delay
time
(CK -QD)
tpLH
tpHL
―
5.0 ± 0.5
50 ― 10.0 14.5 1.0 16.5
ns
15 ― 7.9 12.3 1.0 14.5
3.3 ± 0.3
50 ― 10.4 15.8 1.0 18.0
15 ― 5.4 8.1 1.0 9.5
Propagation delay
time
(CLR-Qn)
tpHL ―
5.0 ± 0.5
50 ― 6.9 10.1 1.0 11.5
ns
15 75 120 ― 65 ―
3.3 ± 0.3
50 45 65 ― 35 ―
15 125 170 ― 105 ―
Maximum clock
frequency fmax ―
5.0 ± 0.5
50 85 115 ― 75 ―
MHz
Input capacitance CIN ― ― 4 10 ― 10 pF
Power dissipation
capacitance CPD (Note) ― 23 ― ― ― pF
Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD · VCC · fIN + ICC / 2 (per counter)
TC74VHC393F/FN/FT/FK
2008-06-01
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Noise Characteristics (input: tr = tf = 3 ns)
Test Condition Ta = 25°C
Characteristics Symbol
VCC (V) Typ. Max
Unit
Quiet output maximum dynamic VOL V
OLP CL = 50 pF 5.0 0.5 0.8 V
Quiet output minimum dynamic VOL V
OLV CL = 50 pF 5.0 −0.5 −0.8 V
Minimum high level dynamic input voltage VIHD CL = 50 pF 5.0 ― 3.5 V
Maximum low level dynamic input voltage VILD CL = 50 pF 5.0 ― 1.5 V
Input Equivalent Circuit
INPUT
TC74VHC393F/FN/FT/FK
2008-06-01
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Package Dimensions
Weight: 0.18 g (typ.)
TC74VHC393F/FN/FT/FK
2008-06-01
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Package Dimensions (Note)
Note: This package is not available in Japan.
Weight: 0.12 g (typ.)
TC74VHC393F/FN/FT/FK
2008-06-01
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Package Dimensions
Weight: 0.06 g (typ.)
TC74VHC393F/FN/FT/FK
2008-06-01
10
Package Dimensions
Weight: 0.02 g (typ.)
TC74VHC393F/FN/FT/FK
2008-06-01
11
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the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the “TOSHIBA
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