(R) (R) ADS-945 14-Bit, 10MHz Sampling A/D Converters FEATURES * * * * * * * * * * * 14-bit resolution 10MHz minimum throughput Functionally complete No missing codes Low power, 4.0W Excellent dynamic performance Internally clamped input Edge triggered TTL compatible 2" x 4" module Very low profile INPUT/OUTPUT CONNECTIONS PIN GENERAL DESCRIPTION The low-cost ADS-945 is a high-performance, 14-bit, 10MHz sampling A/D converter. This device accurately samples full-scale input signals up to Nyquist frequencies with no missing codes. The dynamic performance of the ADS-945 has been optimized to achieve a THD of -80dB and a SNR of 75dB. Packaged in a 2" x 4" module, the functionally complete ADS-945 contains a fast-settling sample/hold amplifier, a subranging (two-pass) A/D converter, a precise voltage reference, timing/control logic, three-state outputs, and error-correction circuitry. Digital inputs and outputs are TTL compatible (except for pins 29 and 30 which are ECL). Requiring 15V, +5V and -5.2V supplies, the ADS-945 typically dissipates 4.0W. The unit is offered with a bipolar input range of 1.25V. Models are available for use in either commercial (0 to +70C) or military (-55 to +125C) operating temperature ranges. Typical applications include radar signal analysis, medical/graphic imaging, and FFT spectrum analysis. 1 4 5-6 7 8 9 10-11 12 13 14 15-17 18 19-25 26 27 28 29 30 31 32 33 34 35 36 37 38 FUNCTION PIN ANALOG GROUND ANALOG INPUT ANALOG GROUND +10V REFERENCE OUT ANALOG GROUND GAIN ADJUST DO NOT CONNECT -15V SUPPLY ANALOG GROUND +15V SUPPLY ANALOG GROUND OFFSET ADJUST ANALOG GROUND MISSING PIN DIGITAL GROUND DIGITAL GROUND T/H STATUS T/H STATUS DIGITAL GROUND START CONVERT OVERFLOW OUTPUT ENABLE (OE) DIGITAL GROUND NO CONNECT DIGITAL GROUND DIGITAL GROUND 70-76 69 64-68 63 62 61 58-60 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 FUNCTION ANALOG GROUND +5V ANALOG SUPPLY ANALOG GROUND -5.2V ANALOG SUPPLY ANALOG GROUND NO CONNECT DIGITAL GROUND -5.2V DIGITAL SUPPLY DO NOT CONNECT +5V DIGITAL SUPPLY DIGITAL GROUND BIT 1 (MSB) BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 BIT 9 BIT 10 BIT 11 BIT 12 BIT 13 BIT 14 (LSB) DIGITAL GROUND 33 OVERFLOW BUFFER 53 BIT 1 (MSB) FLASH ADC 1 T/H GAIN CIRCUIT GAIN ADJUST 9 52 BIT 2 REF DAC +10 REF. OUT 7 CASE 1,2,3,5,6,8,13,15,17, 19-25,62,64-68,70-76 ANALOG GROUND AGND DGND OFFSET CIRCUIT OFFSET ADJUST 18 FLASH ADC 2 AMP 51 BIT 3 3-STATE OUTPUT REGISTER +1 DIGITAL CORRECTION LOGIC ANALOG INPUT 4 50 BIT 4 49 BIT 5 48 BIT 6 47 BIT 7 46 BIT 8 45 BIT 9 44 BIT 10 43 BIT 11 42 BIT 12 41 BIT 13 40 BIT 14 (LSB) START CONVERT 32 34 OUTPUT ENABLE TIMING AND CONTROL LOGIC T/H STATUS 29 T/H STATUS 30 26 MISSING PIN 10,11,56 DO NOT CONNECT 12 14 27,28,31,35,37-39,54,58-60 36, 61 55 57 -15V SUPPLY +15V SUPPLY DIGITAL GROUND NO CONNECT +5V DIGITAL SUPPLY -5.2V DIGITAL SUPPLY Figure 1. ADS-945 Functional Block Diagram DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) * Tel: (508) 339-3000 Fax: (508) 339-6356 * For immediate assistance: (800) 233-2765 (R) (R) ADS-945 ABSOLUTE MAXIMUM PARAMETERS +15V Supply (Pins 14) -15V Supply (Pin 12) +5V Supply (Pins 55, 69) -5V Supply (Pin 57, 63) Digital Input (Pin 32, 34) Analog Input (Pin 4) Lead Temperature (10 seconds) PHYSICAL/ENVIRONMENTAL LIMITS PARAMETERS UNITS 0 to +16 0 to -16 0 to +6 0 to -6 -0.3 to +VDD +0.3 -15 to +15 +300 MIN. TYP. MAX. UNITS 0 -55 -- -- +70 +125 C C -- -- -65 10 -- 8 -- -- +150 2" x 4" module 2.1 oz. (60 grams) Operating Temp. Range, Case ADS-945 ADS-945EX Thermal Impedance jc ca Storage Temperature Range Package Type Weight Volts Volts Volts Volts Volts Volts C C/Watt C/Watt C FUNCTIONAL SPECIFICATIONS (TA = +25C, VCC = 15V, +VDD = +5V, VDD = -5.2V, 10MHz sampling rate, and a minimum 10 minute warmup unless otherwise specified.) +25C ANALOG INPUT Input Voltage Range Input Resistance Input Capacitance Input Bias Current 0 to + 0C 55 to +125C MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS -- 300 -- -- 1.25 500 10 3 -- -- 15 -- -- 300 -- -- 1.25 500 10 3 -- -- 15 -- -- 300 -- -- 1.25 500 10 3 -- -- 15 -- Volts k pF A +2.0 -- -- -- 10 -- -- -- -- 50 -- +0.8 +20 -20 -- +2.0 -- -- -- 10 -- -- -- -- 50 -- +0.8 +20 -20 -- +2.0 -- -- -- 10 -- -- -- -- 50 -- +0.8 +20 -20 -- Volts Volts A A ns -- -- -0.99 -- -- -- 14 14 0.5 0.5 0.2 0.15 0.1 -- -- -- +1.5 0.4 0.25 0.2 -- -- -- -0.99 -- -- -- 14 14 0.75 0.5 0.3 0.25 0.2 -- -- -- +1.5 0.5 0.5 0.4 -- -- -- -0.99 -- -- -- 14 14 1 0.75 0.3 0.3 0.3 -- -- -- +2.5 0.7 0.7 0.7 -- Bits LSB LSB %FSR %FSR % Bits -- -- -- -80 -80 -79 -75 -75 -73 -- -- -- -- -- -79 -- -- -73 -- -- -- -- -- -75 -- -- -69 dB dB dB -- -- -- -80 -80 -78 -75 -74 -71 -- -- -- -- -- -78 -- -- -71 -- -- -- -- -- -75 -- -- -68 dB dB dB 71 71 70 75 75 74 -- -- -- -- -- 69 -- -- 74 -- -- -- -- -- 67 -- -- 72 -- -- -- dB dB dB 70 70 69 -- 77 74 73 110 -- -- -- -- -- -- 69 -- -- -- 73 110 -- -- -- -- -- -- 65 -- -- -- 70 110 -- -- -- -- dB dB dB Vrms -- -84 -- -- -84 -- -- -84 -- dB -- -- -- -- -- -- 100 50 90 650 8 2 -- -- -- -- -- -- -- -- -- -- -- -- 100 50 90 650 8 2 -- -- -- -- -- -- -- -- -- -- -- -- 100 50 90 650 8 2 -- -- -- -- -- -- MHz MHz dB V/s ns ps rms DIGITAL INPUT Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Start Convert Positive Pulse Width STATIC PERFORMANCE Resolution Integral Nonlinearity (dc input) Differential Nonlinearity (fin = 10kHz) Full Scale Absolute Accuracy Bipolar Offset Error (Tech Note 2) Gain Error (Tech Note 2) No Missing Codes (fin = 10kHz) DYNAMIC PERFORMANCE Peak Harmonics (-0.5dB) dc to 1mHz 1MHz to 2.5MHz 2.5MHz to 5MHz Total Harmonic Distortion (-0.5dB) dc to 1MHz 1MHz to 2.5MHz 2.5MHz to 5MHz Signal-to-Noise Ratio (w/o distortion, -0.5dB) dc to 1MHz 100kHz to 2.5MHz 2.5MHz to 5MHz Signal-to-Noise Ratio (& distortion, -0.5dB) dc to 100kHz 1MHz to 2.5MHz 2.5MHz to 5MHz Noise Two-tone Intermodulation Distortion (fin = 1.975MHz, 2.45MHz, fs = 10MHz, -0.5dB) Input Bandwidth (-3dB) Small Signal (-20dB input) Large Signal (-0.5dB input) Feedthrough Rejection (fin = 4.85MHz) Slew Rate Aperture Delay Time Aperture Uncertainty 2 (R) (R) ADS-945 +25C DYNAMIC PERFORMANCE S/H Acquisition Time ( to 0.003%FSR, 2.5V step) Overvoltage Recovery Time A/D Conversion Rate 0 to + 0C 55 to +125C MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS -- -- 10 40 30 -- -- 100 -- -- -- 10 40 30 -- -- 100 -- -- -- 10 40 30 -- -- 100 -- ns ns MHz +9.95 -- -- +10 40 -- +10.05 -- 2.0 +9.95 -- -- +10 40 -- +10.05 -- 2.0 +9.95 -- -- +10 40 -- +10.05 -- 2.0 Volts ppm/C mA +2.7 -- -- -- -- -- -- -- -- +0.5 -0.4 -8 +2.7 -- -- -- -- -- -- -- -- +0.5 -0.4 -8 +2.7 -- -- -- -- -- -- -- -- +0.5 -0.4 -8 Volts Volts mA mA -- -- 35 -- -- 35 -- -- 35 ns -- -- 18 -- -- -- +14.25 -14.25 +4.75 -4.95 +15.0 -15.0 +5.0 -5.2 +15.75 -15.75 +5.25 -5.45 +14.25 -14.25 +4.75 -4.95 +15.0 -15.0 +5.0 -5.2 +15.75 -15.75 +5.25 -5.45 +14.25 -14.25 +4.75 -4.95 +15.0 -15.0 +5.0 -5.2 +15.75 -15.75 +5.25 -5.45 Volts Volts Volts Volts -- -- -- -- -- -- +35 -10 +290 -350 4.0 -- +45 -20 +320 -390 4.3 0.04 -- -- -- -- -- -- +35 -10 +290 -350 4.0 -- +45 -20 +320 -390 4.3 0.04 -- -- -- -- -- -- +35 -10 +290 -350 4.0 -- +45 -20 +320 -390 4.3 0.04 mA mA mA mA Watts %FSR/%V ANALOG OUTPUT Reference Output Reference Temperature Drift Reference Load Current DIGITAL OUTPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" Delay, Rising Edge of Start Convert to Output Data Valid Delay, Edge of ENABLE to Output Data Valid/Invalid Output Coding -- 18 Complementary Offset Binary 18 ns POWER REQUIREMENTS Power Supply Ranges +15V Supply -15V Supply +5V Supply -5.2V Supply Power Supply Currents +15V Supply -15V Supply +5V Supply -5.2V Supply Power Dissipation Power Supply Rejection Footnotes: All power supplies should be on before applying a start convert pulse. All supplies and the clock (start convert pulses) must be present during warmup periods. The device must be continuously converting during this time. Effective bits is equal to: (SNR + Distortion) - 1.76 + The input to the ADS-945 is internally clamped at 2.3V. An 50ns wide start convert pulse is used for all production testing. For applications requiring less than a 10MHz sampling rate, a wider start convert can be used. 20 log Full Scale Amplitude Actual Input Amplitude 6.02 This is the time required before the A/D output is valid after the analog input is back within its range. Typical +5V and -5.2V current drain breakdowns are as follows: +5VAnalog = +195mA +5VDigital = + 95mA +5VTotal = +290mA -5.2VAnalog = -170mA -5.2VDigital = -180mA -5.2VTotal = -350mA the adjustment circuitry shown in Figure 2. The typical adjustment range is 0.2%FSR for this circuitry. TECHNICAL NOTES 1. Obtaining fully specified performance from the ADS-945 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins directly to a large analog ground plane beneath the package. When using this circuitry, or any similar offset and gaincalibration hardware, make adjustments following warmup. To avoid interaction, always adjust offset before gain. 3. To enable the three-state outputs, apply a logic "0" (low) to OUTPUT ENABLE (pin 34). To disable, apply a logic "1" (high) to pin 34. Bypass all power supplies to ground with 10F tantalum capacitors in parallel with 0.1F ceramic capacitors. The bypass capacitors should be located as close to the unit as possible. 4. A passive bandpass filter (Allen Avionics F4202 Series) is used at the input of the A/D for all production testing. 5. The ADS-945's digital outputs should not be directly connected to a noisy data bus. Drive the bus with 573 or 574 type latches and use "low-noise" logic, such as the 74ALS series. 2. The ADS-945 achieves its specified accuracies without the need for external calibration. If required, the device's small initial offset and gain errors can be reduced to zero using 3 (R) (R) ADS-945 CALIBRATION PROCEDURE Zero/Offset Adjust Procedure (Refer to Figure 2 and Table 1) 1. Apply a train of pulses to the START CONVERT input (pin 32) so the converter is continuously converting. Note: Connect pin 18 to ANALOG GROUND (pin 19) for operation without zero/offset adjustment. Connect pin 9 to ANALOG GROUND (pin 8) for operation without gain adjustment. 2. Apply +76.3V to the ANALOG INPUT (pin 4). 3. Adjust the offset potentiometer until the output bits are 10 0000 0000 0000 and the LSB flickers between 0 and 1. Any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuit in Figure 2 are guaranteed to compensate for the ADS-945's initial accuracy errors and may not be able to compensate for additional system errors. Gain Adjust Procedure 1. Apply +1.249771V to the ANALOG INPUT (pin 4). 2. Adjust the gain potentiometer until all output bits are 0's and the LSB flickers between 0 and 1. 3. To confirm proper operation of the device, vary the applied input voltage to obtain the output coding listed in Table 1. A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This can be accomplished by connecting LED's to the digital outputs and adjusting until certain LED's "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next. Note: A single +5V supply can be used for both the +5V ANALOG and the +5V DIGITAL. If separate supplies are used, the difference between the two can not exceed 100mV. This also applies to the -5.2V supply requirements. Datel recommends using ferrite beads to separate the analog and digital supplies (FAIR-RITE # 2643000301.) For the ADS-945, offset adjusting is normally accomplished at the point where the MSB is a 1 and all other output bits are 0's and the LSB just changes from a 0 to a 1. This digital output transition ideally occurs when the applied analog input is +1/2 LSB (+76.3V). Table 1. Output Coding OUTPUT CODING MSB LSB Gain adjusting is accomplished when all bits are 0's and the LSB just changes from a 0 to a 1. This transition ideally occurs when the analog input is at +full scale minus 1 1/2 LSB's (+1.249771V) . 00 00 00 01 10 11 11 11 Note: Due to inherent system noise, the averaging of several conversions may be needed to accurately adjust both offset and gain to 1LSB of accuracy. 0000 0111 1111 1111 1111 0111 1111 1111 INPUT RANGE 1.25V 0000 0000 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1110 1111 1111 +1.249847 +0.937500 +0.625000 0.000000 -0.625000 -0.937500 -1.249847 -1.250000 COMP. OFF. BINARY 0.1F 54 DIGITAL 58-60 GROUND 0.1F 57 DIGITAL SUPPLY + 10F 10F -5.2V 10F 64-68 + 0.1F 10F 0.1F -5.2V 10F 43 42 41 40 34 33 30 ANALOG GROUND ANALOG 63 SUPPLY ADS-945 + 0.1F 13 ANALOG 15-17 GROUND 10F BIT 12 BIT 13 BIT 14 (LSB) START CONVERT 32 13 -15V BIT 11 OUTPUT ENABLE OVERFLOW T/H STATUS 29 T/H STATUS 4 ANALOG INPUT 12 + +15V 50 BIT 4 49 BIT 5 48 BIT 6 47 BIT 7 46 BIT 8 45 BIT 9 44 BIT 10 69 ANALOG SUPPLY + +5V 53 BIT 1 (MSB) 52 BIT 2 51 BIT 3 55 DIGITAL SUPPLY + +5V +10 REF. OUT 7 +15V +15V OFFSET 18 ADJUST 20k GAIN ADJUST 0.1F 9 20k 0.1F -15V -15V Figure 2. ADS-945 Connection Diagram 4 BIPOLAR SCALE +FS -1 LSB +3/4 FS +1/2FS 0 -1/2FS -3/4FS -FS +1 LSB -FS +5VA 25 23 21 19 17 15 13 11 9 7 5 3 1 26 24 22 20 18 16 14 12 5 10 8 6 4 2 +5VA +15V -15V -5.2V +5VD -5.2VD -5.2V D +15V L6 L5 L4 L3 L2 L1 -5.2VA 0.1" GRID HOLE PATTERN P1 POWER SUPPLY CONNECTOR +5V D -15V D4 D3 D2 D1 C1 + + C4 C3 + C2 + +15V/50MA -15V/80MA +5VA/350MA -5.2VA P3 C26 1 JPR3 NC 14 JPR2 CLOCK R1 20K 2 R3 51.1 3 EXT 2 1 INT GAIN 1 +15V -15V 3 CW C14 7 8 1 +V C23 6 2 EXT -15V C9 10PF (OPT) C17 C16 +15V 3 JPR1 OUTPUT ENABLE 1 INT -5.2V D 4 -V C15 OFFSET 3 CW R2 20K 2 3 U4 LT1016 2 5 C22 +5V D 1 +15V -15V 9 +5VA 38 37 36 35 34 33 32 31 30 29 28 T/H OS3 ENABLE O.F. CLOCK T/H (LSB) BIT 14 40 39 BIT 11 43 42 BIT 12 BIT 13 41 BIT 10 44 BIT 7 47 46 BIT 8 BIT 9 45 BIT 6 48 BIT 4 50 BIT 5 49 27 26 25 (MSB) BIT 1 53 52 BIT 2 BIT 3 51 +5VD 55 54 24 23 22 21 -5.2VD 57 DNC 56 59 60 61 62 63 64 20 -5.2VA 65 66 67 68 58 OFFSET +15V -15V GAIN 19 18 17 16 15 14 13 12 11 10 +5VA C20 +5VD SG1 C21 L11 -5.2VD SG3 L10 -5.2VA C19 C18 -5.2VA +5VA Figure 3. ADS-945 Evaluation Board Schematic (DATEL Dwg. #A-23442) 8 X1 10MHZ +5V D 1,7 R5 51.1 P4 EXT. CLOCK 2 3 69 70 7 8 71 6 VREF 72 73 5 74 IN 75 76 4 U1 ADS945 3 2 1 + C29 C27 ALS573 U7 +5V Q6 Q5 Q4 Q3 Q2 Q1 R12 10K 10 13 14 15 16 17 18 19 C28 DATA LATCHES Q7 12 Q8 11 CP 1 OC GND 8 7D 9 8D 6 5D 7 6D 4 3D 5 4D 2 1D 3 2D 20 10 20 2 1D +5V 19 Q1 3 2D 18 Q2 4 3D 17 Q3 5 4D U6 16 Q4 ALS573 6 15 5D Q5 7 6D 14 Q6 8 7D 13 Q7 9 8D 12 Q8 11 CP 1 GND OC +5VD BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 AGND EOC CLOCK OVERFLOW 2 4 6 8 10 BIT 12 12 BIT 13 1 ENABLE 3 5 7 9 11 13 15 17 BIT 11 14 BIT 10 16 19 21 23 25 27 29 31 33 20 22 24 26 28 30 32 34 P2 DATA OUTPUT CONNECTOR DGND SG4 BIT 9 18 AGND LSB BIT 14 SG2 MSB BIT 1 DGND L7 (R) (R) ADS-945 (R) (R) ADS-945 N START CONVERT N+1 N+2 50ns typ. Acquisition Time 10ns typ. Hold T/H 60ns typ. T/H 40ns typ. Hold Hold 35ns max. 10ns typ. OUTPUT DATA DATA N-1 VALID DATA N VALID INVALID DATA 90ns typ. DATA N+1 VALID Note: Scale is approximately 10ns per division. Figure 4. ADS-945 Timing Diagram TIMING NOTES: 1. The ADS-945 is an edge-triggered device requiring no additional external timing signals. The rising edge of the start convert pulse initiates a conversion. 9000 8000 2. A start convert pulse of 50ns is recommended when sampling at 10MHz. 7000 3. The falling edge of the subsequent start convert pulse (N+1) or the rising edge of the N+2 pulse can be used to latch data from conversion N (1 pipeline delay). 6000 5000 Amplitude Relative to Full Scale (dB) 4000 3000 2000 1000 0 Digital Output Code This histogram represents the typical peak-to-peak noise (including quantization noise) associated with the ADS-945. 16,384 conversions were processed with the input to the ADS-945 tied to analog ground. ; Frequency !$$&* Figure 5. ADS-945 FFT Analysis Figure 6. ADS-945 Grounded Input Histogram 6 (R) (R) ADS-945 Number of Occurences DNL (LSB's) < Digital Output Code Digital Output Code Figure 7. ADS-945 Histogram and Differential Nonlinearity THD vs. Input Frequency 90 80 80 70 70 60 60 THD (-dB) Peak Harmonic (-dB) PH vs. Input Frequency 90 50 40 50 40 30 30 20 20 10 10 0 0 1 10 100 1000 10000 100000 1 10 100 Frequency (kHz) 10000 100000 10000 100000 SNR+D vs. Input Frequency 80 80 70 70 60 60 SNR+D (dB) 90 50 40 THD (-dB) SNR (dB) Peak Harmonic (-dB) SNR vs. Input Frequency 90 50 40 30 30 20 20 10 0 1000 Frequency (kHz) 10 1 10 100 1000 10000 0 100000 Frequency (kHz) 1 10 100 1000 Frequency (kHz) Figure 8. ADS-945 Dynamic Performance vs. Input Frequency at +25C 7 (R) (R) ADS-945 MECHANICAL DIMENSIONS INCHES (mm) 0.29 MAX. (7.37) 1.80 (45.72) 0.15 MIN. (3.81) 0.100 (2.54) TYP. 76 0.06 (1.52) 2.06 MAX. (52.32) 1 3.700 (93.98) 4.02 (102.11) MAX. Missing pin 26 is for keying purposes 4.06 (103.12) MAX. 0.25 Square (6.35) TYP. 39 38 Insulated surface with internal ground plane Metal case 2.02 MAX. (51.31) Epoxy glass (FR-4) base ORDERING INFORMATION MODEL NUMBER OPERATING TEMP. RANGE ADS-945 ADS-945EX (R) ACCESSORIES ADS-945 0 to +70C -55 to +125C Evaluation Board (without ADS-945) DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 Internet: www.datel-europe.com E-mail: datel.ltd@datel.com (R) DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 01-34-60-01-01 Internet: www.datel-europe.com E-mail: datel.sarl@datel.com DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356 Internet: www.datel.com E-mail: sales@datel.com DATEL GmbH Munchen, Germany Tel: 89-544334-0 Internet: www.datel-europe.com E-mail: datel.gmbh@datel.com ISO 9001:2000 REGISTERED DATEL China Shanghai, China Tel: 011-86-51317131 E-mail: davidx@datel.com DS-0237F 5/04 DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-6354-2025 Internet: www.datel-co.jp E-mail: salestko@datel.co.jp, salesosa@datel.co.jp DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.