MICHEL MIC59P60 8-Bit Serial-Input Protected Latched Driver General Description The MIC59P60 serial-input latched driver is a high-voltage (80V), high-current (500m<) integrated circuit comprised of eight CMOS data latches, a bipolar Darlington transistor driver for each latch, and CMOS control circuitry for the common CLEAR, STROBE, CLOCK, SERIAL DATAINPUT, and OUTPUT ENABLE functions. Similar to the MIC5842, additional protection circuitry supplied on this device includes thermal shutdown, under voltage lockout (UVLO), and over- current shutdown. The bipoiar/CMOS combination provides an extremely low- power latch with maximum intertace flexibility. The MIC59P60 has open-collector outputs capable of sinking 500mA and integral diodes for inductive load transient suppression with a minimum output breakdown voltage rating of 80V (50V sustaining). The drivers can be operated with a split supply, where the negative supply is down to ~20V and may be paralleled for higher load current capability. Using a 5V logic supply, the MIC59P60 will typically operate at better than 5MHz. With a 12V logic supply, significantly higher speeds are obtained. The CMOS inputs are compat- ible with standard CMOS, PMOS, and NMOS circuits. TTL circuits may require pull-up resistors. By using the serial data output, drivers may be cascaded for interface applications requiring additional drive lines. Each of these eight outputs has an independent over current shutdown of 500 mA. Upon over-current shutdown, the affected channel willturn OFF and the flag will go low until V,, is cycled or the ENABLE/RESET pin is pulsed high. Current pulses less than 2us will not activate current shutdown. Temperatures above 165C will shut down the device and activate the error flag. The UVLO circuit prevents operation at low V__; hysteresis of 0.5V is provided. bo Features * 3.3 MHz Minimum Data-Input Rate Output Current Shutdown (500mA Typical) Under Voltage Lockout Thermal Shutdown Output Fault Flag * CMOS, PMOS, NMOS, and TTL Compatible Internal Pull-Up/Pull-Down Resistors + Low Power CMOS Logic and Latches * High Voltage Current Sink Outputs + Output Transient-Protection Diodes * Single or Split Supply Operation ee we @ Ordering Information Part Number Temperature Range Package MICS9P60AJ ~55C to +125C 20-Pin Geramic DIP MICSSP60AJBt | ~55C to +125C 20-Pin Ceramic DIP MIC59P60BN -~40C to +85C 20-Pin Plastic DIP MIC59P60BV ~40C to +85C 20-Pin PLCC MICS9P60BWM | 40C to +85C 20-Pin Wide SOIC + AJB indicates units screened to MIL-STD 883, Method 5004, candition B, and burned-in for 1 week. Functional Diagram CLEAR EE | tumer Pin Configuration (Ceramic and Plastic DIP and SOIC) CLEAR FLAG VEE OUTPUT 1 CLOCK OUTPUT 2 oure SERIAL DATA IN OUTPUT 3 ENABLERESET (ACTIVE LOW) Vgs OUTPUT 4 Vop OUTPUT 5 SERIAL DATA OUT OUTPUT 6 STROBE OUTPUT 7 OUTPUT OUTPUT 8 ENABLE/RESET Vee Ls K 1997 7-63MIC59P60 PLCC Pin Configuration SERIAL DATA IN [a Vgs [5 Vpp [6 SERIAL DATA OUT [7 STROBE [7s CLOCK T | CLEAR tu uu > er Ww o uw x = wi Typical Input Circuits Yoo Micrel Absolute Maximum Ratings (Note 1, 2) at 25C Free-Air Temperature and Vsg = 0V Output Voltage, VcE 80V Output Voltage, VcE(sus) (Note 1) 50V Vpp with Reference to Vss 15V Vop with Reference to Veg 25V Emitter Supply Voltage, Vee -20V Input Voltage Range, Vin -0.3V to Vpp + 0.3V OUT 2 Package Power Dissipation: out MIC59P60BN 2.0W 3 Derate above T, = +25C 20mWw/rc OUT 4 MICS9P60AW/ANB 1.8W Derate above T Az +25C 18mWw/C OUT 5 MIC59P60BV 1.4W Derate above T, = +25C 14mWw/Cc OUT 6 MICS9P60BW 1.2W Derate above T Az +25C 12mw/ec Operating Temperature Range, Ta -5C to +125C. Storage Temperature Range, Ts 65C to +4125C Note 1:For inductive load applications. Note 2: CMOS devices have input-static protection but are susceptible to damage when exposed to extremely high static electrical charges. Typical Output Driver Yoo CLOCK STROBE on enn a * | rote ss ate Pin Description Pin Name Description 1 CLEAR Sets All Latches OFF (open). 2,10 Veg Output Ground (Substrate). Most negative voitage in the system connects here. 3 CLOCK Serial Data Clock. A CLEAR must also be clocked into the latches. 4 SERIAL DATA IN Serial Data Input pin. 5 Vgg Logic reference (Ground) pin. 6 Vop Logic Positive Supply voltage. 7 SERIAL DATA OUT Serial Data Output pin. (Flow through). 8 STROBE Output Strobe pin. Loads output latches when High. A STROBE is needed to CLEAR latches. 9 OUTPUT ENABLE/RESET | When Low, Outputs are active. When High, device is inactive and reset from a fault condition. An under voltage condition emulates a high OE/ RESET input. 11 K Transient suppression diodes cathode common pin. 1219 OUTPUT N Open Collector outputs 8 through 1. 20 FLAG Error Flag. Flag is Low upon Overcurrent Fault or Overtemperature fault. OUTPUT ENABLE/RESET must be pulled high to reset the flag and fault condition. 7-64 1997MICS9P60 Micrel Electrical Characteristics: at T, = +25C, V,, = 5V, Veg = Vee = OV (unless otherwise noted) Limits Characteristic Symbol Test Conditions Min. Typ. | Max. | Unit Output Leakage Current Ioex Vout = 80V 50 pA Vout = 80V, Ty = +70C 100 Collector-Emitter Voesat) loyr = 100mA 0.9 14 Vv Saturation Voltage lout = 200mA 11 1.3 lout = 350mA 13 1.6 Collector-Emitter Voesus) lout = 350mA, L = 2mH 50 v Sustaining Voltage Input Voltage Vino) 1.0 Vinct) Vpp = 12V 10.5 v Vop = 10V 8.5 Vpp = 5.0V, Note 1 3.5 Input Resistance Fin Vpp = 12V 50 200 kQ. Vpp = 10V 50 300 Vpp = 5.0V 50 600 Flag Output Current lot Voy = 0.4V 15 mA Flag Output Leakage low Voy = 12.0V 50 nA Supply Current lopon) All Drivers ON, Vpp = 12V 6.4 10.0 mA All Drivers ON, Vpp = 10V 6.0 9.0 All Drivers ON, Vpp = 5.0V 46 75 lop (1 OUTPUT) One Driver ON, All others OFF, Vppy = 12V 3.1 45 mA One Driver ON, All others OFF, Vpp = 10V 2.9 45 One Driver ON, All others OFF, Vpp = 5V 2.3 3.6 lppoFF} All Drivers OFF, Vp = 12V 2.6 4.2 mA All Drivers OFF, Vpp = 10V 2.4 3.6 All Drivers OFF, Vpp = 5.0V 1.9 3.0 Clamp Diode Ip Vp = 80V 50 pA Leakage Current Clamp Diode Ve Ip = 350mA 1.7 2.0 v Forward Voltage Over Current lim 500 mA Shutdown Threshold Start Up Voltage Vey Note 2 3.5 4.0 4.5 Vv Minimum Supply (Vpp) Vop MIN 3.0 3.5 4.0 Vv Thermal Shutdown 165 C Thermal Shutdown Hysteresis 10 C Note 1: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic "1". Note 2: Undervoltage lockout is guaranteed to release device at no more than 4.5V, and disable the device at no less than 3.0V 1997 7-65MICS9P60 CLOCK | | e- 5 ~o Micrel DATA IN STROBE + C> OUTPUT ENABLE OUT) | Timing Conditions (Ta = +25C, Logic Levels are Vpp and Vss, Vpp = 5V) A. Typical Data Active Time Before Clock Pulse (Data Set-Up Time)... ce cccccsetsenetsensesesseessaseassssssesaceesseereness 75 ns B. Minimum Data Active Time After Clock Pulse (Data Hold Time) C. Minimum Data Pulse Width 2.0... cee ccceseenecersersccaesceesseeaecseceecaeseesaeeseecasasaecaesaetaeeeessaeeeseausateaessecasesssaeeneeeaasaes D. Minimum Clock Pulse Width ..........cccccccescessssceescesseerecsesesesssseusecssacessesenasaessesseseeeaeeneecsestussesseeassssesscsecsesseseneeneeatsas E. Minimum Time Between Clock Activation and Strobe .. F. Minimum Strobe Pulse Width 00.0... cceeescceneeccesentenececeessenscsesascsecsaeaceaesarsseeecenecseescecsssteneecsesstesassssaueaseassarecaecaseas G. Typical Time Between Strobe Activation and Output Transition SERIAL DATA present at the input is transferred to the shift register on the logic 0 to logic 1 transition of the CLOCK input pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the rising edge of the CLOCK input waveform. Holding CLEAR high results in a data lagic "0" being clocked into the shift register, turning off respective channels. Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parailel conversion). The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed (STROBE tied high) will require that the ENABLE input be high to prevent invalid output states. When the ENABLE input is high, ali of the output buffers are disabled (OFF) without affecting information stored in the latches or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches. A positive OE/RESET pulse resets the FLAG and the output after a current shutdown fault. Over-temperature faults are not latched and require no reset pulse. MIC59P60 Truth Table Serial Shift Register Contents Serial Latch Contents Output Contents Data | Clear | Clock Data Strobe Output Input | Input | Input | ty en eee lg | Output | Input iy lp lg oe Ig| Enable) ly Iz fg ...... Ig H JS Ry Ro...... R7 R7 L _I7 tL Ry Ro...... R7 R7 x TL Ri R2 Rog....... Rg Rg H | _S~ 0 OO 0... oO L X KX Ka. X L R; Ro Rg ...... Re Py Po P3...... Pg Pg Py Po P3 Pa} ob Py Po Pg ...... Pg X KX KX we Xx H HoH... H L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State O = Output OFF 7-66 1997MIC59P60 Typical Characteristic Curves Output Saturation P Voltage vs. Temperature 314 13 b= 350mA 12 O14 > z 1 Vpp = BV to 12V Los G08 I, = 100mA P07 G06 0.5 50 0 50 100 150 TEMPERATURE: (C) Output Saturation 5 Voltage vs. Temperature S14 ws ae IL = 350mA > 4 VDD = 12V. = G08 IL = 100mA -60 0 50 100 150 TEMPERATURE (C) Supply Current vs. Temperature 5 E4 ALL OUTPUTS ON ~ zZ Vpp = 5 al e 3 | > a By... 2. ALL OUTPUTS OFF oO, 0: 0 Q 50 100 150 TEMPERATURE (C) } Supply Current vs. Temperature ~~~ ALL OUTPUTS ON ~~ { I Vop = 12V | L |___ ALL OUTPUTS OFF __| & OF DD NS mo Ww = SUPPLY CURRENT (mA) i -50 0 50 100 150 TEMPERATURE (C) oO Micrel Current Shutdown 3 aihreshold vs. Temperature 2S in a oS an a 2 s o SHUTDOWN THRESHOLD (A) & a 2 to a -50 0 50 100 150 TEMPERATURE {C} Current Shutdown Delay vs. Output Current ELA 5 DELAY (pS = ~ = RD Oo wo Vop = 5V CURRENT LIMIT oo NFDHS 3 04 05 06 07 08 09 OUTPUT CURRENT (A) 1997 7-67MIC59P60 Micrel Maximum Allowable Duty Cycle (Plastic DIP) Vpp = 5.0V Number of Outputs ON (lout = 200mA Max. Allowable Duty Cycle at Ambient Temperature of Vop = 5.0V) 25C 40C 50C 60C 70C 8 85% 72% 64% 55% 46% 7 97% 82% 73% 63% 53% 6 100% 96% 85% 73% 62% 5 100% 100% 100% 88% 75% 4 100% 100% 100% 100% 93% 3 100% 100% 100% 100% 100% 2 100% 100% 100% 100% 100% 1 100% 100% 400% 100% 100% Vpp = 12V Number of Outputs ON (lout = 200mA Max. Allowable Duty Cycle at Ambient Temperature of Vpp = 12V) 25C 40C 50C 60C 70C 8 80% 68% 60% 52% 44% 7 91% 77% 68% 59% 50% 6 100% 90% 79% 69% 58% 5 100% 100% 95% 82% 69% 4 100% 100% 100% 100% 86% 3 100% 100% 100% 100% 100% 2 100% 100% 100% 100% 100% 1 100% 100% 100% 100% 100% Typical Applications Protected Solenoid Driver with Output Enable +5V +48V 10k FLAG CLEAR CLOCK SERIAL DATA IN ENABLE 7-68 1997MIC59P60 Typical Applications, continued +5V CLEAR CLOCK SERIAL DATA Hammer Driver Micrel +28V Protected Negative/Positive PIN Diode Driver Transmit/Receive Switch FLAG O * cLock o_ 10k +5V +75V 7 DATA INO i" \. } HUTDOWN} STROBE O zl TMT 2 10k 15 [2h i {}- Transmitter ED 1000p =- RFC 1 La + 2 T rf 7 ntenna +75V Lah vg; i Bol oF at * 1 ot ory ri 10k +5V Hd jel |S 25 D2 oO *-Ls} ie % 1 Pp RFC T = 1000p== RFC t + Gee | + = Ly +75V ta ng ? H+- Receiver 100p D3 IF t de, 4+ filo ev Tt Too sue Too ok Di Diode D3 PIN Diodes: UM9651 o (Latch 1)| (Latch 5) | (Latch 8 -5V Receive | OFF ACTIVE FF Transmit] ACTIVE | OFF |_ACTIVE 1997 7-69