A625308A Series
32K X 8 BIT CMOS SRAM
(September, 2006, Version 1.3) AMIC Technology, Corp.
Document Title
32K X 8 BIT CMOS SRAM
Revision History
Rev. No. History Issue Date Remark
0.0 Initial issue February 2, 2001 Preliminary
0.1 Add ultra temp grade and 28-pin DIP package type November 7, 2001
0.2 Add SI grade July 17, 2002
1.0 Final version release July 16, 2003 Final
1.1 Add Pb-Free package type August 19, 2004
1.2 Remove non-Pb-free package type July 3, 2006
1.3 Remove DIP -SI and -SU grade September 26, 2006
A625308A Series
32K X 8 BIT CMOS SRAM
(September, 2006, Version 1.3) 1 AMIC Technology, Corp.
Features
Power Supply Range: 4.5V to 5.5V
Access times: 70 ns
A625308A-S series: Operating: 35mA (max.)
Standby: 10μA (max.)
A625308A-SI/SU series: Operating: 35mA (max.)
Standby: 15μA (max.)
Extended operating temperature range: 0°C to 70°C for -
S series, -25°C to 85°C for -SI series, -40°C to 85°C for
-SU series.
Full static operation, no clock or refreshing required
All inputs and outputs are directly TTL-compatible
Common I/O using three-state output
Data retention voltage: 2.0V (min.)
Available in 28-pin, DIP/SOP and TSOP
Pb-Free package only
All Pb-free (Lead-free) products are RoHS compliant
General Description
The A625308A is a low operating current 262,144-bit static
random access memory organized as 32,768 words by 8
bits and operates on a voltage from 4.5V to 5.5V.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Minimum standby power is drawn by this device when CE
is at a high level, independent of the other input levels.
Data retention is guaranteed at a power supply voltage as
low as 2.0V.
Pin Configurations
DIP / SOP TSOP
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND I/O3
I/O4
I/O5
I/O6
I/O7
CE
OE
A11
A9
A8
A13
WE
VCC
A10
A625308A(M)
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15
16
17
18
19
20
21
22
23
24
25
26
27
28
A625308AV
1
9
28
20
A11 2
3
4
5
6
7
8
10
11
12
13
14
A9
A8
A13
A14
A12
A7
A6
A5
A4
A3
27
26
25
24
23
22
21
19
18
17
16
15
I/O6
I/O5
I/O4
I/O3
VSS
I/O2
I/O1
I/O0
A0
A1
A2
A10
VCC
I/O7
OE
WE
CE
~
~
~
~
A625308A Series
(September, 2006, Version 1.3) 2 AMIC Technology, Corp.
Block Diagram
ROW
DECODER
512 X 512
MEMORY ARRAY
INPUT DATA
CIRCUIT COLUMN I/O
CONTROL
CIRCUIT
CE
WE
I/O
7
I/O
0
A14
A13
A12
A0 VCC
GND
OE
Pin Descriptions – DIP / SOP
Pin No. Symbol Description
1-10, 21, 23-26 A0 - A14 Address Input
11-13, 15-19 I/O0 - I/O7 Data Input/Output
20 CE Chip Enable
22 OE Output Enable
27 WE Write Enable
28 VCC Power Supply
14 GND Ground
Pin Description-TSOP
Pin No. Symbol Description
2-5, 8-17, 28 A0 - A14 Address Input
18-20, 22-26 I/O0 - I/O7 Data Input/Output
27 CE Chip Enable
1 OE Output Enable
6 WE Write Enable
7 VCC Power Supply
21 GND Ground
A625308A Series
(September, 2006, Version 1.3) 3 AMIC Technology, Corp.
Recommended DC Operating Conditions
(TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C)
Symbol Parameter Min. Typ. Max. Unit
VCC Supply Voltage 4.5 5.0 5.5 V
GND Ground 0 0 0 V
VIH Input High Voltage 2.2 - VCC + 0.5 V
VIL Input Low Voltage -0.5 0 +0.8 V
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr ……………………………
………………………….. 0°C to +70°C or -40°C to +85°C
Storage Temperature, Tstg . . . . . . . . -55°C to +125°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W
Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied and exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
DC Electrical Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C, VCC = 5.0V ± 10%, GND = 0V)
Symbol Parameter A625308A-70S A625308A-70SI/SU Unit Conditions
Min. Max. Min. Max.
⏐ILI⏐ Input Leakage Current - 1 - 1 μA VIN = GND to VCC
⏐ILO⏐ Output Leakage Current - 1 - 1 μA CE = VIH
VI/O = GND to VCC
ICC Active Power Supply
Current - 5 - 5 mA
CE = VIL, II/O = 0mA
ICC1 Dynamic Operating
Current - 35 - 35 mA
Min. Cycle, Duty = 100%
CE = VIL, II/O = 0mA
ICC2 Dynamic Operating
Current
-
5
-
5
mA CE = VIL, VIH = VCC
VIL = 0V, f = 1 MHz
II/O = 0 mA
ISB Supply Current - 0.5 - 0.5 mA
CE = VIH
ISB1 Standby Power - 10 - 15
μA CE ≥ VCC - 0.2V
VIN ≥ 0V
VOL Output Low Voltage - 0.4 - 0.4 V I OL = 2.1 mA
VOH Output High Voltage 2.4 - 2.4 - V IOH = -1.0 mA
A625308A Series
(September, 2006, Version 1.3) 4 AMIC Technology, Corp.
Truth Table
Mode CE OE WE I/O Operation Supply Current
Standby H X X High Z ISB, ISB1
Output Disable L H H High Z ICC, ICC1, ICC2
Read L L H DOUT ICC, ICC1, ICC2
Write L X L DIN ICC, ICC1, ICC2
Note: X: H or L
Capacitance (TA = 25°C, f = 1.0 MHz)
Symbol Parameter Min. Max. Unit Conditions
CIN* Input Capacitance - 6 pF VIN = 0V
CI/O* Input/Output Capacitance - 8 pF VI/O = 0V
* These parameters are sampled and not 100% test ed.
A625308A Series
(September, 2006, Version 1.3) 5 AMIC Technology, Corp.
AC Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C, VCC = 5.0V ± 10%)
Symbol Parameter A 625308A-70S/SI/SU Unit
Min. Max.
Read Cycle
tRC Read Cycle Time 70 - ns
tAA Address Access Time - 70 ns
tACE Chip Enable Access Time - 70 ns
tOE Output Enable to Output Valid - 35 ns
tCLZ Chip Enable to Output in Low Z 10 - ns
tOLZ Output Enable to Output in Low Z 5 - ns
tCHZ Chip Disable to Output in High Z - 25 ns
tOHZ Output Disable to Output in High Z - 25 ns
tOH Output Hold from Address Change 10 - ns
Write Cycle
tWC Write Cycle Time 70 - ns
tCW Chip Enable to End of Write 60 - ns
tAS Address Set up Time 0 - ns
tAW Address Valid to End of Write 60 - ns
tWP Write Pulse Width 50 - ns
tWR Write Recovery Time 0 - ns
tWHZ Write to Output in High Z - 25 ns
tDW Data to Write Time Overlap 30 - ns
tDH Data Hold from Write Time 0 - ns
tOW Output Active from End of W r ite 5 - ns
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not
referred to output voltage levels.
A625308A Series
(September, 2006, Version 1.3) 6 AMIC Technology, Corp.
Timing Waveforms
Read Cycle 1 (1)
t
RC
t
AA
t
OH
Address
D
OUT
t
OHZ5
t
CHZ5
t
ACE
t
CLZ5
t
OLZ5
t
OE
CE
OE
Read Cycle 2 (1, 2, 4)
t
RC
t
OH
t
AA
t
OH
Address
D
OUT
A625308A Series
(September, 2006, Version 1.3) 7 AMIC Technology, Corp.
Timing Waveforms (continued)
Read Cycle 3 (1, 3, 4)
t
CLZ 5
t
ACE
t
CHZ 5
CE
D
OUT
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled, CE = VIL.
3. Address valid prior to or coincident with CE transition low.
4.
OE = V IL.
5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
Write Cycle 1 (6)
(Write Enable Controlled)
t
WC
Address
CE
D
IN
t
OW 7
t
DH
t
DW
t
WHZ 7
t
WP2
t
AS1
(4)
t
CW5
t
AW
t
WR3
WE
D
OUT
A625308A Series
(September, 2006, Version 1.3) 8 AMIC Technology, Corp.
Timing Waveforms (continued)
Write Cycle 2 (6)
(Chip Enable Controlled)
t
WC
Address
CE
D
IN
t
DH
t
DW
(4)
t
CW5
t
AW
t
WR3
WE
D
OUT
t
WHZ7
t
WP2
t
AS1
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP) of a low CE and a low WE.
3. tWR is measured form the earliest of CE or WE going high to the end of the Write cycle.
4. If the
CE low transition occurs simultaneously with the WE low transition or after the WE transition, out puts
remain in a high impedance state.
5. tCW is measured from the later of CE going low to the end of Writ e.
6.
OE level is high or low.
7. Transition is measured ±500mV from steady. This parameter is sampled and not 100% tested.
A625308A Series
(September, 2006, Version 1.3) 9 AMIC Technology, Corp.
AC Test Conditions
Input Pulse Levels 0V, 3V
Input Rise And Fall Time 5 ns
Input and Output Timing Reference Levels 1.5V
Output Load See Figure 1 and 2
30pF
* Including scope and jig. * Including scope and jig.
C
L
TTL
5pF
C
L
TTL
Figure 1. Output Load Figure 2. Output Load for tCLZ1,
t
CLZ2, tOHZ, tOLZ, tCHZ1,
tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C)
Symbol Parameter Min. Max. Unit Conditions
VDR VCC for Data Retention 2.0 5.5 V CE ≥ VCC - 0.2V
ICCDR
Data Retention Current
-
3
μAVCC = 2.0V,
CE ≥ VCC - 0.2V
VIN ≥ 0V
tCDR Chip Disable to Data Retention Time 0 - ns
tR Operation Recovery Time tRC - ns
See Retention Waveform
A625308A Series
(September, 2006, Version 1.3) 10 AMIC Technology, Corp.
Low VCC Data Retention Waveform
VCC
t
CDR
V
IH
4.5V
t
R
V
IH
4.5V
DATA RETENTION MODE
V
DR
≥
2.0V
CE
≥
V
DR
- 0.2V
CE
Ordering Information
Part No. Access Time (ns) Operating Current
Max. (mA) Standby Current
Max. (μA) Package
A625308A-70SF 35 10 28L Pb-Free DIP
A625308AM-70SF 35 10 28L Pb-Free SOP
A625308AV-70SF 35 10 28L Pb-Free TSOP (Forward)
A625308AM-70SIF 35 15 28L Pb-Free SOP
A625308AV-70SIF 35 15 28L Pb-Free TSOP (Forward)
A625308AM-70SUF 35 15 28L Pb-Free SOP
A625308AV-70SUF
70
35 15 28L Pb-Free TSOP (Forward)
A625308A Series
(September, 2006, Version 1.3) 11 AMIC Technology, Corp.
Package Information
P-DIP 28L Outline Dimensions unit: inches/mm
1
28
E
1
S
A
2
AL
E
e
A
D
C
α
B
1
B
A
1
Base Plane
Seating Plane
14
15
e
1
Dimensions in inches Dimensions in mm
Symbol Min Nom Max Min Nom Max
A - - 0.210 - - 5.33
A1 0.010 - - 0.25 - -
A2 0.150 0.155 0.160 3.81 3.94 4.06
B 0.016 0.018 0.022 0.41 0.46 0.56
B1 0.058 0.060 0.064 1.47 1.52 1.63
C 0.008 0.010 0.014 0.20 0.25 0.36
D - 1.460 1.470 - 37.08 37.34
E 0.590 0.600 0.610 14.99 15.24 15.49
E1 0.540 0.545 0.550 13.72 13.84 13.97
e1 0.090 0.100 0.110 2.29 2.54 2.79
L 0.120 0.130 0.140 3.05 3.30 3.56
α 0° - 15° 0° - 15°
eA 0.630 0.650 0.670 16.00 16.51 17.02
S - - 0.090 - - 2.29
Notes:
1. The maximum value of dimension D includes end f lash.
2. Dimension E1 does not include resin fins.
3. Dimension S includes end flash.
A625308A Series
(September, 2006, Version 1.3) 12 AMIC Technology, Corp.
Package Information
SOP (W.B.) 28L Outline Dimensions unit: inches/mm
1
E
H
L
L
1
c
14
See Detail F
Detail F
B
1528
A1A2
A
S
D
Seating Plane
D
y
e
y
θ
Dimensions in inches Dimensions in mm
Symbol Min Nom Max Min Nom Max
A - -
0.112 - -
2.85
A1 0.004 - -
0.10 - -
A2 0.093 0.098 0.103 2.36 2.49 2.62
B 0.014 0.016 0.020 0.36 0.41 0.51
C 0.008 0.010 0.012 0.20 0.25 0.30
D - 0.713 0.728 - 18.11 18.49
E 0.326 0.331 0.336 8.28 8.41 8.53
e 0.044 0.050 0.056 1.12 1.27 1.42
H 0.453 0.465 0.477 11.51 11.81 12.12
L 0.028 0.036 0.044 0.71 0.91 1.12
L1 0.059 0.067 0.075 1.50 1.70 1.91
S - -
0.047 - -
1.19
y - -
0.004 - -
0.10
θ 0° - 8° 0° - 8°
Notes:
1. The maximum value of dimension D includes end f lash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
A625308A Series
(September, 2006, Version 1.3) 13 AMIC Technology, Corp.
Package Information
TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions unit: inches/mm
Dimensions in inches Dimensions in mm
Symbol Min Nom Max Min Nom Max
A - - 0.049 - - 1.25
A1 0.002 - - 0.05 - -
A2 0.037 0.039 0.041 0.95 1.00 1.05
b 0.007 0.009 0.011 0.17 0.22 0.27
c 0.005 - 0.008 0.12 - 0.21
E 0.311 0.315 0.319 7.90 8.00 8.10
L 0.012 0.020 0.028 0.30 0.50 0.70
D 0.520 0.528 0.536 13.20 13.40 13.60
D1 0.461 0.465 0.469 11.70 11.80 11.90
e 0.022 BSC 0.55 BSC
S 0.017 TYP 0.425 TYP
y - - 0.004 - - 0.10
θ 0° - 5° 0° - 5°
Notes:
1. The maximum value of dimension D1 includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
D
1
E
e
D
L
A
A2
c
Detail "A"
D
y
Detail "A"
S
A1
b
28
15
1
14
θ
