TC74HC4051,4052,4053AP/AF/AFT
2016-10-18
1
TOS HIB A CMO S Digit a l Int egr at ed Cir c uit Silicon M on o lith ic
TC74HC4051AP, TC74HC4051AF, TC74HC4051AFT
TC74HC4052AP, TC74HC4052AF, TC74HC4052AFT
TC74HC4053AP, TC74HC4053AF, TC74HC4053AFT
TC74HC4051AP/AF/AFT
8-Channel Analog
Multiplexer/Demultiplexer
TC74HC4052AP/AF/AFT
Dual 4-Channel Analog
Multiplexer/Demultiplexer
TC74HC4053AP/AF/AFT
Triple 2-Channel Analog
Multiplexer/Demultiplexer
The TC74HC4051A/4052A/4053A are high speed CMOS
ANALOG MULTIPLEXER/DEMULTIPLEXER fabricated with
silicon gate C2MOS technology. They achieve the high speed
operation similar to equivalent LSTTL while maintaining the
CMOS low power dissipation.
The TC74HC4051A has an 8 channel configuration, the
TC74HC4052A has a 4 channel × 2 configuration and the
TC74HC4053A has a 2 channel × 3 configuration.
The digital signal to the control terminal turns “ON” the
corresponding switch of each channel a large amplitude signal
(VCC − VEE) can then be switched by the small logical amplitude
(VCC − GND) control signal.
For example, in the case of VCC = 5 V, GND = 0 V, VEE = −5 V,
signals between −5 V and +5 V can be switched from the logical
circuit with a single power supply of 5 V. As the ON-resistance of
each switch is low, they can be connected to circuits with low
input impedance.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: tpd = 15 ns (typ.) at VCC = 5 V, VEE = 0 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Low ON resistance: RON = 50 Ω (typ.) at VCC − VEE = 9 V
• High noise immunity: THD = 0.02% (typ.) at VCC − VEE = 9 V
• Pin and function compatible with 4051/4052/4053B
TC74HC4051AP, TC74HC4052AP,
TC74HC4053AP
TC74HC4051AF, T C74 HC4052AF,
TC74HC4053AF
TC74HC4051AFT, TC74HC4052AFT,
TC74HC4053AFT
Weight
DIP16
-P-300-2.54A : 1.00 g (typ.)
SOP16
-P-300-1.27A : 0.18 g (typ.)
TSSOP16-P-0044-0.65A : 0.06 g (typ.)
Start of commercial production
1986-05
TC74HC4051,4052,4053AP/AF/AFT
2016-10-18
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Pin Assignment
VCC
16
2
1
0
15
14
13
12
11
10
1
2
3
4
5
6
7
3
8
9
A
B
(top view)
TC74HC4051A
4
C
VCC
16
2X
1X
X-COM
15
14
13
12
11
10
1
2
3
4
5
6
7
3Y
1Y
INH
VEE
GND
0X
8
9
3X
A
(top view)
2Y
Y-COM
0Y
TC74HC4052A
B
VCC
16
Y-COM
X-COM
1X
15
14
13
12
11
10
1
2
3
4
5
6
7
Z-COM
0Z
INH
VEE
GND
0X
8
9
A
B
(top view)
0Y
1Z
TC74HC4053A
1Y
C
TC74HC4051,4052,4053AP/AF/AFT
2016-10-18
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IEC Logic Symbol
Truth Table
Control Inputs “ON” Channel
Inhibit C* B A HC4051A HC4052A HC4053A
L L L L 0 0 X, 0Y 0X, 0Y, 0Z
L L L H 1 1 X, 1Y 1X, 0Y, 0Z
L L H L 2 2X, 2Y 0X, 1Y, 0Z
L L H H 3 3 X, 3Y 1X, 1Y, 0Z
L H L L 4 ― 0X, 0Y, 1Z
L H L H 5 ― 1X, 0Y, 1Z
L H H L 6 ― 0X, 1Y, 1Z
L H H H 7 ― 1X, 1Y, 1Z
H X X X None None None
X: Don’t care
*: Except HC4052A
7
0
8×
(6)
(9)
(3)
(13)
(15)
(1)
1
3
5
(14)
(12)
(5)
2
4
6
2
G8
INH
C
(2)
7
(4)
0
TC74HC4051A
MUXDMUX
COM
0 ... 7
(10)
(11)
B
A
0
TC74HC4052A
3
0
4×
(6)
(9)
MUXDMUX
(13)
X-COM
Y-COM
(12)
(15)
(1)
(14)
(11)
(5)
1
G4
INH
(3)
(2)
(4)
B
(10)
A
0
1
3
2
0
0 ... 3
TC74HC4053A
(6)
MUXDMUX
(14)
X-COM
Z-COM
(12)
(13)
(1)
(2)
(5)
G2
INH
(4)
(3)
0Y
0Z
1X
1Y
1Z
0X
0, 1
C
(9)
Y-COM
(15)
B
(10)
A
C
(9)
(11)
2 × 0
2 × 1
TC74HC4051,4052,4053AP/AF/AFT
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System Diagram
TC74HC4051A
TC74HC4052A
TC74HC4053A
0X
3X
A
1Y
B
INH
1X
2X
0Y
2Y
3Y
Logic Level Converter
O/I
O/I
X-COM
Y-COM
I/O
c
I/O
c
X-COM
0Y
A
0Z
B
INH
C
0X
1X
1Y
1Z
Z-COM
Logic Level Converter
O/I
Y-COM
O/I
I/O
c
I/O
c
0
3
A
5
B
INH
C
I/O
1
2
4
6
7
Logic Level Converter
O/I
O/I
COM
c
I/O
c
TC74HC4051,4052,4053AP/AF/AFT
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Absolute Maximum Ratings (Note 1)
Characteristics Symbol Rating Unit
Supply voltage range VCC -0.5 to 7 V
Supply voltage range VCC-VEE -0.5 to 13 V
Control input voltage VIN -0.5 to VCC + 0.5 V
Switch I/O voltage VI/O VEE - 0.5 to VCC + 0.5 V
Control input diode current ICK ±20 mA
I/O diode current IIOK ±20 mA
Switch through current IT ±25 mA
DC VCC or ground current ICC ±50 mA
Power dissipation PD 500 (DIP) (Note 2)/180 (SOP/TSSOP) mW
Storage temperature Tstg -65 to 150 °C
Note 1: Exc eeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Conc ept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta = -40 to 65°C. From T a = 65 to 85°C a derating factor of -10 mW/°C should be
applied up to 300 mW.
Operating Ranges (Note)
Characteristics Symbol Rating Unit
Supply voltage range VCC 2 to 6 V
Supply voltage range VEE -6 to 0 V
Supply voltage range VCC-VEE 2 to 12 V
Control input voltage VIN 0 to VCC V
Swi tch I/O voltage VI/O VEE to VCC V
Operating temperature Topr -40 to 85 °C
Control input rise and fall time tr, tf
0 to 1000 (VCC = 2.0 V)
0 to 500 (VCC = 4.5 V)
0 to 400 (VCC = 6.0 V)
ns
Note: The operating ranges must be maintai ned to ensure the normal operation of the device.
Unused control inputs must be tied to either VCC or GND.
TC74HC4051,4052,4053AP/AF/AFT
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Electrical Characteristics
DC Characteristics
Characteristics Symbol Test Condition Ta = 25°C
Ta =
-40 to 85°C
Unit
VEE (V)
VCC (V)
Min Typ. Max Min Max
High-level control input
voltage VIHC ―
2.0
4.5
6.0
1.50
3.15
4.20
―
―
―
―
―
―
1.50
3.15
4.20
―
―
―
V
Low-level control input
voltage VILC ―
2.0
4.5
6.0
―
―
―
―
―
―
0.50
1.35
1.80
―
―
―
0.50
1.35
1.80
V
ON resistance RON
VIN = VILC or VIHC
VI/O = VCC to VEE
II/O ≤ 2 mA
GND
-4.5
-6.0
4.5
4.5
6.0
―
―
―
85
55
50
180
120
100
―
―
―
225
150
125
Ω
VIN = VILC or VIHC
VI/O = VCC or VEE
II/O ≤ 2 mA
GND
GND
-4.5
-6.0
2.0
4.5
4.5
6.0
―
―
―
―
150
70
50
45
―
150
100
80
―
―
―
―
―
190
125
100
Differenc e of ON
resistanc e between
switches ΔRON
VIN = VILC or VIHC
VI/O = VCC to VEE
II/O ≤ 2 mA
GND
-4.5
-6.0
4.5
4.5
6.0
―
―
―
10
5
5
30
12
10
―
―
―
35
15
12
Ω
Input/output leakage
current
(switch off) IOFF
VOS = VCC or GND
VIS = GND or VCC
VIN = VILC or VIHC
GND
-6.0
6.0
6.0
―
―
―
―
±60
±100
―
―
±600
±1000 nA
Switch input leakage
current
(switch on, output open) IIZ VOS = VCC or GND
VIN = VILC or VIHC
GND
-6.0
6.0
6.0
―
―
―
―
±60
±100
―
―
±600
±1000 nA
Control input current IIN VIN = VCC or GND GND 6.0 ― ― ±0.1 ― ±1.0 μA
Quiescent supply current ICC VIN = VCC or GND GND
-6.0
6.0
6.0
―
―
―
―
4.0
8.0
―
―
40.0
80.0 μA
TC74HC4051,4052,4053AP/AF/AFT
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AC Characteristics (CL = 50 pF, input: tr = tf = 6 ns, GND = 0 V)
Characteristics Symbol Test Condition Ta = 25°C
Ta =
-40 to 85°C
Unit
VEE (V)
VCC (V)
Min Typ. Max Min Max
Phase difference
between input and
output φI/O All types
GND
GND
GND
-4.5
2.0
4.5
6.0
4.5
―
―
―
25
6
5
4
60
12
10
―
―
―
―
―
75
15
13
―
ns
Output enable time tpZL
tpZH
4051A (Note 1)
GND
GND
GND
-4.5
2.0
4.5
6.0
4.5
―
―
―
64
18
15
18
225
45
38
―
―
―
―
―
280
56
48
―
ns
4052A (Note 1)
GND
GND
GND
-4.5
2.0
4.5
6.0
4.5
―
―
―
64
18
15
18
225
45
38
―
―
―
―
―
280
56
48
―
4053A (Note 1)
GND
GND
GND
-4.5
2.0
4.5
6.0
4.5
―
―
―
50
14
12
14
225
45
38
―
―
―
―
―
280
56
48
―
Output disable time tpLZ
tpHZ
4051A (Note 1)
GND
GND
GND
-4.5
2.0
4.5
6.0
4.5
―
―
―
100
33
28
29
250
50
43
―
―
―
―
―
315
63
54
―
ns
4052A (Note 1)
GND
GND
GND
-4.5
2.0
4.5
6.0
4.5
―
―
―
100
33
28
29
250
50
43
―
―
―
―
―
315
63
54
―
4053A (Note 1)
GND
GND
GND
-4.5
2.0
4.5
6.0
4.5
―
―
―
95
30
26
26
225
45
38
―
―
―
―
―
280
56
48
―
Control input
capacitance CIN All types ― ― ― 5 10 ― 10 pF
COMMON terminal
capacitance CIS
4051A
4052A
4053A
-5.0 5.0
―
―
―
36
19
11
70
40
20
―
―
―
70
40
20
pF
SWITCH terminal
capacitance COS
4051A
4052A
4053A
-5.0 5.0
―
―
―
7
7
7
15
15
15
―
―
―
15
15
15
pF
Feedthrough
capacitance CIOS
4051A
4052A
4053A
-5.0 5.0
―
―
―
0.95
0.85
0.75
2
2
2
―
―
―
2
2
2
pF
Power dissipation
capacitance CPD
4051A (Note 2)
4052A (Note 2)
4053A (Note 2)
GND 5.0
―
―
―
70
71
67
―
―
―
―
―
―
―
―
―
pF
Note 1: RL = 1 kΩ
Note 2: CPD is defined as the value of the inter n al equiv al ent cap ac it ance of IC which is calculated from the
operating curr ent con su mpti on without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC
TC74HC4051,4052,4053AP/AF/AFT
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8
Analog Sw i t ch Characteristics (GND = 0 V, Ta = 25°C) (Note 1)
Characteristics Symbol Test Conditi on Typ. Unit
V
EE
(V)
V
CC
(V)
Sine wave distortion
(T.H.D)
RL = 10 kΩ,
CL = 50 pF
fIN = 1 kHz
VIN = 4.0 Vp-p
VIN = 8.0 Vp-p
VIN = 11.0 Vp-p
-2.25
-4.5
-6.0
2.25
4.5
6.0
0.025
0.020
0.018
%
Frequency response
(switch on) fmax
Adjust fIN voltage to obtain
0dBm at VOS
Increas e fIN frequency until
dB meter reads -3dB
RL = 50 Ω, CL = 10 pF
fIN = 1 MHz, sine wave
All (Note 2)
-2.25 2.25
120
MHz
4051A (Note 3)
45
4052A (Note 3)
70
4053A (Note 3)
95
All (Note 2)
-4.5 4.5
190
4051A (Note 3)
70
4052A (Note 3)
110
4053A (Note 3)
150
All (Note 2)
-6.0 6.0
200
4051A (Note 3)
85
4052A (Note 3)
140
4053A (Note 3)
190
Feed through attenuati on
(switch off)
VIN is cent ered at (V CC - VEE)/2
Adjust input for 0dBm
RL = 600 Ω, CL = 50 pF
fIN = 1 MHz, sine wave
-2.25
-4.5
-6.0
2.25
4.5
6.0
-50
-50
-50
dB
Crosstalk
(control input to signal output) RL = 600 Ω, CL = 50 pF
fIN = 1 MHz, square wave (tr = tf = 6 ns)
-2.25
-4.5
-6.0
2.25
4.5
6.0
60
140
200
mV
Crosstalk
(between any switches)
Adjust VIN to obt ai n 0dBm at input
RL = 600 Ω, CL = 50 pF
fIN = 1 MHz, sine wave
-2.25
-4.5
-6.0
2.25
4.5
6.0
-50
-50
-50
dB
Note 1: Thes e characteristics are determined by design of devices.
Note 2: Input COMMON terminal, and measured at SWITCH terminal.
Note 3: Input SWITCH termin al, and measured at COMMON terminal.
SWITCH
t
erminal
COMMON terminal
TC74HC4051,4052,4053AP/AF/AFT
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Switchin g Chara ct er i st ics Test Circuits
1. tpLZ, tpHZ, tpZL, tpZH
2. Cross Talk (control input-switch output) fIN = 1 MHz duty = 50% tr = tf = 6 ns
3. Feed through Attenuation
VCC
GND
VOH
VOL
VOH
VOL
90%
tpHZ
tpLZ
tpZL
tpZH
50%
50%
50%
90%
10%
VC
VO/I
(S1 = VCC, S2 = GND)
VO/I
(S1 = GND, S2 = VCC)
6 ns
6 ns
1 kΩ
S2
GND
VEE
VCC
C
S1
from
P.G
O/I
I/O
VCC
50 pF
VCC
GND
from
P.G
600
Ω
50 pF
600
Ω
−
VCC
GND
VEE
VCC
C
O/I
I/O
VCC
0.1
μ
F
600
Ω
50 pF
600
Ω
VIN
GND
VEE
VCC
C
O/I
I/O
TC74HC4051,4052,4053AP/AF/AFT
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4. CIOS, CIS, COS
5. Cross Talk (between any two switches)
6. Frequency Response (switch on)
VCC
COS
COMMON
SWITCH
CIS
CIOS
GND
VEE
VCC
C
O/I
I/O
VIN
VCC
600 Ω
GND
VEE
600
Ω
50 pF
0.1 μF
600
Ω
50 pF
O/I
600
Ω
C
VCC
C
O/I
VCC
0.1 μF
50 Ω
10 pF
VIN
GND
VEE
VCC
C
O/I
I/O
TC74HC4051,4052,4053AP/AF/AFT
2016-10-18
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Package Dimensions
Weight: 1.00 g (typ.)
TC74HC4051,4052,4053AP/AF/AFT
2016-10-18
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Package Dimensions
Weight: 0.18 g (typ.)
TC74HC4051,4052,4053AP/AF/AFT
2016-10-18
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Package Dimensions
Weight: 0.06 g (typ.)
TC74HC4051,4052,4053AP/AF/AFT
2016-10-18
14
RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (coll ectively "TOSHIBA"), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collect i vely "Product") without notice.
• This document and any information herein may not be reproduced without pri or written permission from TOSHIBA. Even with
TOSHIBA's written permission, reproduct i on is permiss i bl e only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Produc t c an malfuncti on or fail. Cust omers are
responsibl e for compl ying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimi ze risk and avoid situations in which a malfunction or fail ur e of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before c ust om ers use the Product, create designs including the
Product, or incorporat e the Product into thei r own applicati ons, c ustomers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, includi ng without limitation, this document, the specific at i ons, t he data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA S emiconductor Reliability Handbook" and (b) the
instruct i ons for the applicati on with which the Product will be used with or for. Cust omers are sol ely responsibl e for all as pects of their
own product design or applications, includi ng but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluat ing and determ i ni ng the applic ability of any information contained in this document, or in charts,
diagrams, programs, al gorithms , sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DES IGN OR
APPLICATIONS.
• PRODUCT IS NEI THE R INTENDE D NO R WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AN D/OR RELIABILITY, AND/OR A MALFUNCTIO N O R FAIL URE OF WHI CH
MAY CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SE RIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLI C IMPACT
("UNINTENDED USE"). E xcept for s pecific appl ications as expressly stated in this document, Unintended Use includes, without
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