_0182998 ACRIAN INC 47 DE Pjo1aeqsa GENERAL DESCRIPTION All devices utilize the most advanced design and process technologies. These features provide the most consistent and reliable chip and package combination designed, built and tested specifically for use in airborne DME. * Gold thin-film metallization -- proven highest Mean Time to Failure. Surface passivation -- eliminates contamination and extends life. * Eutectic die attach -- reduces junction temperature and extends MTTF. * Gold controlled-loop wire bonding -- consistent RF perform * Low thermal-resistance packages -- reduce junction temperature and extend life. ABSOLUTE MAXIMUM RATINGS ooo1dbo o ff Oo 7-33-15 ; ance. Maximum Power Dissipation @ 25% Case Temperature 1700W Maximum Voltage and Current BVces Collector to Emitter Voltage 55V BVebo Emitter to Base Voltage 35V ke Collector Current 40A = | H M | __- _ Maximum Temperatures 3 Storage Temperature -65 to +200 -C - a Operating JunctionTemperature +200 C oe DiM| Millimeter Inches 12. (TYPICAL) POWER OUTPUT 600 G {3.81 EF 500 |> < = - 400 _ oO 5 300 Oo f Vec= 50V ui Pins 125W Pk 5 200 101sec @ 1% a 100 1025 1090 1150 FREQUENCY (MHz) 490 Race Street, San Jose, CA 95126 Phone Ewenny Rd., Bridgend, Mid Glamorgan, CF31 3LQ, United Kingdom, Phone (0656) 68021 ~~ - Ge coe REV A AUG 1987 Printed in USA eee 200, TW + 8) 204-4 eae X (910) 338-2172 (40 420182998 ACRIAN INC 4? DE Joraesis goo10b1 2 T-33-15 ELECTRICAL CHARACTERISTICS SYMBOL CHARACTERISTICS TEST CONDITIONS MIN. TYP. MAX. UNITS . | Pout Power Output 500 Watts Pin? Power Input f= 1025 to 1150 MHz 125 | Watts Pg Power Gain Voce 50V 6.0 cB Ne Collector Efficiency Pulse Width = 10 wse0 @ 1% 35 % VSWR Load Mismatch Tolerance 10:1 BVebo nite Beco Io= OA, lexOmA 35 Volts BVces Breakdown Voltage Vbe= 0A, Ic= 40mA 55 Volts (Collector to Emitter) Me DC-Current Gain Vee= SV, Ic= 500mA 10 100 Bic Thermal Resistance 0.1 Scnw Note 1: Tc = +25C unless otherwise specified Note 2: Pulse width 10sec @ 1% duty THERMAL RESISTANCE VS PULSE WIDTH _ 0.25 = Oo 2 0.2 a 2 0.15 a < - D 0.4 e z . Vec= 50V = 05 DF2z21% ~~ & / Tf= 30C = = 10 20 30 40 50 PULSE WIDTH (SEC) SPECIFICATIONS MAY BE SUBJECT TO CHANGE WITHOUT NOTICE0182998 ACRIAN INC = a7 SE Bouaassa Gndidos y PA _ 1-33-18 | SERIES INPUT IMPEDANCE VS FREQUENCY (TYPICAL) 5 R Lor a 4 ce < J O ix ' 3 2s, + re " Ss Vec= 50V { Pout= 500W _] Pw= 10 psec DF= 1% ! 1000 1050 1100 1150 1200 FREQUENCY (MHZ) 1025/1150 MHz TEST AMPLIFIER SERIES LOAD IMPEDANCE VS FREQUENCY (TYPICAL) 5 4 3 oa E x > S / . 3 1 4 or + <qrR fc 9 a -1 il pores N Vec= 50V 1 Pout= 500W j 3 Pwe 10 psec DF= 1% I 1000 1050 1100 1150 1200 FREQUENCY (MH2) Vcc mem = Microstrip line on Eyg ,t = 0.025" C1, C2 = 82 PF chip capacitor C3 = 500 FDe 75V capacitor