0.5 Ω CMOS Dual
2:1 MUX/SPDT Audio Switch
ADG884
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
FEATURES
1.8 V to 5.5 V operation
Ultralow on resistance:
0.34 Ω typical
0.38 Ω max at 5 V supply
Excellent audio performance, ultralow distortion:
0.1 Ω typical
0.15 Ω max RON flatness
High current-carrying capability:
400 mA continuous
600 mA peak current at 5 V supply
Rail-to-rail switching operation
Typical power consumption (<0.1 µW)
APPLICATIONS
Cellular phones
PDAs
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Modems
Audio and video signal routing
Communications systems
FUNCTIONAL BLOCK DIAGRAM
05028-001
S1A
S1B
S2A
S2B
IN2
ADG884
D1
D2
SWITCHES SHOWN FOR A LOGIC 1 INPUT
IN1
Figure 1.
GENERAL DESCRIPTION
The ADG884 is a low voltage CMOS device containing two
independently selectable single-pole, double-throw (SPDT)
switches. This device offers ultralow on resistance of less than
0.4 Ω over the full temperature range, making the part an ideal
solution for applications that require minimal distortion
through the switch. The ADG884 also has the capability of
carrying large amounts of current, typically 600 mA at 5 V
operation.
The ADG884 is available in a 10 bump, 2.0 mm × 1.50 mm
WLCSP package, a 10-lead LFCSP package, and a 10-lead
MSOP package. These tiny packages make the ADG884 the
ideal solution for space-constrained applications.
When on, each switch conducts equally well in both directions
and has an input signal range that extends to the supplies. The
ADG884 exhibits break-before-make switching action.
PRODUCT HIGHLIGHTS
1. Single 1.8 V to 5.5 V operation.
2. High current handling capability (400 mA continuous
current at 3.3 V).
3. 1.8 V logic-compatible.
4. Low THD + N (0.01% typ).
5. Tiny 2 mm × 1.5 mm WLCSP package and 3 mm × 3 mm
10-lead LFCSP package.
Table 1. ADG884 Truth Table
Logic (IN1/IN2) Switch 1A/2A Switch 1B/2B
0 Off On
1 On Off
ADG884
Rev. 0 | Page 2 of 16
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 8
Ter mi no lo g y .................................................................................... 11
Test Circ uits ..................................................................................... 12
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 15
REVISION HISTORY
10/04—Revision 0: Initial Version
ADG884
Rev. 0 | Page 3 of 16
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V, unless otherwise noted.1
Table 2.
Parameter 25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance, RON 0.28 Ω typ VDD = 4.5 V, VS = 0 V to VDD, IS = 100 mA
0.34 0.38 Ω max See Figure 18
On Resistance Match Between 0.01 Ω typ VDD = 4.5 V, VS = 2 V, IS = 100 mA
Channels, ∆RON 0.035 0.05 Ω max
On Resistance Flatness, RFLAT (ON) 0.1 Ω typ VDD = 4.5 V, VS = 0 V to VDD
0.13 0.15 Ω max IS = 100 mA
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage, IS (OFF) ±0.2 nA typ VS = 0.6 V/4.5 V, VD = 4.5 V/0.6 V; Figure 19
Channel On Leakage, ID, IS (ON) ±0.2 nA typ VS = VD = 0.6 V or 4.5 V; Figure 20
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.005 µA typ VIN = VINL or VINH
±0.1 µA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 42 ns typ RL = 50 Ω, CL = 35 pF
50 53 ns max VS = 3 V/0 V; Figure 21
tOFF 15 ns typ RL = 50 Ω, CL = 35 pF
20 21 ns max VS = 3 V; Figure 21
Break-Before-Make Time Delay, tBBM 16 ns typ RL = 50 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 1.5 V; Figure 22
Charge Injection 125 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Figure 23
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz;
Figure 24
Channel-to-Channel Crosstalk −120 dB typ S1A−S2A/S1B−S2B; RL = 50 Ω, CL = 5 pF,
f = 100 kHz; Figure 27
−60 dB typ
S1A−S1B/S2A−S2B; RL = 50 Ω, CL = 5 pF,
f = 100 kHz; Figure 26
Total Harmonic Distortion, THD + N 0.017 % RL = 32 Ω, f = 20 Hz to 20 kHz,
VS = 3.5 V p-p
Insertion Loss −0.03 dB typ RL = 50 Ω, CL = 5 pF; Figure 25
−3 dB Bandwidth 18 MHz typ RL = 50 Ω, CL = 5 pF; Figure 25
CS (OFF) 103 pF typ
CD, CS (ON) 295 pF typ
POWER REQUIREMENTS VDD = 5.5 V
IDD 0.003 µA typ Digital Inputs = 0 V or 5.5 V
1 µA max
1 Temperature range of the B version is −40°C to +85°C.
2 Guaranteed by design, not subject to production test.
ADG884
Rev. 0 | Page 4 of 16
VDD = 3.4 V to 4.2 V; GND = 0 V, unless otherwise noted.1
Table 3.
Parameter 25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance, RON 0.33 Ω typ VDD = 3.4 V, VS = 0 V to VDD, IS = 100 mA
0.38 0.45 Ω max See Figure 18
On Resistance Match Between 0.013 Ω typ VDD = 3.4 V, VS = 2 V, IS = 100 mA
Channels, ∆RON 0.042 0.065 Ω max
On Resistance Flatness, RFLAT (ON) 0.13 Ω typ VDD = 3.4 V, VS = 0 V to VDD
0.155 0.175 Ω max IS = 100 mA
LEAKAGE CURRENTS VDD = 4.2 V
Source Off Leakage, IS (OFF) ±0.2 nA typ VS = 0.6 V/3.9 V, VD = 3.9 V/0.6 V; Figure 19
Channel On Leakage, ID, IS (ON) ±0.2 nA typ VS = VD = 0.6 V or 3.9 V; Figure 20
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.005 µA typ VIN = VINL or VINH
±0.1 µA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 42 ns typ RL = 50 Ω, CL = 35 pF
50 54 ns max VS = 1.5 V/0 V; Figure 21
tOFF 15 ns typ RL = 50 Ω, CL = 35 pF
21 24 ns max VS = 1.5 V; Figure 21
Break-Before-Make Time Delay, tBBM 17 ns typ RL = 50 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 1.5 V; Figure 22
Charge Injection 100 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Figure 23
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz;
Figure 24
Channel-to-Channel Crosstalk −120 dB typ S1A−S2A/S1B−S2B; RL = 50 Ω, CL = 5 pF,
f = 100 kHz; Figure 27
−60 dB typ
S1A−S1B/S2A−S2B; RL = 50 Ω, CL = 5 pF,
f = 100 kHz; Figure 26
Total Harmonic Distortion, THD + N 0.01 % RL = 32 Ω, f = 20 Hz to 20 kHz,
VS = 2 V p-p
Insertion Loss −0.03 dB typ RL = 50 Ω, CL = 5 pF; Figure 25
−3 dB Bandwidth 18 MHz typ RL = 50 Ω, CL = 5 pF; Figure 25
CS (OFF) 110 pF typ
CD, CS (ON) 300 pF typ
POWER REQUIREMENTS VDD = 4.2 V
IDD 0.003 µA typ Digital Inputs = 0 V or 4.2 V
1 µA max
1 Temperature range of the B version is −40°C to +85°C.
2 Guaranteed by design, not subject to production test.
ADG884
Rev. 0 | Page 5 of 16
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.1
Table 4.
Parameter 25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance, RON 0.4 Ω typ VDD = 2.7 V, VS = 0 V to VDD
0.5 0.6 Ω max IS = 100 mA; Figure 18
On Resistance Match Between 0.02 Ω typ VDD = 2.7 V, VS = 0.6 V
Channels, ∆RON 0.07 0.1 Ω max IS = 100 mA
On Resistance Flatness, RFLAT (ON) 0.18 Ω typ VDD = 2.7 V, VS = 0 V to VDD
0.25 Ω max IS = 100 mA
LEAKAGE CURRENTS VDD = 3.6 V
Source Off Leakage, IS (OFF) ±0.2 nA typ VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V, Figure 19
Channel On Leakage, ID, IS (ON) ±0.2 nA typ VS = VD = 0.6 V or 3.3 V; Figure 20
DIGITAL INPUTS
Input High Voltage, VINH 1.3 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.005 µA typ VIN = VINL or VINH
±0.1 µA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 42 ns typ RL = 50 Ω, CL = 35 pF
56 62 ns max VS = 1.5 V/0 V; Figure 21
tOFF 14 ns typ RL = 50 Ω, CL = 35 pF
19 21 ns max VS = 1.5 V; Figure 21
Break-Before-Make Time Delay, tBBM 24 ns typ RL = 50 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 1.5 V; Figure 22
Charge Injection 85 pC typ VS = 1.25 V, RS = 0 Ω, CL = 1 nF; Figure 23
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 24
Channel-to-Channel Crosstalk −120 dB typ S1A−S2A/S1B−S2B; RL = 50 V, CL = 5 pF,
f = 100 kHz; Figure 27
−60 dB typ
S1A−S1B/S2A−S2B; RL = 50 Ω, CL = 5 pF,
f = 100 kHz; Figure 25
Total Harmonic Distortion, THD + N 0.03 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p
Insertion Loss −0.03 dB typ RL = 50 Ω, CL = 5 pF; Figure 25
–3 dB Bandwidth 18 MHz typ RL = 50 Ω, CL = 5 pF; Figure 25
CS (OFF) 110 pF typ
CD, CS (ON) 300 pF typ
POWER REQUIREMENTS VDD = 3.6 V
IDD 0.003 µA typ Digital Inputs = 0 V or 3.6 V
1 µA max
1 Temperature range of the B version is −40°C to +85°C.
2 Guaranteed by design, not subject to production test.
ADG884
Rev. 0 | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 5.
Parameter Rating
VDD to GND −0.3 V to +6 V
Analog Inputs1−0.3 V to VDD + 0.3 V
Digital Inputs1 −0.3 V to 6 V or 10 mA
(whichever occurs first)
Peak Current, S or D
5 V Operation 600 mA mA (pulsed at
1 ms, 10% duty cycle max)
Continuous Current, S or D
5 V Operation 400 mA
Operating Temperature Range
Industrial (B Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
10-Lead MSOP Package
θJA Thermal Impedance 206°C/W
θJC Thermal Impedance 44°C/W
10-Lead WLCSP Package
(4-Layer Board)
θJA Thermal Impedance 120 °C/W
10-Lead LFCSP Package
(4-Layer Board)
θJA Thermal Impedance 76 °C/W
θJC Thermal Impedance 13.5 °C/W
IR Reflow, Peak Temperature <20 s 235°C
1 Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
ADG884
Rev. 0 | Page 7 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
DD 1
S1
A
2
D1
3
IN1
4
S1B
5
S2A
10
D2
9
IN2
8
S2B
7
GND
6
ADG884
TOP VIEW
(Not to Scale)
05028-002
Figure 2. LFCSP and MSOP Pin Configuration
(SOLDER BUMPS ON
OPPOSITE SIDE)
S1B GND
IN1
D1
1
9
2
10
S1A V
DD
87
S2B
IN2
D2
3
4
5
S2A
6
05028-003
ADG884
TOP VIEW
(Not to Scale)
Figure 3. WLCSP Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
LFCSP, MSOP WLCSP Mnemonic Description
1 7 VDD Most Positive Power Supply Potential.
2, 5, 10, 7 6, 3, 8, 1 S1A, S1B, S2A, S2B Source Terminal. May be an input or output.
3, 9 5, 9 D1, D2 Drain Terminal. May be an input or output.
4, 8 4, 10 IN1, IN2 Logic Control Input.
6 2 GND Ground (0 V) Reference.
ADG884
Rev. 0 | Page 8 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
SIGNAL RANGE
ON RESISTANCE
0.30
0.25
0.20
0.15
0.10
0.05
0012345
05028-004
4.5V
4.2V
5.5V
T
A
= 25°C
I
DS
= 100mA
5V
Figure 4. On Resistance vs. VD (VS), VDD = 4.2 V to 5.5 V
SIGNAL RANGE
ON RESISTANCE
0.45
0.35
0.40
0.30
0.20
0.25
0.15
0.05
0.10
00 0.5 1.0 1.5 2.0 3.02.5
05028-005
2.7V
3.3V
T
A
= 25°C
I
DS
= 100mA
3V
Figure 5. On Resistance vs. VD (VS), VDD = 2.7 V to 3.3 V
SIGNAL RANGE
ON RESISTANCE
0.35
0.30
0.25
0.20
0.15
0.10
0.05
001234
05028-006
5
+85°C
+25°C
–40°C
V
DD
= 5V
I
DS
= 100mA
Figure 6. On Resistance vs. VD (VS) for Different Temperature, VDD = 5 V
SIGNAL RANGE
ON RESISTANCE
0.45
0.40
0.35
0.30
0.25
0.20
0.10
0.05
0.15
00 0.5 1.0 1.5 2.0 2.5 3.0
05028-007
+85°C
+25°C
–40°C
V
DD
= 3.3V
I
DS
= 100mA
Figure 7. On Resistance vs. VD (VS) for Different Temperature, VDD = 3.3 V
TEMPERATURE
LEAKAGE CURRENT (nA)
5
4
3
2
0
1
–1
–3
–4
–2
–5 01020304050 8060 70
05028-008
I
D
, I
S
(ON)
I
S
(OFF)
V
DD
= 5V
Figure 8. Leakage Current vs. Temperature, VDD = 5 V
TEMPERATURE
LEAKAGE CURRENT (nA)
5
3
4
2
1
0
–1 010 6050403020 8070
05028-009
I
D
, I
S
(ON)
I
S
(OFF)
V
DD
= 4.2V
Figure 9. Leakage Current vs. Temperature, VDD = 4.2 V
ADG884
Rev. 0 | Page 9 of 16
TEMPERATURE
LEAKAGE CURRENT (nA)
4.0
2.5
3.0
3.5
1.5
2.0
0
0.5
1.0
–0.5
–1.0 010 6050403020 8070
05028-026
I
D
, I
S
(ON)
I
S
(OFF)
V
DD
= 3.3V
Figure 10. Leakage Current vs. Temperature, VDD = 3.3 V
V
S
(V)
Q
INJ
(pC)
600
400
500
300
200
100
00 0.5 1.0 1.5 3.53.02.52.0 4.54.0 5.0
05028-010
V
DD
= 5V
V
DD
= 4.2V
V
DD
= 3V
T
A
= 25°C
Figure 11. Charge Injection vs. Source Voltage
TEMPERATURE (°C)
TIMES
50
40
30
20
10
0
–40 –20 0 4020 60 80
05028-011
t
ON
t
OFF
VDD = 5V
VDD = 3V
VDD = 5V
VDD = 3V
TA = 25°C
Figure 12. tON/tOFF Times vs. Temperature
FREQUENCY (MHz)
ATTENUATION (dB)
0
–3
–2
–1
–4
–5
–6
–7
–8
0.03 0.10 10.001.00 100.00
05028-022
TA = 25°C
VDD = 5V/4.2V/3V
Figure 13. Bandwidth
FREQUENCY (MHz)
ATTENUATION (dB)
0
–30
–20
–10
–40
–50
–60
–70
–8010 100 1M 10M1k 10k 100k 100M
05028-023
TA = 25°C
VDD = 5V/4.2V/3V
Figure 14. Off Isolation vs. Frequency
FREQUENCY (MHz)
ATTENUATION (dB)
0
–30
–20
–10
–40
–50
–60
–70
–8010 100 1M 10M1k 10k 100k 100M
05028-024
T
A
= 25°C
V
DD
= 5V/4.2V/3V
Figure 15. Crosstalk vs. Frequency
ADG884
Rev. 0 | Page 10 of 16
FREQUENCY (MHz)
ATTENUATION (dB)
0
–60
–40
–20
–80
–100
–120
–140
–16010 100 1M 10M1k 10k 100k 100M
05028-025
T
A
= 25°C
V
DD
= 5V/4.2V/3V
Figure 16. AC PSRR
FREQUENCY (kHz)
THD + N (%)
0.10
0.04
0.05
0.06
0.07
0.08
0.09
0.03
0.02
0.01
00 10k 20k 30k 70k60k50k40k 90k80k 100k
05028-027
4.2V, 2V p-p
5V, 3.5V p-p
3V, 1.5V p-p
Figure 17. THD + N
ADG884
Rev. 0 | Page 11 of 16
TERMINOLOGY
IDD
Positive supply current.
VD (VS)
Analog voltage on Terminals D, S.
RON
Ohmic resistance between D and S.
RFLAT (ON)
The difference between the maximum and minimum values of
on resistance as measured on the switch.
∆RON
On resistance match between any two channels.
IS (OFF)
Source leakage current with the switch off.
ID (OFF)
Drain leakage current with the switch off.
ID, IS (ON)
Channel leakage current with the switch on.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
CS (OFF)
Off switch source capacitance. Measured with reference to
ground.
CD (OFF)
Off switch drain capacitance. Measured with reference to
ground.
CD, CS (ON)
On switch capacitance. Measured with reference to ground.
CIN
Digital input capacitance.
tON
Delay time between the 50% and 90% points of the digital input
and switch on condition.
tOFF
Delay time between the 50% and 90% points of the digital input
and switch off condition.
tBBM
On or off time measured between the 80% points of both
switches when switching from one to another.
Charge Injection
Measure of the glitch impulse transferred from the digital input
to the analog output during on-off switching.
Off Isolation
Measure of unwanted signal coupling through an off switch.
Crosstalk
Measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
−3 dB Bandwidth
Frequency at which the output is attenuated by 3 dB.
On Response
Frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
THD + N
Ratio of the harmonics amplitude plus noise of a signal to the
fundamental.
ADG884
Rev. 0 | Page 12 of 16
TEST CIRCUITS
SD
V
S
R
ON
= V1/I
DS
I
DS
V1
05028-012
Figure 18. On Resistance
SD
V
S
V
D
I
S
(OFF) I
D
(OFF)
A A
05028-013
Figure 19. Off Leakage
SD
V
D
I
D
(ON)
NC A
05028-014
Figure 20. On Leakage
05028-015
D
IN
GND
RL
50Ω
CL
35pF
VDD
VIN
VOUT
VS
VDD
VOUT
t
ON
t
OFF
50% 50%
90% 90%
0.1µF
S1B
S1A
Figure 21. Switching Times, tON, tOFF
V
OUT
V
IN
t
BBM
t
BBM
50% 50%
80%
0V
D
IN
GND
RL
50Ω
C
L
35pF
V
DD
V
OUT
V
S
V
DD
0.1µF
S1B
S1A 80%
05028-016
Figure 22. Break-Before-Make Time Delay, tBBM
05028-017
IN
GND
V
DD
V
S
V
IN
V
OUT
1nF
V
OUT
NC
SW ON
Q
INJ
= CL ×∆V
OUT
SW OFF
∆V
OUT
S1B
S1A
D
Figure 23. Charge Injection
ADG884
Rev. 0 | Page 13 of 16
05028-018
V
DD
V
S
V
DD
NC
NETWORK
ANALYZER
S1B S1A
GND
OFF ISOLATION = 20 LOG
D
50Ω50Ω
V
OUT
R
L
50Ω
0.1µF
V
OUT
VS
Figure 24. Off Isolation
NETWORK
ANALYZER
R
L
GND
V
DD
V
DD
V
OUT
V
S
S1AS1B
0.1µF
D
50Ω
50Ω
INSERTION LOSS = 20 LOG V
OUT
WITH SWITCH
V
OUT
WITHOUT SWITCH
05028-019
Figure 25. Channel-to-Channel Crosstalk (S1A–S1B)
05028-020
V
OUT
V
DD
V
DD
GND
V
S
R
L
50ΩR
L
50Ω
0.1µF
50Ω
S1A
D
S1B
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG V
OUT
VS
Figure 26. Bandwidth
05028-021
V
OUT
50Ω
50Ω
50Ω
V
S
NETWORK
ANALYZER
S2A
S2B
D1
D2 NC
NC
S1A
S1B
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG V
OUT
VS
Figure 27. Channel-to-Channel Crosstalk (S1A–S2A)
ADG884
Rev. 0 | Page 14 of 16
OUTLINE DIMENSIONS
3.00
BSC SQ
INDEX
AREA
TOP VIEW
1.50
BCS SQ EXPOSED
PAD
(BOTTOM VIEW)
1.74
1.64
1.49
2.48
2.38
2.23
1
6
10
0.50
BSC
0.50
0.40
0.30
5
PIN 1
INDICATOR
0.80
0.75
0.70 0.05 MAX
0.02 NOM
SEATING
PLANE 0.30
0.23
0.18
0.20 REF
0.80 MAX
0.55 TYP
SIDE VIEW
Figure 28. 10-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body
(CP-10-9)
Dimensions shown in millimeters
0.23
0.08
0.80
0.60
0.40
8°
0°
0.15
0.00 0.27
0.17
0.95
0.85
0.75
SEATING
PLANE
1.10 MAX
10 6
5
1
0.50 BSC
3.00 BSC
3.00 BSC
4.90 BSC
PIN 1
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187BA
Figure 29. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
SEATING
PLANE
0.50 BSC
BALL PITCH
1.66
1.60
1.54
0.26
0.22
0.18
0.11
0.09
0.07
0.36
0.32
0.28
0.63
0.57
0.51
BOTTOM
VIEW
2.06
2.00
1.94
TOP VIEW
(BALL SIDE DOWN)
123
104
95
876
BUMP 1
IDENTIFIER
Figure 30. 10-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-10)
Dimensions shown in millimeters
ADG884
Rev. 0 | Page 15 of 16
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding1
ADG884BRMZ2−40°C to +85°C Mini Small Outline Package (MSOP) RM-10 S9C
ADG884BRMZ-REEL2 −40°C to +85°C Mini Small Outline Package (MSOP) RM-10 S9C
ADG884BRMZ-REEL72 −40°C to +85°C Mini Small Outline Package (MSOP) RM-10 S9C
ADG884BCPZ-REEL2 −40°C to +85°C Lead Frame Chip Scale Package (LFCSP) CP-10-9 S9C
ADG884BCPZ-REEL72 −40°C to +85°C Lead Frame Chip Scale Package (LFCSP) CP-10-9 S9C
ADG884BCB-500RL7 −40°C to +85°C Micro Chip Scale Package (WLCSP) CB-10 S9C
ADG884BCB-REEL −40°C to +85°C Micro Chip Scale Package (WLCSP) CB-10 S9C
ADG884BCB-REEL7 −40°C to +85°C Micro Chip Scale Package (WLCSP) CB-10 S9C
ADG884BCBZ2 −40°C to +85°C Micro Chip Scale Package (WLCSP) CB-10 S9C
1 Branding on this package is limited to three characters due to space constraints.
2 Z = Pb-free package.
ADG884
Rev. 0 | Page 16 of 16
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05028-0-10/04(0)
