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IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
MAY 2010
2005 Integrated Device Technology, Inc. DSC 6879/-c
IDT49FCT3805B
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
BUFFER/CLOCK DRIVER
DESCRIPTION:
The FCT3805B is a 3.3 volt, non-inverting clock driver built using
advanced dual metal CMOS technology. The device consists of two banks
of drivers, each with a 1:5 fanout and its own output enable control. The
device has a "heartbeat" monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document. The FCT3805B offers low capacitance
inputs with hysteresis.
The FCT3805B is designed for high speed clock distribution where
signal quality and skew are critical. The FCT3805B also allows single
point-to-point transmission line driving in applications such as address
distribution, where one signal must be distributed to multiple recievers with
low skew and high signal quality.
For more information on using the FCT3805B with two different input
frequencies on bank A and B, please see AN-236.
FUNCTIONAL BLOCK DIAGRAM
5OA1 - OA5
OB1 - OB5
OEA
INA
OEB
INB
MON
5
PIN CONFIGURATION
OA1
OA3
OA4
GNDQ
INA
VCCA
OA2
GNDA
OA5
OEA
1
2
3
4
5
6
7
8
9
OB3
OB4
MON
INB
VCCB
OB1
OB2
GNDB
OB5
OEB
11
12
13
14
15
16
17
18
19
20
10
SOIC/ SSOP/ QSOP
TOP VIEW
FEATURES:
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 500ps (max.)
• Very low duty cycle distortion < 1.0ns (max.)
• Very low CMOS power levels
• TTL compatible inputs and outputs
• Inputs can be driven from 3.3V or 5V components
• Two independent output banks with 3-state control
• 1:5 fanout per bank
• "Heartbeat" monitor output
•V
CC = 3.3V ± 0.3V
• Available in SSOP, SOIC, and QSOP packages
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max Unit
VTERM(2) Terminal Voltage with Respect to GND –0.5 to +4.6 V
VTERM(3) Terminal Voltage with Respect to GND –0.5 to +7 V
VTERM(4) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to +60 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. Input terminals.
4. Outputs and I/O terminals.
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 5.5 8 pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names Description
OEA, OEB3-State Output Enable Inputs (Active LOW)
INA, INBClock Inputs
OAn, OBn Clock Outputs
MON Monitor Output
FUNCTION TABLE (1)
Inputs Outputs
OEA, OEBINA, INBOAn, OBn MON
LLLL
LHHH
HLZL
HHZH
NOTE:
1. H = HIGH
L = LOW
Z = High-Impedance
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IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified
Commercial: TA = 0°C to +70°C, Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
Symbol Parameter Test Conditions(1) Min. Typ. Max. Unit
VIH Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2 — 5. 5 V
Input HIGH Level (I/O pins) 2 — VCC + 0.5
VIL Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level –0.5 — 0.8 V
IIH Input HIGH Current (Input pins) VCC = Max. VI = 5.5V — — ±1
Input HIGH Current (I/O pins) VI = VCC ——±1µA
IIL Input LOW Current (Input pins) VCC = Max. VI = GND — — ±1
Input LOW Current (I/O pins) VI = GND — — ±1
IOZH High Impedence Output Current VCC = Max. VO = VCC ——±1µA
IOZL (3-State Output Pins) VO = GND — — ±1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) –36 –60 –110 mA
IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) 50 90 200 mA
VOH Output HIGH Voltage VCC = Min. IOH = –0.1mA VCC–0.2 — —
VIN = VIH or VIL IOH = –8mA 2.4(5) 3—V
VOL Output LOW Voltage VCC = Min. IOL = 0.1mA — — 0.2
VIN = VIH or VIL IOL = 16mA — 0.2 0.4 V
IOL = 24mA — 0.3 0.5
IOFF Input Power Off Leakage VCC = 0V, VIN = 4.5V — — ±1µA
IOS Short Circuit Current(4) VCC = Max., VO = GND (3) –60 –135 –240 mA
VHInput Hysteresis — — 150 — mV
ICCL Quiescent Power Supply Current VCC = Max. — 0.1 10 µ A
ICCH VIN = GND or VCC
ICCZ
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. VOH = Vcc - 0.6V at rated current.
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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input (VIN = VCC -0.6V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fONO)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = VCC -0.6V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fO = Output Frequency
NO = Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
∆ICC Quiescent Power Supply Current VCC = Max. — 10 30 µA
TTL Inputs HIGH VIN = VCC –0.6V(3)
ICCD Dynamic Power Supply Current(4) VCC = Max. VIN = VCC — 0.035 0.06 mA/MHz
Outputs Open VIN = GND
OEA = OEB = GND
Per Output Toggling
50% Duty Cycle
ICTotal Power Supply Current(6) VCC = Max. VIN = VCC — 0.9 1.6
Outputs Open VIN = GND
fO = 25MHz
50% Duty Cycle VIN = VCC –0.6V — 0.9 1.6
OEA = OEB = VCC VIN = GND
Mon. Output Toggling
VCC = Max. VIN = VCC —2033
(5) mA
Outputs Open VIN = GND
fO = 50MHz
50% Duty Cycle VIN = VCC –0.6V — 20 33(5)
OEA = OEB = GND VIN = GND
Eleven Outputs Toggling
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IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE (3,4)
Commercial Industrial
Symbol Parameter Conditions(1) Min.(2) Max.Unit
tPLH Propagation Delay CL = 50pF 1. 5 5 1.5 5.2 ns
tPHL INA to OAn, INB to OBn RL = 500Ω
tROutput Rise Time — 2 — 2 ns
tFOutput Fall Time — 2 — 2 ns
tSK(O) Output skew: skew between outputs of all banks of — 0.5 — 0.6 ns
same package (inputs tied together)
tSK(P) Pulse skew: skew between opposite transitions — 1 — 1 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different — 1.2 — 1.2 ns
packages at same power supply voltage,
temperature, package type and speed grade
tPZL Output Enable Time 1.5 6 1.5 6 ns
tPZH OEA to OAn, OEB to OBn
tPLZ Output Disable Time 1.5 5 1.5 5 ns
tPHZ OEA to OAn, OEB to OBn
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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
D.U.T.
V
IN
V
OUT
V
CC
R
T
Pulse
Generator 50pF
500
500
6V
GND
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
3V
1.5V
0V
3.5V
0V
SWITCH
CLOSED
SWITCH
OPEN
VOL
VOH
0.3V
0.3V
tPLZ
tPZL
tPZH tPHZ
3.5V
0V
1.5V
1.5V
ENABLE DISABLE
3V
0V
VOH
tPLH tPHL
VOL
1.5V
1.5V
tRtF
2.0V
0.8V
INPUT
OUTPUT
tPLH tPHL
3V
0V
VOH
1.5V
1.5V
VOL
tSK(p) = |tPHL - tPLH|
INPUT
OUTPUT
tPLH1
OUTPUT 1
OUTPUT 2
tSK(o)
tPLH2
3V
0V
VOH
1.5V
1.5V
VOL
VOH
1.5V
VOL
INPUT
tPHL1
tPHL2
tSK(o)
tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
INPUT
tPLH1
PACKAGE 1
OUTPUT
tSK(t)
tPLH2
3V
0V
VOH
1.5V
1.5V
VOL
VOH
1.5V
VOL
tPHL1
tPHL2
tSK(t)
tSK(t) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
PACKAGE 2
OUTPUT
Package Delay
TEST CIRCUITS AND WAVEFORMS
Pulse Skew - tSK(P)
Test Circuits for All Outputs
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Switch
Disable LOW 6V
Enable LOW
Disable HIGH G ND
Enable HIGH
SWITCH POSITION
Output Skew - tSK(X)
Output Skew - tSK(O)
Package Skew - tSK(T)
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH
2. Pulse Generator for All Pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
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IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT49FCT
Device Type
X
Package
3805B Non-Inverting 3.3V Buffer/Clock Driver
SO
SOG
PY
PYG
Q
QG
Small Outline IC
SOIC - Green
Shrink Small Outline IC
SSOP - Green
Quarter-size Small Outline IC
QSOP - Green
Blank
I
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)
XXXX X
Package
CORPORATE HEADQUARTERS for SALES: for Tech Support:
6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 clockhelp@idt.com
San Jose, CA 95138 fax: 408-284-2775
www.idt.com
