DATASHEET ISL28118, ISL28218 FN7532 Rev 7.00 July 27, 2015 40V Precision Single-Supply, Rail-to-rail Output, Low-power Operational Amplifiers The ISL28118, ISL28218 are single and dual, low-power precision amplifiers optimized for single-supply applications. These devices feature a common mode input voltage range extending to 0.5V below the V- rail, a rail-to-rail differential input voltage range for use as a comparator and rail-to-rail output voltage swing, which makes them ideal for single-supply applications where input operation at ground is important. Features These op amps feature low power, low offset voltage and low temperature drift, making them the ideal choice for applications requiring both high DC accuracy and AC performance. These amplifiers are designed to operate over a single supply range of 3V to 40V or a split supply voltage range of +1.8V/-1.2V to 20V. The combination of precision and small footprint provides the user with outstanding value and flexibility relative to similar competitive parts. * Low noise current. . . . . . . . . . . . . . . . . . . . . . . . . . . 355fA/Hz Applications for these amplifiers include precision instrumentation, data acquisition, precision power supply controls and industrial controls. * Rail-to-rail output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10mV * Below-ground (V-) input capability to -0.5V, ground sensing * Single-supply range . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 40V * Low current consumption . . . . . . . . . . . . . . . . . . . . . . . 850A * Low noise voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6nV/Hz * Low input offset voltage - ISL28118 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150V (max) - ISL28218 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230V (max) * Superb offset voltage temperature drift - ISL28118 . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2V/C (max) - ISL28218 . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4V/C (max) * Operating temperature range. . . . . . . . . . . -40C to +125C * No phase reversal Both parts are offered in 8 Ld SOIC and 8 Ld MSOP packages. All devices are offered in standard pin configurations and operate across the extended temperature range of -40C to +125C. Applications Related Literature * Medical instrumentation * Precision instruments * Data acquisition * AN1595, "ISL28218SOICEVAL1Z Evaluation Board User's Guide" * Power supply control * Industrial process control Rf 100k RIN- IN- 10k RIN+ IN+ 10k V+ ISL28118 V- 300 +3V to 40V 200 -40C VOUT VOS (V) LOAD RSENSE 400 + GAIN = 10 RREF+ 100 +25C +125C 0 -100 -200 100k -300 VREF -400 -16 -15 -14 -13 13 14 15 INPUT COMMON MODE VOLTAGE (V) FIGURE 1. TYPICAL APPLICATION: SINGLE-SUPPLY, LOW-SIDE CURRENT SENSE AMPLIFIER FN7532 Rev 7.00 July 27, 2015 FIGURE 2. INPUT OFFSET VOLTAGE vs INPUT COMMON MODE VOLTAGE, VS = 15V Page 1 of 29 16 ISL28118, ISL28218 Table of Contents Pin Configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical Specifications (VS 15V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical Specifications (VS 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Stage Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Drive Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Phase Reversal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Channel Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISL28118 and ISL28218 SPICE Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 19 19 19 19 19 20 20 Characterization vs Simulation Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 M8.15E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 M8.118B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 FN7532 Rev 7.00 July 27, 2015 Page 2 of 29 ISL28118, ISL28218 Pin Configurations ISL28218 (8 LD SOIC, 8 LD MSOP) TOP VIEW ISL28118 (8 LD SOIC, 8 LD MSOP) TOP VIEW NC 1 8 NC -IN 2 7 +IN 3 V- 4 - + VOUT_A 1 V+ -IN_A 2 6 VOUT +IN_A 3 5 NC V- 4 - + + - 8 V+ 7 VOUT_B 6 -IN_B 5 +IN_B Pin Descriptions ISL28118 ISL28218 (8 LD SOIC, MSOP) (8 LD SOIC, MSOP) PIN NAME EQUIVALENT CIRCUIT DESCRIPTION 3 3 +IN, +IN_A 1 Amplifier A noninverting input 2 2 -IN, -IN_A 1 Amplifier A inverting input 6 1 VOUT, VOUT_A 2 Amplifier A output 4 4 V- 3 Negative power supply 5 +IN_B 1 Amplifier B noninverting input 6 -IN_B 1 Amplifier B inverting input 7 VOUT_B 2 Amplifier B output 7 8 V+ 3 Positive power supply 1, 5, 8 - NC - No Connect IN- V+ V+ IN+ OUT V- VCIRCUIT 1 FN7532 Rev 7.00 July 27, 2015 CIRCUIT 2 V+ CAPACITIVELY TRIGGERED ESD CLAMP VCIRCUIT 3 Page 3 of 29 ISL28118, ISL28218 Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING TEMP RANGE (C) PACKAGE (RoHS Compliant) PKG. DWG. # ISL28118FBZ 28118 FBZ -40 to +125 8 Ld SOIC M8.15E ISL28118FUZ 8118Z -40 to +125 8 Ld MSOP M8.118B ISL28218FBZ 28218 FBZ -40 to +125 8 Ld SOIC M8.15E ISL28218FUZ 8218Z -40 to +125 8 Ld MSOP M8.118B ISL28218SOICEVAL1Z Evaluation Board NOTES: 1. Add "-T*" suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information pages for ISL28118, ISL28218. For more information on MSL, please see Technical Brief TB363. FN7532 Rev 7.00 July 27, 2015 Page 4 of 29 ISL28118, ISL28218 Absolute Maximum Ratings Thermal Information Maximum Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42V Maximum Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Maximum Differential Input Voltage . . . . . . . . 42V or V- - 0.5V to V+ + 0.5V Min/Max Input Voltage . . . . . . . . . . . . . . . . . . . 42V or V- - 0.5V to V+ + 0.5V Max/Min Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Output Short-circuit Duration (1 output at a time) . . . . . . . . . . . . . . Indefinite ESD Tolerance Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 3kV Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 300V Charged Device Model (Tested per JESD22-CI0ID). . . . . . . . . . . . . . . 2kV ESD Tolerance (ISL28118 SOIC package only) Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . 5.5kV Machine Model (Tested per JESD22-A115-C) . . . . . . . . . . . . . . . . . 300V Charged Device Model (Tested per JESD22-CI0ID). . . . . . . . . . . . . . . 2kV Thermal Resistance (Typical) JA (C/W) JC (C/W) ISL28118 8 Ld SOIC Package (Notes 4, 5) . . . . . . . . . 120 60 8 Ld MSOP Package (Notes 4, 5) . . . . . . . . 165 57 ISL28218 8 Ld SOIC Package (Notes 4, 5) . . . . . . . . . 120 55 8 Ld MSOP Package (Notes 4, 5) . . . . . . . . 150 58 Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Recommended Operating Conditions Ambient Operating Temperature Range . . . . . . . . . . . . . -40C to +125C Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . +150C Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 3V (+1.8V/-1.2V) to 40V (20V) CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 5. For JC, the "case temp" location is taken at the package top center. Electrical Specifications (VS 15V) VCM = 0, VO = 0V, RL = Open, TA= +25C, unless otherwise noted. Boldface entries apply across the operating temperature range, -40C to +125C. Temperature data established by characterization. PARAMETER VOS DESCRIPTION Input Offset Voltage TEST CONDITIONS ISL28118 MIN (Note 6) TYP MAX (Note 6) UNIT -150 25 150 V 270 V 230 V 290 V -270 ISL28218 -230 40 -290 TCVOS VOS Input Offset Voltage Temperature Coefficient Input Offset Voltage Match (ISL28218 only) IB Input Bias Current TCIB Input Bias Current Temperature Coefficient IOS Input Offset Current ISL28118 -1.2 0.2 1.2 V/C ISL28218 -1.4 0.3 1.4 V/C All packages -280 44 280 V SOIC -365 365 V MSOP -390 390 V -575 -230 nA -0.8 nA/C -800 -50 nA 4 -75 CMRR VCMIR Common Mode Rejection Ratio Common Mode Input Voltage Range FN7532 Rev 7.00 July 27, 2015 VCM = V- - 0.5V to V+ - 1.8V VCM = V- to V+ -1.8V ISL28118 SOIC 102 VCM = V- to V+ -1.8V ISL28218 SOIC 103 VCM = V- to V+ -1.8V ISL28118 and ISL28218 MSOP 102 Guaranteed by CMRR test 50 nA 75 nA 118 dB 118 dB 98 dB 118 dB 99 dB 118 dB 97 dB V- - 0.5 V+ - 1.8 V V- V+ - 1.8 V Page 5 of 29 ISL28118, ISL28218 Electrical Specifications (VS 15V) VCM = 0, VO = 0V, RL = Open, TA= +25C, unless otherwise noted. Boldface entries apply across the operating temperature range, -40C to +125C. Temperature data established by characterization. (Continued) PARAMETER PSRR DESCRIPTION Power Supply Rejection Ratio TEST CONDITIONS VS = 3V to 40V, VCMIR = Valid Input Voltage MIN (Note 6) TYP 109 124 MAX (Note 6) dB 105 AVOL VOL VOH IS Open-loop Gain Output Voltage Low, VOUT to V(see Figure 32) VO = -13V to +13V, RL = 10k to ground, ISL28118 SOIC 125 VO = -13V to +13V, RL = 10k to ground, ISL28218 SOIC 125 VO = -13V to +13V, RL = 10k to ground, ISL28118 and ISL28218 MSOP 120 UNIT dB 136 dB 120 dB 136 dB 122 dB 136 dB 116 dB ISL28118 RL = 10k 70 mV 85 mV ISL28218 RL = 10k 70 mV 73 mV Output Voltage High, V+ to VOUT (see Figure 32) ISL28118 ISL28218 RL = 10k 110 mV 120 mV Supply Current/Amplifier ISL28118 RL = Open 0.85 1.2 mA ISL28218 RL = Open 0.85 ISC+ Output Short-circuit Source Current RL = 10to V- ISC- Output Short-circuit Sink Current RL = 10to V+ VSUPPLY Supply Voltage Range Guaranteed by PSRR 1.6 mA 1.1 mA 1.4 mA 16 mA 28 3 mA 40 V AC SPECIFICATIONS GBWP Gain Bandwidth Product ACL = 101, VOUT = 100mVP-P; RL = 2k enp-p Voltage Noise en 4 MHz 0.1Hz to 10Hz, VS = 18V 300 nVP-P Voltage Noise Density f = 10Hz, VS = 18V 8.5 nV/Hz en Voltage Noise Density f = 100Hz, VS = 18V 5.8 nV/Hz en Voltage Noise Density f = 1kHz, VS = 18V 5.6 nV/Hz en Voltage Noise Density f = 10kHz, VS = 18V 5.6 nV/Hz in Current Noise Density f = 1kHz, VS = 18V 355 fA/Hz THD + N Total Harmonic Distortion + Noise 1kHz, G = 1, VO = 3.5VRMS, RL = 10k 0.0003 % TRANSIENT RESPONSE SR Slew Rate AV = 1, RL = 2kVO = 10VP-P 1.2 V/s tr, tf, Small Signal Rise Time 10% to 90% of VOUT AV = 1, VOUT = 100mVP-P, Rf = 0 RL = 2kto VCM 100 ns Fall Time 90% to 10% of VOUT AV = 1, VOUT = 100mVP-P, Rf = 0 RL = 2kto VCM 100 ns Settling Time to 0.01% 10V Step; 10% to VOUT AV = 1, VOUT = 10VP-P, Rf = 0 RL = 2kto VCM 8.5 s ts FN7532 Rev 7.00 July 27, 2015 Page 6 of 29 ISL28118, ISL28218 Electrical Specifications (VS 5V) VS 5V, VCM = 0, VO = 0V, TA = +25C, unless otherwise noted. Boldface entries apply across the operating temperature range, -40C to +125C. Temperature data established by characterization. PARAMETER VOS DESCRIPTION Input Offset Voltage TEST CONDITIONS ISL28118 MIN (Note 6) TYP MAX (Note 6) UNITS -150 25 150 V 270 V 230 V -270 ISL28218 -230 40 -290 TCVOS VOS Input Offset Voltage Temperature Coefficient 290 V ISL28118 -1.2 0.2 1.2 V/C ISL28218 -1.4 0.3 1.4 V/C -280 44 280 V 365 V Input Offset Voltage Match (ISL28218 only) IB Input Bias Current TCIB Input Bias Current Temperature Coefficient IOS Input Offset Current -365 -575 -230 nA -0.8 nA/C -800 -50 nA 4 -75 CMRR VCMIR PSRR AVOL Common Mode Rejection Ratio VCM = V- - 0.5V to V+ - 1.8V VCM = V- to V+ -1.8V ISL28118 and ISL28218 SOIC 101 VCM = V- to V+ -1.8V ISL28118 and ISL28218 MSOP 101 50 nA 75 nA 119 dB 117 dB 97 dB 117 dB 96 dB Common Mode Input Voltage Range Guaranteed by CMRR test Power Supply Rejection Ratio VS = 3V to 10V, VCMIR = Valid Input Voltage, ISL28118 and ISL28218 SOIC 109 ISL28118 MSOP 108 124 dB ISL28218 MSOP 107 124 dB ISL28118 and ISL28218 MSOP 103 VO = -3V to +3V, RL = 10k to ground, ISL28118 and ISL28218 SOIC 122 ISL28118 and ISL28218 MSOP 120 Open-loop Gain V- - 0.5 V+ - 1.8 V V- V+ - 1.8 V 124 dB 105 dB dB 132 dB 117 dB 132 dB 115 VOL VOH IS Output Voltage Low, VOUT to V(see Figure 32) RL = 10k Output Voltage High, V+ to VOUT (see Figure 31) RL = 10k Supply Current/Amplifier RL = Open dB 0.85 38 mV 45 mV 65 mV 70 mV 1.1 mA 1.4 mA ISC+ Output Short-circuit Source Current RL = 10to V- 13 mA ISC- Output Short-circuit Sink Current 20 mA FN7532 Rev 7.00 July 27, 2015 RL = 10to V+ Page 7 of 29 ISL28118, ISL28218 Electrical Specifications (VS 5V) VS 5V, VCM = 0, VO = 0V, TA = +25C, unless otherwise noted. Boldface entries apply across the operating temperature range, -40C to +125C. Temperature data established by characterization. (Continued) PARAMETER DESCRIPTION TEST CONDITIONS MIN (Note 6) TYP MAX (Note 6) UNITS AC SPECIFICATIONS GBWP Gain Bandwidth Product ACL = 101, VOUT = 100mVP-P; RL = 2k 3.2 MHz enp-p Voltage Noise 0.1Hz to 10Hz 320 nVP-P en Voltage Noise Density f = 10Hz 9 nV/Hz en Voltage Noise Density f = 100Hz 5.7 nV/Hz en Voltage Noise Density f = 1kHz 5.5 nV/Hz en Voltage Noise Density f = 10kHz 5.5 nV/Hz in Current Noise Density f = 1kHz 380 fA/Hz THD + N Total Harmonic Distortion + Noise 1kHz, G = 1, VO = 1.25VRMS, RL = 10k 0.0003 % TRANSIENT RESPONSE SR Slew Rate AV = 1, RL = 2kVO = 4VP-P 1 V/s tr, tf, Small Signal Rise Time 10% to 90% of VOUT AV = 1, VOUT = 100mVP-P , Rf = 0 RL = 2k to VCM 100 ns Fall Time 90% to 10% of VOUT AV = 1, VOUT = 100mVP-P , Rf = 0, RL = 2k to VCM 100 ns Settling Time to 0.01% 4V Step; 10% to VOUT AV = 1, VOUT = 4VP-P, Rf = 0, RL = 2k to VCM 4 s ts NOTE: 6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. FN7532 Rev 7.00 July 27, 2015 Page 8 of 29 ISL28118, ISL28218 Typical Performance Curves VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. 200 200 VOS (V) FIGURE 3. ISL28118 INPUT OFFSET VOLTAGE DISTRIBUTION 18 NUMBER OF AMPLIFIERS 16 12 10 8 6 4 120 100 80 60 40 20 0 -40 -20 175 200 150 125 100 75 50 25 0 8 6 4 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 -25 10 2 FN7532 Rev 7.00 July 27, 2015 -50 12 0 FIGURE 7. ISL28118 TCVOS vs NUMBER OF AMPLIFIERS 15V VS = 5V 14 2 TCVOS (V/C) VOS (V) FIGURE 6. ISL28218 INPUT OFFSET VOLTAGE DISTRIBUTION VS = 15V 14 -75 50 VOS (V) FIGURE 5. ISL28218 INPUT OFFSET VOLTAGE DISTRIBUTION NUMBER OF AMPLIFIERS 100 0 200 150 175 125 75 100 50 25 0 -25 -50 -75 -100 50 150 -100 100 200 -125 NUMBER OF AMPLIFIERS 150 -125 NUMBER OF AMPLIFIERS VS = 5V 200 16 -60 250 VS = 15V 18 VOS (V) FIGURE 4. ISL28118 INPUT OFFSET VOLTAGE DISTRIBUTION 250 0 -80 50 0 120 80 100 60 40 0 20 -20 -40 -60 -80 0 -100 50 100 -100 100 150 -120 NUMBER OF AMPLIFIERS VS = 5V 150 -120 NUMBER OF AMPLIFIERS VS = 15V TCVOS (V/C) FIGURE 8. ISL28118 TCVOS vs NUMBER OF AMPLIFIERS 5V Page 9 of 29 ISL28118, ISL28218 Typical Performance Curves VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. (Continued) 30 35 NUMBER OF AMPLIFIERS 25 20 15 10 5 VS = 5V 30 25 20 15 10 5 0 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 NUMBER OF AMPLIFIERS VS = 15V TCVOS (V/C) TCVOS (V/C) FIGURE 9. ISL28218 TCVOS vs NUMBER OF AMPLIFIERS 15V FIGURE 10. ISL28218 TCVOS vs NUMBER OF AMPLIFIERS 5V 100 400 90 300 80 200 -40C 60 VOS (V) VOS (V) 70 VS = 15V 50 40 30 100 +25C 0 +125C -100 -200 20 VS = 5V 10 0 -40 -20 0 20 -300 40 60 80 100 -400 -16 120 -15 TEMPERATURE (C) FIGURE 11. VOS vs TEMPERATURE -14 -13 13 14 15 FIGURE 12. INPUT OFFSET VOLTAGE vs INPUT COMMON MODE VOLTAGE, VS = 15V 0 -150 -50 VS = 20V -200 -100 VS = 15V -200 IBIAS (nA) IBIAS (nA) -150 -250 -300 -250 -300 VS = +2V/-1V -350 VS = 2.25V -350 -400 VS = 5V -450 -500 16 INPUT COMMON MODE VOLTAGE (V) 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 VS (V) FIGURE 13. IBIAS vs VS FN7532 Rev 7.00 July 27, 2015 -400 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) FIGURE 14. IBIAS vs TEMPERATURE vs SUPPLY Page 10 of 29 ISL28118, ISL28218 VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. (Continued) 124 124 122 122 120 120 CMRR (dB) CMRR (dB) Typical Performance Curves 118 116 118 116 114 114 112 112 110 -40 -20 0 20 40 60 80 100 110 -40 120 -20 0 TEMPERATURE (C) FIGURE 15. ISL28118 CMRR vs TEMPERATURE, VS = 15V 132 132 130 130 60 80 100 120 128 126 126 CHANNEL-A 124 124 CMRR (dB) CMRR (dB) 40 FIGURE 16. ISL28118 CMRR vs TEMPERATURE, VS = 5V 128 122 120 118 116 CHANNEL-B 122 120 118 CHANNEL-A 116 CHANNEL-B 114 114 112 112 110 -40 -20 0 20 40 60 80 100 110 -40 120 -20 0 TEMPERATURE (C) FIGURE 17. ISL28218 CMRR vs TEMPERATURE, VS = 15V 140 130 120 110 100 90 80 70 60 50 40 30 VS = 15V 20 SIMULATION 10 0 1m 0.01 0.1 1 40 60 80 100 120 FIGURE 18. ISL28218 CMRR vs TEMPERATURE, VS = 5V 140 ISL28118 135 130 125 120 ISL28218 115 110 105 10 100 1k 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) FIGURE 19. CMRR vs FREQUENCY, VS = 15V FN7532 Rev 7.00 July 27, 2015 20 TEMPERATURE (C) PSRR (dB) CMRR (dB) 20 TEMPERATURE (C) 100 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) FIGURE 20. PSRR vs TEMPERATURE, VS = 15V Page 11 of 29 ISL28118, ISL28218 140 130 120 110 100 90 80 70 60 50 40 VS = 15V 30 AV = 1 20 CL = 4pF 10 RL = 10k 0 VCM = 1VP-P -10 10 100 VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. (Continued) PSRR+ PSRR (dB) PSRR (dB) Typical Performance Curves PSRR- 1k 10k 100k FREQUENCY (Hz) 1M 10M 140 130 120 110 100 90 80 70 60 50 40 VS = 5V 30 AV = 1 20 CL = 4pF 10 RL = 10k 0 VCM = 1VP-P -10 10 100 200 180 160 140 120 100 80 60 40 20 0 -20 -40 -60 VS = 15V -80 RL = 1M -100 1m 0.01 0.1 PSRR- 1k 10k 100k FREQUENCY (Hz) 70 60 PHASE Rf = 10k, RG = 100 GAIN 40 30 20 ACL = 10 Rf = 10k, RG = 1k 10 0 ACL = 1 -10 100 10 100 1k 10k 100k 1M 10M100M 1G VS = 5V AND 15V CL = 4pF RL = 2k VOUT = 100mVP-P ACL = 100 Rf = 0, RG = 1k 10k FIGURE 23. OPEN-LOOP GAIN, PHASE vs FREQUENCY, VS = 15V 1M 10M FIGURE 24. FREQUENCY RESPONSE vs CLOSED LOOP GAIN 1 1 0 0 -1 -1 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 100k FREQUENCY (Hz) FREQUENCY (Hz) -2 -3 RL = OPEN, 100k, 10k -4 RL = 1k -5 -6 10M Rf = 10k, RG = 10 ACL = 1000 50 1 1M FIGURE 22. PSRR vs FREQUENCY, VS = 5V GAIN (dB) GAIN (dB) FIGURE 21. PSRR vs FREQUENCY, VS = 15V PSRR+ RL = 499 VS = 15V RL = 100 CL = 4pF -7 A = +1 V -8 VOUT = 100mVp-p -9 100 1k RL = 49.9 10k 100k 1M FREQUENCY (Hz) FIGURE 25. GAIN vs FREQUENCY vs RL, VS = 15V FN7532 Rev 7.00 July 27, 2015 10M -2 -3 RL = OPEN, 100k, 10k -4 RL = 1k -5 -6 RL =R499 L= VS = 5V CL = 4pF -7 A = +1 V -8 VOUT = 100mVp-p -9 100 1k RL = 100 RL = 49.9 10k 100k 1M 10M FREQUENCY (Hz) FIGURE 26. GAIN vs FREQUENCY vs RL, VS = 5V Page 12 of 29 ISL28118, ISL28218 Typical Performance Curves VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. (Continued) 1 0 0 -1 -1 -2 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 1 VOUT = 10mVP-P -3 VOUT = 50mVP-P -4 -5 VOUT = 100mVP-P VS = 5V -6 VOUT = 500mVP-P CL = 4pF -7 A = +1 V -8 RL = INF -9- VOUT = 1VP-P 1k 100 10k 100k 1M VS = 1.5V -2 -3 VS = 5V -4 -5 -6 CL = 4pF R = 10k -7 L AV = +1 -8 VOUT = 100mVP-P -9 100 10M 1k 10k 100k 10M FIGURE 27. GAIN vs FREQUENCY vs OUTPUT VOLTAGE FIGURE 28. GAIN vs FREQUENCY vs SUPPLY VOLTAGE 90 40 VS = 5V 38 RL = 10k VS = 15V RL = 10k 80 VOH 36 VOH AND VOL (mV) VOH 70 60 VOL 50 34 32 30 28 26 24 VOL 22 40 -40 -20 0 20 40 60 80 100 20 -40 120 -20 0 20 40 60 80 100 120 TEMPERATURE (C) TEMPERATURE (C) FIGURE 29. OUTPUT OVERHEAD VOLTAGE vs TEMPERATURE, VS = 15V, RL = 10k FIGURE 30. OUTPUT OVERHEAD VOLTAGE vs TEMPERATURE, VS = 5V, RL = 10k 1 1 VS = 5V and 15V VS = 5V and 15V 0.1 +125C +125C -40C 0.01 0.001 0.001 0.01 0.1 1 10 LOAD CURRENT (mA) FIGURE 31. OUTPUT OVERHEAD VOLTAGE HIGH vs LOAD CURRENT, VS = 5V AND 15V FN7532 Rev 7.00 July 27, 2015 +25C 0.1 +25C VOL - V- (V) V+ - VOH (V) 1M FREQUENCY (Hz) FREQUENCY (Hz) VOH AND VOL (mV) VS = 15V -40C 0.01 0.001 0.001 0.01 0.1 1 LOAD CURRENT (mA) 10 FIGURE 32. OUTPUT OVERHEAD VOLTAGE LOW vs LOAD CURRENT, VS = 5V AND 15V Page 13 of 29 ISL28118, ISL28218 Typical Performance Curves VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. (Continued) 5 14 VS = 15V 13 AV = 2 Rf = RG = 100k 12 VIN = 7.5VDC 11 +125C -40C 10 -10 -11 +75C 0C -12 -13 +75C 0C +25C -3 0 2 4 6 8 10 12 14 16 18 -5 20 0 2 4 6 I-FORCE (mA) 10 12 14 16 18 20 FIGURE 34. OUTPUT VOLTAGE SWING vs LOAD CURRENT VS = 5V 1400 1400 1200 1200 CURRENT (A) VS = 21V 1000 VS = 15V 800 VS = 2.25V 600 400 -40 8 I-FORCE (mA) FIGURE 33. OUTPUT VOLTAGE SWING vs LOAD CURRENT VS = 15V CURRENT (A) +125C -4 -14 -15 4 VS = 5V AV = 2 3 Rf = RG = 100k VIN = 2.5VDC 2 -40C 1 -1 -2 +25C VOL VOL VOH VOH 15 -20 0 20 40 60 80 VS = 21V 1000 VS = 15V 800 VS = 2.25V 600 100 120 400 -40 -20 0 TEMPERATURE (C) 20 40 60 80 100 120 TEMPERATURE (C) FIGURE 35. ISL28118 SUPPLY CURRENT vs TEMPERATURE vs SUPPLY VOLTAGE FIGURE 36. ISL28218 SUPPLY CURRENT vs TEMPERATURE vs SUPPLY VOLTAGE 1100 ISUPPLY PER AMPLIFIER (A) 1000 ISL28218 900 800 700 ISL28118 600 500 400 300 200 100 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 VSUPPLY (V) FIGURE 37. SUPPLY CURRENT vs SUPPLY VOLTAGE FN7532 Rev 7.00 July 27, 2015 Page 14 of 29 ISL28118, ISL28218 Typical Performance Curves VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. (Continued) 10 10 INPUT NOISE CURRENT 1 0.1 0.1 1 10 100 1k 10k 1 0.1 100k VS = 5V INPUT NOISE VOLTAGE 10 10 INPUT NOISE CURRENT 1 1 0.1 0.1 1 10 100 1k FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 38. INPUT NOISE VOLTAGE (en) AND CURRENT (in) vs FREQUENCY, VS = 18V 500 300 INPUT NOISE VOLTAGE (nV) INPUT NOISE VOLTAGE (nV) VS = 18V AV = 10k 400 200 100 0 -100 -200 -300 -400 0 1 2 3 4 5 6 7 8 9 300 200 100 0 -100 -200 -300 -400 -500 10 VS = 5V AV = 10k 400 0 1 2 3 FIGURE 40. INPUT NOISE VOLTAGE 0.1Hz TO 10Hz, VS = 18V 0.01 VS = 15V CL = 4pF RL = 2k VOUT = 10VP-P C-WEIGHTED 22Hz TO 500kHz 0.1 +40C AV = 10 +125C +25C 0.001 +25C AV = 1 +125C 100 1k FREQUENCY (Hz) 10k 100k FIGURE 42. THD+N vs FREQUENCY vs TEMPERATURE, AV = 1, 10, RL = 2k FN7532 Rev 7.00 July 27, 2015 6 7 C-WEIGHTED VS = 15V 22Hz TO 500kHz CL = 4pF RL = 10k VOUT = 10VP-P +125C 8 9 10 -40C +25C 0.01 AV = 10 0.001 AV = 1 -40C 0.0001 10 5 FIGURE 41. INPUT NOISE VOLTAGE 0.1Hz TO 10Hz, VS = 5V THD + N (%) 0.1 4 TIME (s) TIME (s) THD + N (%) 0.1 100k 10k FIGURE 39. INPUT NOISE VOLTAGE (en) AND CURRENT (in) vs FREQUENCY, VS = 5V 500 -500 INPUT NOISE CURRENT (fA/Hz) INPUT NOISE VOLTAGE 100 100 INPUT NOISE VOLTAGE (nV/Hz) INPUT NOISE VOLTAGE (nV/Hz) VS = 18V INPUT NOISE CURRENT (fA/Hz) 100 100 -40C 0.0001 +25C 10 100 +125C 1k 10k 100k FREQUENCY (Hz) FIGURE 43. THD+N vs FREQUENCY vs TEMPERATURE, AV = 1, 10, RL = 10k Page 15 of 29 ISL28118, ISL28218 Typical Performance Curves VS = 15V CL = 4pF RL = 2k f = 1kHz THD + N (%) 0.1 1 VS = 15V CL = 4pF RL = 10k 0.1 f = 1kHz C-WEIGHTED 22Hz TO 22kHz THD + N (%) 1 VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. (Continued) +125C -40C +25C 0.01 AV = 10 AV = 1 0.001 0.0001 5 10 15 -40C 0.01 AV = 10 AV = 1 -40C 20 25 30 0.0001 0 FIGURE 44. THD+N vs OUTPUT VOLTAGE (VOUT) vs TEMPERATURE, AV = 1, 10, RL = 2k 1.6 1.2 0.8 VOUT (V) VOUT (V) VS = 5V AV = 1 RL = 2k CL = 4pF 2.0 0 0.4 0 -0.4 -2 -0.8 -4 -1.2 -1.6 -6 -2.0 -2.4 20 30 40 50 60 TIME (s) 70 80 90 100 FIGURE 46. LARGE SIGNAL 10V STEP RESPONSE, VS = 15V 100 6 40 20 5 INPUT AND OUTPUT (V) 60 0 10 20 30 40 50 60 TIME (s) 70 80 90 100 FIGURE 47. LARGE SIGNAL 4V STEP RESPONSE, VS = 5V VS = 15V AND VS = 5V AV = 1 RL = 2k CL = 4pF 80 VOUT (mV) 30 2.4 VS = 15V AV = 1 4 RL = 2k CL = 4pF 2 0 -20 -40 -60 -80 -100 25 FIGURE 45. THD+N vs OUTPUT VOLTAGE (VOUT) vs TEMPERATURE, AV = 1, 10, RL = 10k 6 10 -40C +125C +25C 10 15 20 VOUT (VP-P) 5 VOUT (VP-P) 0 +125C +25C 0.001 +125C +25C 0 C-WEIGHTED 22Hz TO 22kHz 4 VS = 5V VIN = 5.9V INPUT 3 2 1 OUTPUT 0 -1 -2 -3 -4 -5 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 TIME (s) FIGURE 48. SMALL SIGNAL TRANSIENT RESPONSE, VS = 5V, 15V FN7532 Rev 7.00 July 27, 2015 1.8 2 -6 0 1 2 TIME (ms) 3 4 FIGURE 49. NO PHASE REVERSAL Page 16 of 29 ISL28118, ISL28218 VS = 15V AV = 100 RL = 10k VIN = 100mVP-P OVERDRIVE = 1V 16 -40 -4 -80 -8 INPUT 12 OUTPUT 8 40 4 -160 0 40 -200 0 4 8 12 16 20 24 TIME (s) 28 32 36 INPUT VS = 5V AV = 100 RL = 10k VIN = 50mVP-P OVERDRIVE = 1V 50 40 OUTPUT 0 4 8 12 16 20 24 -1 4 -20 -2 0 OUTPUT -30 -3 VS = 5V -4 AV = 100 RL = 10k VIN = 50mVP-P -5 OVERDRIVE = 1V -40 1 -50 0 40 -60 INPUT 0 16 20 24 28 32 36 0 4 8 12 16 FIGURE 52. POSITIVE OUTPUT OVERLOAD RESPONSE TIME, VS = 5V 24 28 32 36 -6 40 FIGURE 53. NEGATIVE OUTPUT OVERLOAD RESPONSE TIME, VS = 5V 100 100 VS = 15V VS = 5V AV = 10 10 AV = 10 10 ZOUT () AV = 100 ZOUT () 20 TIME (s) TIME (s) 1 0.10 AV = 100 1 0.10 AV = 1 AV = 1 0.01 -20 40 -10 10 12 36 5 2 8 32 0 20 4 28 6 3 30 0 VS = 15V -12 AV = 100 RL = 10k VIN = 100mVP-P -16 OVERDRIVE = 1V FIGURE 51. NEGATIVE OUTPUT OVERLOAD RESPONSE TIME, VS = 15V OUTPUT (V) 60 OUTPUT TIME (s) FIGURE 50. POSITIVE OUTPUT OVERLOAD RESPONSE TIME, VS = 15V INPUT (mV) -120 80 0 0 OUTPUT (V) 120 0 INPUT (mV) INPUT (mV) 160 20 OUTPUT (V) INPUT INPUT (mV) 200 VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. (Continued) OUTPUT (V) Typical Performance Curves 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FIGURE 54. OUTPUT IMPEDANCE vs FREQUENCY, VS = 15V FN7532 Rev 7.00 July 27, 2015 0.01 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FIGURE 55. OUTPUT IMPEDANCE vs FREQUENCY, VS = 5V Page 17 of 29 ISL28118, ISL28218 Typical Performance Curves OVERSHOOT (%) 50 60 VS = 15V VOUT = 100mVP-P 50 AV = 1 40 OVERSHOOT (%) 60 VS = 15V, VCM = 0V, RL = Open, TA = +25C, unless otherwise specified. (Continued) AV = 10 AV = -1 30 20 AV = 1 40 20 10 0.001 0.010 0.100 1 10 0 0.001 100 0.01 LOAD CAPACITANCE (nF) 10 100 30 VS = 15V 28 R = 10k L 26 VS = 15V 28 R = 10k L 26 24 22 ISC-SINK 24 ISC-SINK ISC (mA) ISC (mA) 1 FIGURE 57. OVERSHOOT vs CAPACITIVE LOAD, VS = 5V 30 20 18 ISC-SOURCE 16 22 20 18 16 14 14 12 12 -40 -20 0 20 40 60 80 100 10 -40 120 TEMPERATURE (C) VS = 15V AV = 1 10k 100k FREQUENCY (Hz) FIGURE 60. MAX OUTPUT VOLTAGE vs FREQUENCY FN7532 Rev 7.00 July 27, 2015 -20 0 20 40 60 80 100 120 FIGURE 59. ISL28218 SHORTCIRCUIT CURRENT vs TEMPERATURE, VS = 15V CROSSTALK (dB) 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 1k ISC-SOURCE TEMPERATURE (C) FIGURE 58. ISL28118 SHORTCIRCUIT CURRENT vs TEMPERATURE, VS = 15V VOUT (VP-P) 0.1 LOAD CAPACITANCE (nF) FIGURE 56. OVERSHOOT vs CAPACITIVE LOAD, VS = 15V 10 AV = 10 AV = -1 30 10 0 VS = 5V VOUT = 100mVP-P 1M 150 140 130 120 110 100 90 80 70 60 50 RL_TRANSMIT = 40 30 RL_RECEIVE = 10k RL_TRANSMIT = 2k 20 10 RL_RECEIVE = 10k 0 10 100 1k 10k 100k FREQUENCY (Hz) VS = 15V CL = 4pF VCM = 1VP-P 1M 10M FIGURE 61. CHANNEL SEPARATION vs FREQUENCY, RL = INF, VS = 15V Page 18 of 29 ISL28118, ISL28218 Applications Information V+ Functional Description The ISL28118 and ISL28218 are single and dual, 3.2MHz, single-supply, rail-to-rail output amplifiers with a common mode input voltage range extending to a range of 0.5V below the V- rail. Their input stages are optimized for precision sensing of ground-referenced signals in single-supply applications. The input stage is able to handle large input differential voltages without phase inversion, making these amplifiers suitable for high-voltage comparator applications. Their bipolar design features high open loop gain and excellent DC input and output temperature stability. These op amps feature very low quiescent current of 850V and low temperature drift. Both devices are fabricated in a new precision 40V complementary bipolar DI process and are immune from latch-up. Operating Voltage Range The op amp is designed to operate over a single supply range of 3V to 40V or a split supply voltage range of +1.8V/-1.2V to 20V. The device is fully characterized at 10V (5V) and 30V (15V). Both DC and AC performance remain virtually unchanged over the complete operating voltage range. Parameter variation with operating voltage is shown in the "Typical Performance Curves" on page 9. The input common mode voltage to the V+ rail (V+ -1.8V over the full temperature range) may limit amplifier operation when operating from split V+ and V- supplies. Figure 12 on page 10 shows the common mode input voltage range variation overtemperature. Input Stage Performance The ISL28118 and ISL28218 PNP input stage has a common mode input range extending up to 0.5V below ground at +25C (Figure 12). Full amplifier performance is guaranteed down for input voltage down to ground (V-) over the -40C to +125C temperature range. For common mode voltages down to -0.5V below ground (V-), the amplifiers are fully functional, but performance degrades slightly over the full temperature range. This feature provides excellent CMRR, AC performance and DC accuracy when amplifying low-level, ground-referenced signals. The input stage has a maximum input differential voltage equal to a diode drop greater than the supply voltage (max 42V) and does not contain the back-to-back input protection diodes found on many similar amplifiers. This feature enables the device to function as a precision comparator by maintaining very high input impedance for high-voltage differential input comparator voltages. The high differential input impedance also enables the device to operate reliably in large signal pulse applications, without the need for anti-parallel clamp diodes required on MOSFET and most bipolar input stage op amps. Thus, input signal distortion caused by nonlinear clamps under high slew rate conditions is avoided. In applications where one or both amplifier input terminals are at risk of exposure to voltages beyond the supply rails, current-limiting resistors may be needed at each input terminal (see Figure 62, RIN+, RIN-) to limit current through the power-supply ESD diodes to 20mA. FN7532 Rev 7.00 July 27, 2015 VINVIN+ RIN- - RIN+ + RF RL RG V- FIGURE 62. INPUT ESD DIODE CURRENT LIMITING Output Drive Capability The bipolar rail-to-rail output stage features low saturation levels that enable an output voltage swing to less than 15mV when the total output load (including feedback resistance) is held below 50A (Figures 31 and 32). With 15V supplies, this can be achieved by using feedback resistor values >300k. The output stage is internally current limited. Output current limit over-temperature is shown in Figures 33 and 34. The amplifiers can withstand a short-circuit to either rail as long as the power dissipation limits are not exceeded. This applies to only one amplifier at a time for the dual op amp. Continuous operation under these conditions may degrade long-term reliability. The amplifiers perform well when driving capacitive loads (Figures 56 and 57). The unity gain, voltage follower (buffer) configuration provides the highest bandwidth but is also the most sensitive to ringing produced by load capacitance found in BNC cables. Unity gain overshoot is limited to 35% at capacitance values to 0.33nF. At gains of 10 and higher, the device is capable of driving more than 10nF without significant overshoot. Output Phase Reversal Output phase reversal is a change of polarity in the amplifier transfer function when the input voltage exceeds the supply voltage. The ISL28118 and ISL28218 are immune to output phase reversal out to 0.5V beyond the rail (VABS MAX) limit (Figure 49). Single Channel Usage The ISL28218 is a dual op amp. If the application requires only one channel, the user must configure the unused channel to prevent it from oscillating. The unused channel oscillates if the input and output pins are floating. This results in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent oscillation is to short the output to the inverting input and ground the positive input (Figure 63). + FIGURE 63. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Page 19 of 29 ISL28118, ISL28218 Power Dissipation ISL28118 and ISL28218 SPICE Model It is possible to exceed the +150C maximum junction temperatures under certain load and power supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related using Equation 1: Figure 64 on page 21 shows the SPICE model schematic and Figure 65 on page 22 shows the net list for the SPICE model. The model is a simplified version of the actual device and simulates important AC and DC parameters. AC parameters incorporated into the model are: 1/f and flatband noise voltage, slew rate, CMRR and gain and phase. The DC parameters are IOS, total supply current and output voltage swing. The model uses typical parameters given in the "Electrical Specifications" table beginning on page 5. The AVOL is adjusted for 136dB with the dominant pole at 0.6Hz. The CMRR is set at 120dB, f = 50kHz. The input stage models the actual device to present an accurate AC representation. The model is configured for an ambient temperature of +25C. T JMAX = T MAX + JA xPD MAXTOTAL (EQ. 1) Where * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package PDMAX for each amplifier can be calculated using Equation 2: V OUTMAX PD MAX = V S I qMAX + V S - V OUTMAX ---------------------------R (EQ. 2) L Where * PDMAX = Maximum power dissipation of 1 amplifier * VS = Total supply voltage * IqMAX = Maximum quiescent supply current of one amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance Figures 66 through 80 show the characterization vs simulation results for the noise voltage, open loop gain phase, closed loop gain vs frequency, gain vs frequency vs RL, CMRR, large signal 10V step response, small signal 0.1V step and output voltage swing 15V supplies. LICENSE STATEMENT The information in the SPICE model is protected under United States copyright laws. Intersil Corporation hereby grants users of this macro-model, hereto referred to as "Licensee", a nonexclusive, nontransferable licence to use this model, as long as the Licensee abides by the terms of this agreement. Before using this macro-model, the Licensee should read this license. If the Licensee does not accept these terms, permission to use the model is not granted. The Licensee may not sell, loan, rent, or license the macro-model, in whole, in part, or in modified form, to anyone outside the Licensee's company. The Licensee may modify the macro-model to suit his/her specific applications and the Licensee may make copies of this macro-model for use within their company only. This macro-model is provided "AS IS, WHERE IS AND WITH NO WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE." In no event will Intersil be liable for special, collateral, incidental, or consequential damages in connection with, or arising out of, the use of this macro-model. Intersil reserves the right to make changes to the product and the macro-model without prior notice. FN7532 Rev 7.00 July 27, 2015 Page 20 of 29 DX I2 54E-6 Vin- 9 Vin+ Q8 CinDif 1.33E-12 5 D14 3 0 750 R1 5e11 DX D5 V3 -0.91 18 +R9 GAIN = 1 1e-3 19 Vg V2 -0.96 15 R4 1k 6 R6 G2 1 GAIN = 0.65897 D4 V-- Input Stage V+ 1st Gain Stage V++ V++ V++ R13 795.7981 L3 3.18319E-09 G9 + GAIN = 1.2566e-3 21 R11 1e-3 Vc 23 D10 D7 DX C3 10e-12 D11 DX G5 + GAIN = 1 GAIN = 1 DX C1 R7 6.6667E-11 3.7304227e9 12 V-- GAIN = 1 L1 3.18319E-09 14 EOS +- + - PNP_LATERAL 11 Cin2 4.02e-12 Cin1 4.02e-12 0 10 PNP_input Q9 PNP_input D2DBREAK R3 1k E2 ++ - - 16 Q6 Q7 8 IOS 4e-9 Vcm En R18 GAIN = 0.3 + GAIN = 1.69138e-3 7 DX R17 2 + - +- 750 DN DN 0 PNP_LATERAL R2 5e11 V8 4 D13 DN V7 -0.91 +- 1 1 GAIN = 0.65897 V1 D1DBREAK 0.1 R5 13 - 0.1 D3 G1 + - I3 54E-6 ISL28118, ISL28218 FN7532 Rev 7.00 July 27, 2015 I1 80e-6 V5 24 -0.4 26 R15 80 G13 GAIN = 12.5e-3 Vout VOUT 27 Vmid ISY D8 DX G8 L2 3.18319E-09 GAIN = 1 GAIN = 1 G10 22 L4 3.18319E-09 GAIN = 1.2566e-3 R14 795.7981 V-- Mid Supply ref V D9 V-V- 2nd Gain Stage G11 G12 D12 + + GAIN = 12.5e-3 GAIN = 12.5e-3 DY 20 G6 -0.4 C4 10e-12 DY + - D6 R12 1e-3 + - Page 21 of 29 GAIN = 1.69138e-3 R10 1e-3 + - 17 G4 ++ - GAIN = 0.5 C2 6.6667E-11 3.7304227e9 + - -0.96 V6 25 DX V4 Common Mode Gain Stage with Zero E3 + -+ GAIN = 1 V-- 0 FIGURE 64. SPICE SCHEMATIC Output Stage Correction Current Sources + - 2.5E-3 G14 GAIN = 12.5e-3 R16 80 ISL28118, ISL28218 *ISL28118_218 Macromodel - covers following *products *ISL28118 *ISL28218 * *Revision History: * Revision B, LaFontaine January 22 2014 * Model for Noise, supply currents, CMRR *120dB f = 40kHz, AVOL 136dB f = 0.5Hz * SR = 1.2V/us, GBWP 4MHz. *Copyright 2011 by Intersil Corporation *Refer to data sheet "LICENSE STATEMENT" *Use of this model indicates your acceptance *with the terms and provisions in the License *Statement. * *Intended use: *This Pspice Macromodel is intended to give *typical DC and AC performance characteristics *under a wide range of external circuit *configurations using compatible simulation *platforms - such as iSim PE. * *Device performance features supported by this *model: *Typical, room temp., nominal power supply *voltages used to produce the following *characteristics: *Open and closed loop I/O impedances, *Open loop gain and phase, *Closed loop bandwidth and frequency *response, *Loading effects on closed loop frequency *response, *Input noise terms including 1/f effects, *Slew rate, *Input and Output Headroom limits to I/O *voltage swing, *Supply current at nominal specified supply *voltages, * *Device performance features NOT supported *by this model: *Harmonic distortion effects, *Output current limiting (current will limit at *40mA), *Disable operation (if any), *Thermal effects and/or over-temperature *parameter variation, *Limited performance variation vs. supply *voltage is modeled, *Part to part performance variation due to *normal process parameter spread, *Any performance difference arising from *different packaging, *Load current reflected into the power supply *current. * source ISL28118_218 SPICEmodel * * Connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output .subckt ISL28118_218 Vin+ Vin-V+ V- VOUT * source ISL28118_218_presubckt_0 * *Voltage Noise E_En VIN+ 6 2 0 0.3 D_D13 1 2 DN D_D14 1 2 DN V_V7 1 0 0.1 V_V8 4 0 0.1 R_R17 2 0 750 *R_R18 3 0 750 * *Input Stage Q_Q6 11 10 9 PNP_input Q_Q7 8 7 9 PNP_input Q_Q8 V-- VIN- 7 PNP_LATERAL Q_Q9 V-- 12 10 PNP_LATERAL I_I1 V++ 9 DC 80e-6 I_I2 V++ 7 DC 54E-6 I_I3 V++ 10 DC 54E-6 I_IOS 6 VIN- DC 4e-9 D_D1 7 10 DBREAK D_D2 10 7 DBREAK R_R1 5 6 5e11 R_R2 VIN- 5 5e11 R_R3 V-- 8 1000 R_R4 V-- 11 1000 C_Cin1 V-- VIN- 4.02e-12 C_Cin2 V-- 6 4.02e-12 C_CinDif 6 VIN- 1.33E-12 * *1st Gain Stage G_G1 V++ 14 8 11 0.65897 G_G2 V-- 14 8 11 0.65897 V_V1 13 14 -0.91 V_V2 14 15 -0.96 D_D3 13 V++ DX D_D4 V-- 15 DX R_R5 14 V++ 1 R_R6 V-- 14 1 * *2nd Gain Stage G_G3 V++ VG 14 VMID 1.69138e-3 G_G4 V-- VG 14 VMID 1.69138e-3 V_V3 16 VG -0.91 V_V4 VG 17 -0.96 D_D5 16 V++ DX D_D6 V-- 17 DX R_R7 VG V++ 3.7304227e9 R_R8 V-- VG 3.7304227e9 C_C1 VG V++ 6.6667E-11 C_C2 V-- VG 6.6667E-11 * *Mid supply Ref E_E2 V++ 0 V+ 0 1 E_E3 V-- 0 V- 0 1 E_E4 VMID V-- V++ V-- 0.5 I_ISY V+ V- DC 0.85E-3 * *Common Mode Gain Stage with Zero G_G5 V++ 19 5 VMID 1 G_G6 V-- 19 5 VMID 1 G_G7 V++ VC 19 VMID 1 G_G8 V-- VC 19 VMID 1 E_EOS 12 6 VC VMID 1 L_L1 18 V++ 3.18319E-09 L_L2 20 V-- 3.18319E-09 L_L3 21 V++ 3.18319E-09 L_L4 22 V-- 3.18319E-09 R_R9 19 18 1e-3 R_R10 20 19 1e-3 R_R11 VC 21 1e-3 R_R12 22 VC 1e-3 * *Pole Stage G_G9 V++ 23 VG VMID 1.2566e-3 G_G10 V-- 23 VG VMID 1.2566e-3 R_R13 23 V++ 795.7981 R_R14 V-- 23 795.7981 C_C3 23 V++ 10e-12 C_C4 V-- 23 10e-12 * *Output Stage with Correction Current Sources G_G11 26 V-- VOUT 23 12.5e-3 G_G12 27 V-- 23 VOUT 12.5e-3 G_G13 VOUT V++ V++ 23 12.5e-3 G_G14 V-- VOUT 23 V-- 12.5e-3 D_D7 23 24 DX D_D8 25 23 DX D_D9 V-- 26 DY D_D10 V++ 26 DX D_D11 V++ 27 DX D_D12 V-- 27 DY V_V5 24 VOUT -0.4 V_V6 VOUT 25 -0.4 R_R15 VOUT V++ 80 R_R16 V-- VOUT 80 .model PNP_LATERAL pnp(is=1e-016 bf=250 va=80 + ik=0.138 rb=0.01 re=0.101 rc=180 kf=0 af=1) .model PNP_input pnp(is=1e-016 bf=100 va=80 + ik=0.138 rb=0.01 re=0.101 rc=180 kf=0 af=1) .model DBREAK D(bv=43 rs=1) .model DN D(KF=6.69e-9 AF=1) .MODEL DX D(IS=1E-12 Rs=0.1) .MODEL DY D(IS=1E-15 BV=50 Rs=1) .ends ISL28118_218 FIGURE 65. SPICE NET LIST FN7532 Rev 7.00 July 27, 2015 Page 22 of 29 ISL28118, ISL28218 Characterization vs Simulation Results INPUT NOISE VOLTAGE 10 10 INPUT NOISE CURRENT 1 0.1 0.1 1 10 100 1k FREQUENCY (Hz) 10k 1 100 INPUT NOISE VOLTAGE (nV/Hz) INPUT NOISE VOLTAGE (nV/Hz) VS = 18V INPUT NOISE CURRENT (fA/Hz) 100 100 0.1 100k 10 1 0.1 0.1 GAIN (dB) GAIN (dB) PHASE GAIN 1 10 100 1k FREQUENCY (Hz) 10 100 1k 10k 100k 1M 10M100M 1G 200 180 160 140 120 100 80 60 40 20 0 -20 -40 -60 VS = 15V -80 RL = 1M -100 1m 0.01 0.1 FIGURE 68. CHARACTERIZED OPEN-LOOP GAIN, PHASE vs FREQUENCY GAIN (dB) 40 VS = 5V AND 15V CL = 4pF RL = 2k VOUT = 100mVP-P 30 20 ACL = 10 10 0 60 Rf = 10k, RG = 100 ACL = 100 -10 100 40 30 20 0 Rf = 0, RG = 1k 10k 100k 1M 10M FREQUENCY (Hz) FIGURE 70. CHARACTERIZED CLOSED-LOOP GAIN vs FREQUENCY FN7532 Rev 7.00 July 27, 2015 1 10 100 1k 10k 100k 1M 10M100M 1G Rf = 10k, RG = 10 ACL = 1000 Rf = 10k, RG = 100 50 10 Rf = 10k, RG = 1k ACL = 1 GAIN 70 Rf = 10k, RG = 10 50 PHASE FIGURE 69. SIMULATED OPEN-LOOP GAIN, PHASE vs FREQUENCY GAIN (dB) 60 ACL = 1000 100k FREQUENCY (Hz) FREQUENCY (Hz) 70 10k FIGURE 67. SIMULATED INPUT NOISE VOLTAGE FIGURE 66. CHARACTERIZED INPUT NOISE VOLTAGE 200 180 160 140 120 100 80 60 40 20 0 -20 -40 -60 VS = 15V -80 RL = 1M -100 1m 0.01 0.1 1 VS = 5V & 15V CL = 4pF RL = 2k VOUT = 100mVP-P ACL = 100 ACL = 10 RF = 10k, RG = 1k ACL = 1 -10 100 RF = 0, RG = 1k 10k 100k 1M 10M FREQUENCY (Hz) FIGURE 71. SIMULATED CLOSED-LOOP GAIN vs FREQUENCY Page 23 of 29 ISL28118, ISL28218 (Continued) 1 1 0 0 -1 -1 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) Characterization vs Simulation Results -2 -3 -4 RL = OPEN, 100k, 10k -5 RL = 1k RL = 499k RL = 100k VS = 15V -6 CL = 4pF AV = +1 -8 VOUT = 100mVp-p -7 -9 100 1k RL = 49.9k 10k 100k -2 -3 -4 RL = OPEN, 100k, 10k -5 CL = 4pF AV = +1 VOUT = 100mVp-p -7 -8 1M -9 100 10M 1k CMRR (dB) CMRR (dB) 10 100 1k 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) 140 130 120 110 100 90 80 70 60 50 40 30 VS = 15V 20 SIMULATION 10 0 1m 0.01 0.1 1 6 2 0 0 -2 -2 -4 -4 -6 30 40 50 60 TIME (s) 70 80 90 100 FIGURE 76. CHARACTERIZED LARGE-SIGNAL 10V STEP RESPONSE FN7532 Rev 7.00 July 27, 2015 10 100 1k 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) VS = 15V AV = 1 RL = 2k CL = 4pF 4 VOUT (V) VOUT (V) VS = 15V AV = 1 4 RL = 2k CL = 4pF 2 20 10M FIGURE 75. SIMULATED CMRR vs FREQUENCY 6 10 1M FIGURE 73. SIMULATED GAIN vs FREQUENCY vs RL FIGURE 74. CHARACTERIZED CMRR vs FREQUENCY 0 100k FREQUENCY (Hz) FIGURE 72. CHARACTERIZED GAIN vs FREQUENCY vs RL -6 RL = 49.9k 10k FREQUENCY (Hz) 140 130 120 110 100 90 80 70 60 50 40 30 VS = 15V 20 SIMULATION 10 0 1m 0.01 0.1 1 RL = 1k RL = 499k RL = 100k VS = 15V -6 0 10 20 30 40 50 60 TIME (s) 70 80 90 100 FIGURE 77. SIMULATED LARGE-SIGNAL 10V STEP RESPONSE Page 24 of 29 ISL28118, ISL28218 Characterization vs Simulation Results 100 VS = 15V AND VS = 5V AV = 1 RL = 2k CL = 4pF 60 VOUT (mV) 40 20 60 40 0 -20 20 0 -20 -40 -40 -60 -60 -80 -80 -100 -100 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VS = 15V AND VS = 5V AV = 1 RL = 2k CL = 4pF 80 VOUT (V) 80 (Continued) 100 2.0 0 0.2 0.4 0.6 TIME (s) 1.0 1.2 1.4 1.6 1.8 2.0 TIME (s) FIGURE 78. CHARACTERIZED SMALL-SIGNAL TRANSIENT RESPONSE 20V OUTPUT VOLTAGE SWING (V) 0.8 FIGURE 79. SIMULATED SMALL-SIGNAL TRANSIENT RESPONSE VOH = 14.88V 10V 0V -10V VS = 15V RL = 10k -20V 0 VOL = -14.93V 0.5 1.0 1.5 2.0 TIME (ms) FIGURE 80. SIMULATED OUTPUT VOLTAGE SWING FN7532 Rev 7.00 July 27, 2015 Page 25 of 29 ISL28118, ISL28218 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION July 27, 2015 FN7532.7 Page 1 under Features: Removed bullet 3 (Rail-to-rail input differential voltage range for comparator application). Added to the end of bullet 2 "ground sensing". July 15, 2015 FN7532.6 Figures 48 and 78 changed Y-axis from (V) to (mV). May 1, 2014 FN7532.5 Updated Spice model netlist on page 22. Absolute Maximum Ratings table on page 5: Added ESD Tolerance (ISL28118 SOIC package only). Changed POD: FROM M8.118: Corrected lead width dimension in side view 1 from "0.25 - 0.036" to "0.25 - 0.36" To M8.118B: Correct lead dimension in side view 2 from 0.15 - 0.05mm to 0.15+/-0.05mm. January 24, 2013 FN7532.4 Added ISL28218 MSOP specifications, and removed references to ISL28118 and ISL28218 TDFN options. page 1: Removed "8 Ld TDFN" from last paragraph of description. page 3: Removed TDFN "Pin Configurations", and TDFN columns and the "PAD" row from "Pin Descr" table. Moved Ordering Information table from pg 3 to page 2. Removed "Coming Soon" from ISL28218FUZ and added "Note 1" reference, and deleted 2 TDFN offerings in "Ordering Info" table. page 5: Removed TDFN entries from "Thermal Resistance" section, and removed notes 5 and 6. Added delta Vos MSOP row, with limits of 390A, and added "ISL28218" to the CMRR MSOP entry. page 6: added "ISL28218" to the existing AVOL MSOP entry. page 7: added new +25C 28218 MSOP row with 107dB min limit, and added "ISL28218 MSOP" to the existing ISL28118 MSOP full temp row for PSRR. page 7: added "ISL28218" to the existing CMRR SOIC and MSOP rows, and deleted the "ISL28218" rows. page 7: added "ISL28218 MSOP" to the existing ISL28118 MSOP rows for AVOL. page 9: added "+25C" to "default conditions" info at top of page. Moved "sales Info" from p25 to p23. Removed TDFN package outline drawing. August 31, 2011 FN7532.3 Page 7: Electrical Spec Table for Supply Current/Amplifier Change from: 1.4A Full Temp Max Change to: 1.4mA Full Temp Max Page 28: Updated POD M8.118 to current revision. Corrected lead width dimension in side view 1 from "0.25 - 0.036" to "0.25 - 0.36". May 9, 2011 FN7532.2 Page 2: Added NC pin to Pin Descriptions table. Page 3: Added ISL28218EVAL1Z evaluation board to the Ordering Information table. Page 12: Added new Output Overhead Voltage plots (Figs. 31,32) Pages 19 through 24: Added SPICE model schematic, netlist, description and Figs. 66 through 80. November 12, 2010 FN7532.1 On page 1: Features Section, added Low input offset voltage and superb offset voltage temperature drift for ISL28118. Updated Intersil trademark statement (bottom of page) On page 4: Removed "coming soon" from ISL28118FBZ. Updated tape & reel note. On page 5: Change ISL28118 Theta JA value from 158 to 165. Added ISL28118 min/max specs to VOS (input offset voltage), TCVOS and min specs to CMRR. On page 6: Added AVOL MIN spec for ISL28118 in dB. Changed existing AVOL spec from V/mV to dB. Added VOL max spec for ISL28118, IS Typ and Max spec for ISL28118. Changed TS from 18s to 8.5s. On page 7: Added Min Max VOS spec, TCVOS spec for ISL28118. Changed AVOL specs from V/mV to dB. On page 8: Changed Slew Rate TYP from 1.2V/s to 1V/s. Added for TS TYP spec = 4s. Changed min/max note 6 to "Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design." Added Figs 3 & 4 for ISL28118. Figures 5 & 6 moved to page 9. On page 9: Added Figures 7 & 8 On page 11: Added Figures 15 & 16 for ISL28118 On page 11, in Figure 19, changed VS from 5V to 15V On page 13 and page 14: Added Figures 27, 28, 31 & 34 for ISL28118 On page 14: Added Figure 35 for ISL28118 On page 15: Figure 41 changed VS from 18V to 5V, Figure 42 added RL = 2k, Figure 43 added RL = 10k and corrected "HD+N" to "THD+N" On page 16, Figure 44 added RL = 2k, Figure 45 RL = 10k. On page 18: Added Figure 58 for ISL28118 On page 18, Figure 58 and 59, graph upper left corner changed VS = 5V to VS = 15V On page 18, Figure 61, deleted VS = 5V September 16, 2010 FN7532.0 Initial Release FN7532 Rev 7.00 July 27, 2015 CHANGE Page 26 of 29 ISL28118, ISL28218 About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support (c) Copyright Intersil Americas LLC 2010-2015. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN7532 Rev 7.00 July 27, 2015 Page 27 of 29 ISL28118, ISL28218 Package Outline Drawing M8.15E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09 4 4.90 0.10 A DETAIL "A" 0.22 0.03 B 6.0 0.20 3.90 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45 4 4 0.43 0.076 1.27 0.25 M C A B SIDE VIEW "B" TOP VIEW 1.75 MAX 1.45 0.1 0.25 GAUGE PLANE C SEATING PLANE 0.10 C 0.175 0.075 SIDE VIEW "A 0.63 0.23 DETAIL "A" (1.27) (0.60) NOTES: (1.50) (5.40) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal 0.05 4. Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. The pin #1 identifier may be either a mold or mark feature. 6. Reference to JEDEC MS-012. TYPICAL RECOMMENDED LAND PATTERN FN7532 Rev 7.00 July 27, 2015 Page 28 of 29 ISL28118, ISL28218 Package Outline Drawing M8.118B 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 1, 3/12 3.00.10mm 5 A D 8 4.90.20mm DETAIL "X" 3.00.10mm 5 1.10 MAX 0.150.05mm PIN# 1 ID SIDE VIEW 2 1 2 B 0.65mm BSC TOP VIEW 0.95 REF 0.860.05mm H GAUGE PLANE C 0.25 SEATING PLANE 0.23 - 0.36mm 0.08 M C A-B D 0.10 0.05mm 33 0.10 C 0.53 0.10mm SIDE VIEW 1 DETAIL "X" (5.80) NOTES: (4.40) (3.00) 1. Dimensions are in millimeters. (0.65) (0.40) (1.40) TYPICAL RECOMMENDED LAND PATTERN FN7532 Rev 7.00 July 27, 2015 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSEY14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.15mm max per side are not included. 5. Dimensions are measured at Datum Plane "H". 6. Dimensions in ( ) are for reference only. Page 29 of 29 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Intersil: ISL28118FBZ ISL28118FBZ-T13 ISL28118FBZ-T7 ISL28118FBZ-T7A ISL28118FUZ-T7A ISL28218FBZ ISL28218FBZ-T13 ISL28218FBZ-T7A ISL28218FUZ-T7 ISL28218FUZ ISL28218FUZ-T7A ISL28218FUZ-T13 ISL28118FUZ ISL28118FUZ-T7 ISL28118FUZ-T13