MCP73861-I/SLG - Microchip Technology, Inc.

 2005 Microchip Technology Inc. DS21893B-page 1

MCP73861/2

Features

• Linear Charge Management Controllers

- Integrated Pass Transistor

- Integrated Current Sense

- Reverse-Blocki ng Prote ction

• High-Accu racy Preset V olt age Regulation : + 0.5%

• Four Selectable Voltage Regulation Options:

- 4.1V, 4.2V – MCP73861

- 8.2V, 8.4V – MCP73862

• Programmable Charge Current: 1.2A Maximum

• Programmable Safety Charge Timers

• Preconditioning of Deeply Depleted Cells

• Automatic End-of-Charge Control

• Optional Continuous Cell Temperature Monitoring

• Charge Status Output for Direct LED Drive

• Fault Output for Direct LED Drive

• Automatic Power-Down

• Thermal Regulation

• Temperature Range: -40°C to 85°C

• Packaging: 16-Pin, 4 x 4 QFN

16-Pin SOIC (MCP73861 only)

Applications

• Lithium-Ion/Lithium-Polymer Battery Chargers

• Persona l Data Assistants (PDAs)

• Cellu lar Telephones

• Hand-Held Instruments

• Cradle Chargers

•Digital Cameras

• MP3 Players

Description

The MCP7 386X f amily of devices are highl y advance d

linear charge management controllers for use in space-

limited, cost-sensitive applications. The MCP73861 and

MCP73862 combine high-accuracy, constant voltage

and current regulation, cell preconditioning, cell

temperature monitoring, advanced safety timers,

automati c charg e terminat ion, i nterna l curr ent sens ing,

reverse-blocking protection and charge status and fault

indication in a space-saving 16-pin, 4 x 4 QFN p ackage.

The MCP73861 is also offered in a 16-pin SOIC

package. The MCP7386X provides a complete, fully-

functional, stand-alone charge management solution

with a minimum number of external components.

The MCP73861 is targeted at applicatioins utilizing

single-cell Lithium-Ion or Lithium-Polymer battery

packs, while the MCP73862 is targeted at dual series

cell L ith ium -Io n o r L ith ium -Pol ymer battery pac ks . Th e

MCP73861 has two selectable voltage-regulation

options available (4.1V and 4.2V), for use with either

coke or graphite anodes and operates with an input

volt age range of 4.5V to 12V. The M CP738 62 has two

selectable voltage-regulation options available (8.2V

and 8.4V), for use with coke or graphite anodes, and

operates with an input voltage range of 8.7V to 12V.

The MCP7386X family of devices are fully specified

over the amb ient temperature rang e of -40°C to +8 5°C.

Package Types

DD1

BAT1

THERM

TIMER

STAT1

STAT2

141516

PROG

DD2

SET

THREF

BAT3

BAT2

5678

SS2

SS1

MCP73861

MCP73862

SS3

DD1

BAT3

THERM

TIMER

STAT1

STAT2 1

PROG

DD2

SET

SS1

THREF

BAT1

BAT2

SS2

MCP73861

SS3

16-Pin SOIC

16-Pin QFN (MCP73861 only)

Advanced Single or Dual Cell, Fully Integrated Li-Ion /

Li-Polymer Charge Management Controllers

MCP73861/2

DS21893B-page 2  2005 Microchip Technology Inc.

Typical Application

Functional Block Diagram

STAT1

STAT2

VSET

VDD

VSS

TIMER

PROG

THERM

THREF

VBAT3

VBAT

-Single

Lithium-Ion

Cell

2, 3

MCP73861

4, 9, 13

10, 11

6.19 kΩ

4.7µF

1.2A Lithium-Ion Battery Charger

4.7 µF

7.32 kΩ

0.1

µF

Charge

Termination

Comparator

Voltage Control

Amplifier

UVLO

COMPARATOR

VUVLO

Temperature

Comparators

Bias and

Reference

Generator

VUVLO

VREF(1.2V)

Power-On

Delay

–

VREF

Oscillator

IREG/12

Constant Voltage/

Recharge Comp.

Precondition

Control Charge_OK

Precon

VDD

Charge Current

Control Amplifier

–

VREF

Precondition

Comp.

Charge Control,

Charge Timers,

And

Status Logic Drv Stat 2

Drv Stat 1

Charge_OK

IREG/12

VDD1

THERM

TIMER

STAT1

STAT2

VBAT3

VSS1

PROG

VSET

THREF

VBAT1

110kΩ

10kΩ

100kΩ

50kΩ

G=0.001

11kΩ

1kΩ

600kΩ

(1.65MΩ)

148.42kΩ

1.58kΩ

VDD2 VBAT2

300.04kΩ

10.3kΩ

(8.58kΩ)

4kΩ

Direction

Control

kΩ

VSS2

VSS3

V alues in ( )

reflect the

MCP73862

device

 2005 Microchip Technology Inc. DS21893B-page 3

MCP73861/2

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings†

VDDN...............................................................................13.5V

VBATN, VSET, EN, STAT1, STAT2 w .r .t. VSS

.................................................................-0.3 to (VDD + 0.3)V

PROG, THREF, THERM, TIMER w.r.t. VSS..............-0 .3 to 6 V

Maximum Junction Temperature, TJ............Internally Li mited

Storage temperature ................... .. .. ..... .. .. .... .-65°C to +150°C

ESD protection on all pins:

Human Body Model (1.5 kΩ in series with 100 pF)....≥ 4kV

Machine Model (200 pF, No series resistance) ...........30 0V

† Notice: Stres ses above those listed under “Maximum Rat-

ings” may cause permanent damage to the devic e. This is a

stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operational listings of this specification is not implied. Expo-

sure to max imum rati ng conditions for extended periods may

affect device reliability.

DC CHARACTERISTICS

Electrical Specifications: Unless otherwise indicated, all limits apply for V DD= [VREG(Typ) + 0.3V] to 12V,

TA = -40°C to 85°C. Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]

Parameters Sym Min Typ Max Units Conditions

Supply Input

Supply Voltage VDD 4.5 — 12 V MCP73861

8.7 — 12 V MCP73862

Supply Current ISS — 0.17 4 µA Disabled

— 0.53 4 mA Operating

UVLO Start Threshold VSTART 4.25 4.5 4.65 V MCP73861

8.45 8.8 9.05 V MCP73862

VDD Low-to-High

UVLO St op Threshold VSTOP 4.20 4.4 4.55 V MCP73861

8.40 8.7 8.95 V MCP73862

VDD High-to-Low

Voltage Regulation (Constant-Voltage Mode)

Regulated Output Voltage VREG 4.079 4.1 4.121 V MCP73861, VSET = VSS

4.179 4.2 4.221 V MCP73861, VSET = VDD

8.159 8.2 8.241 V MCP73862, VSET = VSS

8.358 8.4 8.442 V MCP73862, VSET = VDD

VDD = [VREG(Typ) + 1V],

IOUT=10 mA

TA = -5°C to +55°C

Line Regulation |(∆VBAT/

VBAT)| /

∆VDD

— 0.025 0.25 %/V VDD = [VREG(Typ)+1V] to 12V

IOUT = 10 mA

Load Regulation |∆VBAT/

VBAT|—0.010.25%I

OUT = 10 mA to 150 mA

VDD = [VREG(Typ)+1V]

Supply Ripple Attenuation PSRR — 60 — dB IOUT = 10 mA, 10Hz to 1 k Hz

—42—dBI

OUT = 10 mA, 10Hz to 10 kHz

—28—dBI

OUT = 10 mA, 10Hz to 1 MHz

Output Reverse-Leakage

Current IDIS-

CHARGE

—0.23 1µAV

DD < VBAT = VREG(Typ)

Current Regulation (Fast Charge Constant-Current Mode)

Fast Charge Current

Regulation IREG 85 100 115 m A PROG = OPEN

1020 1200 13 80 mA PROG = VSS

425 500 575 mA PROG = 1.6 kΩ

TA= -5°C to +55°C

MCP73861/2

DS21893B-page 4  2005 Microchip Technology Inc.

Preconditioning Current Regu la t ion (Tr ickle Charge Constant-Current Mode)

Precondition Current

Regulation IPREG 5 10 15 mA PROG = OPEN

60 120 180 mA PROG = VSS

25 50 75 mA PROG = 1.6 k Ω

TA=-5°C to +55°C

Precondition Threshold

Voltage VPTH 2.70 2.80 2.90 V MCP73861, VSET = VSS

2.75 2.85 2.95 V MCP73861, VSET = VDD

5.40 5.60 5.80 V MCP73862, VSET = VSS

5.50 5.70 5.90 V MCP73862, VSET = VDD

VBAT Low-to -High

Charge Termination

Current ITERM 6 8.5 11 mA PROG = OPEN

70 90 120 mA PROG = VSS

32 41 50 mA PROG = 1.6 k Ω

TA=-5°C to +55°C

Automatic Recharge

Recharge Threshold

Voltage VRTH VREG - 300 mV VREG - 200 mV VREG -100 mV V MCP73861

VREG - 600 mV VREG - 400 mV VREG - 200 mV V MCP73862

VBAT High-to- Low

Thermistor Reference

Output Voltage VTHREF 2.475 2.55 2.625 V TA = 25°C,

VDD = VREG(typ.) + 1V,

ITHREF = 0 mA

Thermistor Reference

Source Current ITHREF 200 — — µA

Thermistor Reference Line

Regulation |(∆VTHREF/

VTHREF)|/

∆VDD

— 0.1 0.25 %/V VDD = [VREG(T yp) + 1V] to 12V

Thermistor Reference Load

Regulation |∆VTHREF/

VTHREF|

0.01 0.10 % ITHREF = 0 mA to 0.20 mA

Thermistor Comparator

Upper Trip Thre shold VT1 1.18 1.25 1.32 V

Upper Trip Point Hysteresis VT1HYS —-50—mV

Lower Trip Thre shold VT2 0.59 0.62 0.66 V

Lower Trip Point Hysteresis VT2HYS —80—mV

Input Bias Current IBIAS —— 2µA

Status Indicator – STAT1, STAT2

Sink Current ISINK 4812mA

Low Output Voltage V OL — 200 400 mV ISINK = 1 mA

Input Leakage Current ILK —0.01 1µAI

SINK = 0 mA, VSTAT1,2 = 12V

Enab le In p ut

Input High Voltage Level VIH 1.4 — — V

Input Low Voltage Level VIL ——0.8V

Input Leakage Current ILK —0.01 1µAV

ENABLE = 12V

Thermal Shutdown

Die Temperature TSD — 155 — °C

Die Temperature

Hysteresis TSDHYS —10—°C

DC CHARACTERISTICS (Continued)

Electrical Specifications: Unless otherwise indicated, all limits apply for V DD= [VREG(Typ) + 0.3V] to 12V,

TA = -40°C to 85°C. Typical values are at +25°C, VDD = [VREG (ty p .) + 1.0V]

Parameters Sym Min Typ Max Units Conditions

 2005 Microchip Technology Inc. DS21893B-page 5

MCP73861/2

TEMPERATURE SPECIFICATIONS

AC CHARACTERISTICS

Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG (typ.) + 0.3V] to 12V,

TA = -40°C to 85°C . Ty pical values are at + 25°C, VDD = [VREG (typ.) + 1.0V]

Parameters Sym Min Typ Max Units Conditions

UVLO Start Delay tSTART —— 5 msV

DD Low-to-High

Current Regulation

Transition Time Out of

Preconditioning tDELAY —— 1 msV

BAT < VPTH to VBAT > VPTH

Current Rise Time Out of

Preconditioning tRISE —— 1 msI

OUT Rising to 90% of IREG

Fast Charge Safety Timer

Period tFAST 1.1 1.5 1.9 Hours CTIMER = 0.1 µF

Preconditioning Current Regulation

Preconditioning Charge

Safety Timer Period tPRECON 45 60 75 Minutes CTIMER = 0.1 µ F

Charge Termination

Elapse d Time Termination

Period tTERM 2.2 3 3.8 Hours CTIMER = 0.1 µF

Status Indicators

Status Output turn-off tOFF — — 200 µs ISINK = 1 mA to 0 mA

Status Output turn-on tON — — 200 µs ISINK = 0 mA to 1 mA

Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG (typ.) + 0.3V] to 12V.

Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]

Parameters Sym Min Typ Max Units Conditions

Temperature Ranges

Sp ecified Temperatur e Range TA-40 — +85 °C

Operati ng Temperatu re Ra nge TJ-40 — +125 °C

Storage Temperature Range TA-65 — +150 °C

Thermal Package Resistances

Thermal Resistance, 16-lead,

4 mm x 4 mm QFN θJA —37—°C/W

4-Layer JC51-7

Standard Board ,

Natural Convection

Thermal Resistance, 16-lead SOIC θJA —74—°C/W

4-Layer JC51-7

Standard Board ,

Natural Convection

MCP73861/2

DS21893B-page 6  2005 Microchip Technology Inc.

2.0 TYPICAL PERFORMANCE CURVES

NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.

FIGURE 2-1: Battery Regulation Voltage

(VBAT) vs. Charge Current (IOUT).

FIGURE 2-2: Battery Regulation Voltage

(VBAT) vs. Supply Voltage (VDD).

FIGURE 2-3: Battery Regulation Voltage

(VBAT) vs. Supply Voltage (VDD).

FIGURE 2-4: Supply Current (ISS) vs.

Charge Current (IOUT).

FIGURE 2-5: Supply Current (ISS) vs.

Supply Voltage (VDD).

FIGURE 2-6: Supply Current (ISS) vs.

Supply Voltage (VDD).

Note: The g r ap hs and t ables provided following thi s n ote are a statis tic al s umm ar y based on a l im ite d n um ber of

samples and are provided for informational purposes only. The performance charac teristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

4.193

4.195

4.197

4.199

4.201

4.203

4.205

4.207

10 100 1000

IOUT (mA)

VBAT (V)

MCP73861

VSET = VDD

VDD = 5.2V

3.80

3.90

4.00

4.10

4.20

4.30

4.40

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

VBAT (V)

MCP73861

VSET = VDD

IOUT = 1000 mA

4.193

4.195

4.197

4.199

4.201

4.203

4.205

4.207

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

VBAT (V)

MCP73861

VSET = VDD

IOUT = 10 mA

0.40

0.50

0.60

0.70

0.80

0.90

1.00

10 100 1000

IOUT (mA)

ISS (mA)

MCP73861

VSET = VDD

VDD = 5.2V

0.40

0.60

0.80

1.00

1.20

1.40

1.60

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

ISS (mA)

MCP73861

VSET = VDD

IOUT = 1000 mA

0.40

0.50

0.60

0.70

0.80

0.90

1.00

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

ISS (mA)

MCP73861

VSET = VDD

IOUT = 10 mA

 2005 Microchip Technology Inc. DS21893B-page 7

MCP73861/2

TYPICAL PERFORMANCE CURVES (CONTINUED)

NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.

FIGURE 2-7: Output Leakage Current

(IDISCHARGE) vs. Battery V o ltage (VBAT).

FIGURE 2-8: Thermistor Reference

Voltage (VTHREF) vs. Supply Voltage (VDD).

FIGURE 2-9: Thermistor Reference

Voltage (VTHREF) vs. Thermistor Bias Current

(ITHREF).

FIGURE 2-10: Supply Current (ISS) vs.

Ambient Temper atu re (TA).

FIGURE 2-11: Bat tery Re gulation Voltage

(VBAT) vs. Ambient Temperature (TA).

FIGURE 2-12: Thermistor Reference

Voltage (VTHREF) vs. Ambient Temperature (TA).

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

2.0 2.4 2.8 3.2 3.6 4.0 4.4

VBAT (V)

IDISCHARGE (µA)

MCP73861

VSET = VDD

VDD = VSS

+25°C

-40°C

+85°C

2.500

2.510

2.520

2.530

2.540

2.550

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

VTHREF (V)

MCP73861

VSET = VDD

ITHREF = 100 µA

2.500

2.505

2.510

2.515

2.520

0 25 50 75 100 125 150 175 200

ITHREF (µA)

VTHREF (V)

MCP73861

VSET = VDD

0.40

0.60

0.80

1.00

1.20

1.40

1.60

-40-30-20-100 1020304050607080

TA (°C)

ISS (mA)

MCP73861

VSET = VDD

IOUT = 10 mA

4.193

4.195

4.197

4.199

4.201

4.203

4.205

4.207

-40

-30

-20

-10

TA (°C)

VBAT (V)

MCP73861

VSET = VDD

IOUT = 10 mA

2.500

2.505

2.510

2.515

2.520

-40

-30

-20

-10

TA (°C)

VTHREF (V)

MCP73861

VSET = VDD

ITHREF = 100 µA

MCP73861/2

DS21893B-page 8  2005 Microchip Technology Inc.

TYPICAL PERFORMANCE CURVES (CONTINUED)

NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.

FIGURE 2-13: Battery Regulation Voltage

(VBAT) vs. Charge Current (IOUT).

FIGURE 2-14: Battery Regulation Voltage

(VBAT) vs. Supply Voltage (VDD).

FIGURE 2-15: Battery Regulation Voltage

(VBAT) vs. Supply Voltage (VDD).

FIGURE 2-16: Supply Current (ISS) vs.

Charge Current (IOUT).

FIGURE 2-17: Supply Current (ISS) vs.

Supply Voltage (VDD).

FIGURE 2-18: Supply Current (ISS) vs.

Supply Voltage (VDD).

8.393

8.395

8.397

8.399

8.401

8.403

8.405

8.407

10 100 1000

IOUT (mA)

VBAT (V)

MCP73862

VSET = VDD

VDD = 9.4V

8.393

8.395

8.397

8.399

8.401

8.403

8.405

8.407

10.0 10.4 10.8 11.2 11.6 12.0

VDD (V)

VBAT (V)

MCP73862

VSET = VDD

IOUT = 1000 mA

8.398

8.400

8.402

8.404

8.406

8.408

8.410

8.412

9.0 9.5 10.0 10.5 11.0 11.5 12.0

VDD (V)

VBAT (V)

MCP73862

VSET = VDD

IOUT = 10 mA

0.40

0.50

0.60

0.70

0.80

0.90

1.00

10 100 1000

IOUT (mA)

ISS (mA)

MCP73862

VSET = VDD

VDD = 9.4V

0.40

0.60

0.80

1.00

1.20

1.40

1.60

9.0 9.5 10.0 10.5 11.0 11.5 12.0

VDD (V)

ISS (mA)

MCP73862

VSET = VDD

IOUT = 1000 mA

0.40

0.50

0.60

0.70

0.80

0.90

1.00

9.0 9.5 10.0 10.5 11.0 11.5 12.0

VDD (V)

ISS (mA)

MCP73862

VSET = VDD

IOUT = 10 mA

 2005 Microchip Technology Inc. DS21893B-page 9

MCP73861/2

TYPICAL PERFORMANCE CURVES (CONTINUED)

NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.

FIGURE 2-19: Output Leakage Current

(IDISCHARGE) vs. Battery V o ltage (VBAT).

FIGURE 2-20: Thermistor Reference

Voltage (VTHREF) vs. Supply Voltage (VDD).

FIGURE 2-21: Thermistor Reference

Voltage (VTHREF) vs. Thermistor Bias Current

(ITHREF).

FIGURE 2-22: Supply Current (ISS) vs.

Ambient Temper atu re (TA).

FIGURE 2-23: Battery Regulation Voltage

(VBAT) vs. Ambient Temperature (TA).

FIGURE 2-24: Thermistor Reference

Voltage (VTHREF) vs. Ambient Temperature (TA).

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

4.0 4.8 5.6 6.4 7.2 8.0 8.8

VBAT (V)

IDISCHARGE (mA)

MCP73862

VSET = VDD

VDD = VSS

+25°C

-40°C

+85°C

2.530

2.540

2.550

2.560

2.570

9.0 9.5 10.0 10.5 11.0 11.5 12.0

VDD (V)

VTHREF (V)

MCP73862

VSET = VDD

ITHREF = 100 µA

2.540

2.542

2.544

2.546

2.548

2.550

0 25 50 75 100 125 150 175 200

ITHREF (µA)

VTHREF (V)

MCP73862

VSET = VDD

0.40

0.60

0.80

1.00

1.20

1.40

1.60

-40

-30

-20

-10

TA (°C)

ISS (mA)

MCP73862

VSET = VDD

IOUT = 10 mA

8.386

8.390

8.394

8.398

8.402

8.406

8.410

8.414

-40

-30

-20

-10

TA (°C)

VBAT (V)

MCP73862

VSET = VDD

IOUT = 10 mA

2.530

2.534

2.538

2.542

2.546

2.550

-40

-30

-20

-10

TA (°C)

VTHREF (V)

MCP73862

VSET = VDD

ITHREF = 100 µA

MCP73861/2

DS21893B-page 10  2005 Microchip Technology Inc.

TYPICAL PERFORMANCE CURVES (CONTINUED)

NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.

FIGURE 2-25: Line Transient Response.

FIGURE 2-26: Load Transient Response.

FIGURE 2-27: Power Supply Ripple

Rejection.

FIGURE 2-28: Line Transient Response.

FIGURE 2-29: Load Transient Response.

FIGURE 2-30: Power Supply Ripple

Rejection.

-80

-70

-60

-50

-40

-30

-20

-10

0.01 0.1 1 10 100 1000

Frequency (kHz)

Attenuation (dB)

MCP73861

VDD = 5.2V

VAC = 100 mVp-p

IOUT = 10 mA

COUT = 1 0 µF, Ceramic

-80

-70

-60

-50

-40

-30

-20

-10

0.01 0.1 1 10 100 1000

Frequency (kHz)

Attenuation (dB)

MCP73861

VDD = 5.2V

VAC = 100 mVp-p

IOUT = 100 mA

COUT = 10 µF, X7R, Ceramic

 2005 Microchip Technology Inc. DS21893B-page 11

MCP73861/2

TYPICAL PERFORMANCE CURVES (CONTINUED)

NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.

FIGURE 2-31: Charge Current (IOUT) vs.

Programming Resistor (RPROG). FIGURE 2-32: Charge Current (IOUT) vs.

Ambient Temper atu re (TA).

200

400

600

800

1000

1200

OPEN 4.8K 1.6K 536 0

RPROG (Ω)

IOUT (mA)

MCP73861/2

VSET = VDD

493

495

497

499

501

503

505

-40

-30

-20

-10

TA (°C)

IOUT (mA)

MCP73861/2

VSET = VDD

RPROG = 1.6 kΩ

MCP73861/2

DS21893B-page 12  2005 Microchip Technology Inc.

3.0 PIN DESCRIPTION

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLES

3.1 Voltage Regulation Selection

(VSET)

MCP73861: Connect to VSS for 4.1V regulation

voltage, connect to VDD for 4.2V regulation voltage.

MCP73862: Connect to VSS for 8.2V regulation

voltage, connect to VDD for 8.4V regulation voltage.

3.2 Battery Management I nput Supp ly

(VDD2, VDD1)

A supply voltage of [VREG(Typ) + 0.3V] to 12V is

recommended. Bypass to VSS with a mini mum of

4.7 µF.

3.3 Battery Management 0V Reference

(VSS1, VSS2, VSS3)

Connect to negative terminal of battery and input

supply.

3.4 Current Regulati on Set (PROG)

Preconditioning, fast and termination currents are

scaled by placing a resistor from PROG to VSS.

3.5 Cell Temperat ure Sensor Bias

(THREF)

Voltage reference to bias external thermistor for

continuous cell temperature monitoring and

prequalification.

3.6 Cell Temperature Sensor Input

(THERM)

Input for an external thermistor for continuous cell-

temperature monitoring and prequalification. Connect

to THREF/3 to disable temperature sensing.

3.7 Timer Set

All safety timers are scaled by CTIMER/0.1 µF.

3.8 Battery Charge Control Output

(VBAT1, VBAT2)

Connect to positive terminal of battery. Drain terminal

of inte rnal P-c ha nne l MOSFET p ass tran si sto r. Byp as s

to VSS with a minimum of 4.7 µF to ens ure loop st ability

when the battery is disconnected.

3.9 Battery Voltage Sense (VBAT3)

Voltage sense input. Connect to positive terminal of

battery. A precision internal resistor divider regulates

the final voltage on this pin to VREG.

3.10 Logic Enable (EN)

Input to force charge termination, initiate charge, clear

faults or disable automatic recharge.

3.11 Fault Status Output (STAT2)

Current-limited, open-drain drive for direct connection

to a LED for charge status indication. Alternatively, a

pull-up resistor can be applied for interfacing to a host

microcontroller.

3.12 Charge Status Output (STAT1)

Current-limited, open-drain drive for direct connection

to a LED for charge status indication. Alternatively, a

pull-up resistor can be applied for interfacing to a host

microcontroller.

Pin No. Symbol Function

QFN SOIC

13 V

SET Voltage Regulation Selection

24 V

DD1 Battery Managem ent Input Supply

35 V

DD2 Battery Managem ent Input Supply

46 V

SS1 Battery Managem ent 0V Reference

5 7 PROG Current Regulation Set

6 8 THREF Cell Temperature Sensor Bias

7 9 THERM Cell Temperature Sensor Input

810 TIMERTimer Set

911 V

SS3 Battery Managem ent 0V Reference

10 12 VBAT1 Battery Charge Control Output

11 13 VBAT2 Battery Charge Control Output

12 14 VBAT3 Battery Voltage Sense

13 15 VSS2 Bat tery Managem ent 0V Reference

14 16 EN Logic Enable

15 1 STAT2 Fault Status Output

16 2 STAT1 Charge Status Output

 2005 Microchip Technology Inc. DS21893B-page 13

MCP73861/2

4.0 DEVICE OVERVIEW

The MCP7386X family of devices are highly advanced

linear charge management controllers. Refer to the

functional block diagram. Figure 4-2 depicts the opera-

tional flow algorithm from charge initiation to

completi on and automatic recharge.

4.1 Charge Qualification and

Preconditioning

Upon ins ertion of a battery or applic ation of an externa l

supply, the MCP7386X family of devices automatically

performs a series of safety checks to qualify the

charge. The input source voltage must be above the

Undervoltage Lockout (UVLO) threshold, the enable

pin mus t be above t he logic-high level a nd the cel l tem-

perature must be within the upper and lower thresh-

olds. The qualification parameters are continuously

monitored. Deviation beyond the limits automatically

suspends or terminates the charge cycle. The input

voltage must deviate below the undervoltage lockout

stop threshold for at least one clock period to be con-

sidered valid.

Once the qualification parameters have been met, the

MCP7386X initiates a charge cycle. The charge status

output is pulled low throughout the charge cycle (see

Table 5-1 for charge status outputs). If the battery

voltage is below the preconditioning threshold (VPTH)

the MC P73 86X p rec ond iti ons th e ba tte ry w i th a tric kl e-

charge. The preconditioning current is set to approxi-

mately 10% of the fast charge regulation current. The

preconditioning trickle-charge safely replenishes

deeply depleted cells and minimizes heat dissipation

during the i nitial ch arge cyc le. If the ba ttery volt age ha s

not exceeded the preconditioning threshold before the

preconditioning timer has expired, a fault is indicated

and the charge cycle is terminated.

4.2 Constant Current Regulation –

Fast Charge

Preconditioning ends, and fast charging begins, when

the batter y voltage exceeds the p reconditioni ng thresh-

old. Fast ch arge regul ates to a co nst ant current (IREG),

which is set via an external resistor connected to the

PROG pin . Fast c harge c ontin ues un til the battery volt-

age reaches the regulation vo ltage (VREG), or the fast

charge tim er expire s; in whic h case , a fault is indicate d

and the charge cycle is terminated.

4.3 Constant Volt age Regulation

When the battery voltage reaches the regulation volt-

age (VREG), constant voltage regulation begins. The

MCP7386X monitors the battery voltage at the VBAT

pin. This input is tied directly to the positive terminal of

the batt ery. The M CP7386X selec ts the v olt age re gula-

tion value based on the state of the VSET. With VSET

tied to VSS, the MCP7386 1 and MCP7386 2 regu late to

4.1V and 8.2V, respectively. With V SET tied to VDD, the

MCP73861 and MCP73862 regulate to 4.2V and 8.4V,

respectively.

4.4 Charge Cycle Completion and

Auto matic Re-Cha r g e

The MCP7386X monitors the charging current during

the Constant-voltage regulation mode. The charge

cycle is consid ered complete when t he charge current

has diminished below approximately 8% of the

regulation current (IREG) or the elapsed timer has

expired.

The MCP7386X automatically begins a new charge

cycle when t he bat tery v olt age fa lls b elow th e rec harge

threshold (VRTH), assuming all the qualification

parameters are me t.

4.5 Thermal Regulation

The MCP7386X family limits the charge current based

on the die temperature. Thermal regulation optimizes

the charge cycle time while maintaining device reliabil-

ity . I f thermal regulation is entered , the timer is automat-

ically slowed down to ensure that a charge cycle will

not terminate prematurely. Figure 4-1 depicts the

thermal regu lat ion profile.

FIGURE 4-1: Typical Maximum Charge

Current vs. Die Temperature.

4.6 Thermal Shutdown

The MC P7386X fa mily suspe nds charg e if the die tem-

perature exceeds 155°C. Charging will resume when

the die temperature ha s cooled by a pproximately 10°C.

The thermal shutdown is a secondary safety feature in

the event that there is a failure within the thermal

regulation circuitry.

200

400

600

800

1000

1200

1400

0 20 40 60 80 100 120 14

Die Temperature (° C)

Maximum Charge Current (mA)

Minimum Maximum

MCP73861/2

DS21893B-page 14  2005 Microchip Technology Inc.

FIGURE 4-2: Operational Flow Algorithm.

Preconditioning Mode

Charge Current = IPREG

Reset Safety Timer

Yes

Initialize

Yes

VBAT > VPTH STAT1 = On

VBAT > VPTH

Yes

VDD < VUVLO

Safety Timer

Yes Temperature OK

STAT1 = Off

Safety Timer Suspended

Charge Current = 0

Fault

Charge Current = 0

Reset Safety Timer

or EN Low No

STAT1 = Off

Constant-Current

Charge Curr ent = IREG

Reset Safety Timer

VBAT = VREG

Safety Timer

Yes Temperat ure OK

Constant-Voltage Mode

Output Volt age = VREG

IOUT < ITERM

Yes

VBAT < VRTH

Elapsed Timer Charge Termination

Charge Curr ent = 0

Reset Safety Timer

STAT1 = Flashing

Yes

Temperature OK

STAT1 = Flashing

Safety Timer Suspended

Charge Current = 0

Yes

VDD < VUVLO

or EN Low

Yes

Temperature OK No

STAT1 = Off

Charge Current = 0

Yes

STAT1 = Off

VDD > VUVLO

Mode

Expired

STAT1 = Off

Safety Timer Suspended

Charge Current = 0

EN High

Expired

Note 1: The qualification parameters are continuously

monitore d throughout the ch arge cycle. Refer to

Section 4.1, “Charge Qualification and

Preconditioning”, for details.

Note 2: The charge current will be scaled based on the

die temp erature dur ing thermal reg ulation. Refe r

to Section 4.5, “Thermal Regulation”, for

details.

NOTE 1

STAT2 = OnSTAT2 = Flas hing

STAT2 = Off

STAT2 = Flas hing

STAT2 = Off

NOTE 2

STAT2 = Flashing

STAT2 = Off

 2005 Microchip Technology Inc. DS21893B-page 15

MCP73861/2

5.0 DETAILED DESCRIPTION

5.1 Analog Circuitry

5.1.1 BATTERY MANAGEMENT INPUT

SUPP LY (VDD1, VDD2)

The VDD input is the input supply to the MCP7386X.

The MCP7386X automatically enters a Power-down

mode if the voltage on the VDD input falls below the

undervoltage lockout voltage (VSTOP). This feature

prevents draining the battery pack when the VDD

supply is not present.

5.1.2 PROG INPUT

Fast charge current regulation can be scaled by placing

a pro gr amm in g r es is tor (R PROG) fr om th e P ROG i n pu t

to VSS. Connec ting the PROG inp ut to VSS allows for a

maximum fast charge current of 1.2A, typically. The

minimum fast charge current is 100 mA, set by letting

the PROG input float. The following formula calculates

the value for RPROG:

The preconditioning trickle-charge current and the

charge te rmina tion current are scale d to appro xima tely

10% and 8% of IREG, respectively.

5.1.3 CELL TEMPERATURE SENSOR

BIAS (THREF)

A 2.5V voltage re ference is provided to b ias an ext ernal

thermistor for continuous cell temperature monitoring

and prequ alific ation. A ratio metric w indow c ompar iso n

is performed at threshold levels of VTHREF/2 and

VTHREF/4.

5.1.4 CELL TEMPERATURE SENSOR

INPUT (THERM)

The MCP73861 and MCP73862 continuously monitor

temperature by comparing the voltage between the

THERM input and VSS with the upper and lower

temperature threshold s. A ne gat ive or positive te mp er-

ature coefficient, NTC or PTC thermistor and an exter-

nal voltage-divider typically develop this voltage. The

temperature sensing circuit has its own reference to

which it perf orms a ratio m etric com pa rison. Therefo re,

it is immune to fluctuations in the supply input (VDD).

The temperature-sensing circuit is removed from the

system when VDD is not applied, eliminating additional

discharge of the battery pack.

Figure 6-1 depicts a typical application circuit with

connection of the THERM input. The resistor va lues of

RT1 and RT2 are calculated with the following

equations.

For NTC thermistors:

For PTC th ermistors:

Applying a voltage equal to VTHREF/3 to the THERM

input disables temperature monitoring.

5.1.5 TIMER SET INPUT (TIMER)

The TIMER input programs the period of the safety

timers by placing a timing capacitor (CTIMER) between

the TIMER input pin and VSS. Three safety timers are

programmed via the timing capacitor.

The preconditioning safety timer period:

The fast charge safety timer period:

And, the elapsed time termination period:

The preconditioning timer starts after qualification and

resets when the charge cycle transitions to the fast

charge, Cons tant-current mod e. T he fa st charge tim er

and the elapsed timer start after the MCP7386X

transitions from preconditioning. The fast charge timer

resets when the charge cycle transitions to the

Constant-voltage mode. The elapsed timer will expire

and term inate the charge if the sensed current does not

diminish below the termination threshold.

During thermal regulation, the timer is slowed down

propo rtio nal to the charge curren t.

RPROG 13.2 11 IREG

×–

12 IREG

×1.2–

----------------------------------------

where:

IREG is the desired fast charge current in

amps

RPROG is in kΩ.

RT1 2R

COLD RHOT

××

RCOLD RHOT

–

----------------------------------------------

RT2 2R

COLD RHOT

××

RCOLD 3R×HOT

–

----------------------------------------------

RT1 2R

COLD RHOT

××

RHOT RCOLD

–

----------------------------------------------

RT2 2R

COLD RHOT

××

RHOT 3R×COLD

–

----------------------------------------------

Where:

RCOLD and RHOT are the thermistor

resistance values at the temperature window

of interest.

tPRECON CTIMER

0.1µF

-------------------1.0Hour×s=

tFAST CTIMER

0.1µF

-------------------1.5Hours×=

tTERM CTIMER

0.1µF

-------------------3.0Hours×=

MCP73861/2

DS21893B-page 16  2005 Microchip Technology Inc.

5.1.6 BATTER Y VOLTAGE SENSE (V BAT3)

The MCP7386X monitors the battery voltage at the

VBAT3 pin. This input is tied directly to the positive

terminal of the battery pack.

5.1.7 BATTERY CHARGE CONTROL

OUTPUT (VBAT1, VBAT2)

The battery charge control output is the drain terminal

of an internal P-channel MOSFET. The MCP7386X

provides c ons t an t cu rrent and voltag e reg ula tio n to th e

battery pack by controlling this MOSFET in the linear

region. The battery charge control output should be

connected to the positive terminal of the battery pack.

5.2 Digital Circuitry

5.2.1 CHARGE STATUS OUTPUTS

(STAT1,STAT2)

Two status outputs provide information on the state of

charge. The current-limite d, o pe n-dra in outputs can b e

used to illuminate external LEDs. Optionally, a pull-up

resistor can be used on the output for communication

with a host microcontroller. Table 5-1 summarizes the

state of the status outputs during a charge cycle.

The f lashin g rate ( 1 Hz) is ba sed off a timer c apacitor

(CTIMER) of 0.1 µF. The rate will vary based on the

value of t he timer c apacitor.

During a fault condition, the ST AT1 status output will be

off and the STAT2 status output will be on. To recover

from a fault condition, the input voltage must be

removed and then reapplied, or the enable input (EN)

must be de-asserted to a logic-low, then asserted to a

logic-high.

When the voltage on the THERM input is outside the

prese t window, the charge cy cle will not sta rt, or will be

suspended. The charge cycle is not terminated and

recovery is au tomatic. The charge cycle wi ll res ume or

start once the THERM input is valid and all other

qualification parameters are met. During an invalid

THERM condition, the STAT1 status output will be off

and the STAT2 status output will flash.

5.2.2 VSET INPUT

The VSET input selects the regulated output voltage of

the MCP7386X. With VSET ti ed to VSS, the MCP73861

and MCP73862 regulate to 4.1V and 8.2V, respectively .

With VSET tied to VDD, the MCP73861 and MCP73862

regulate to 4.2V and 8.4V, respectively.

5.2.3 LOGIC ENABLE (EN)

The logic enable input pin (EN) can be used to

terminat e a ch arge at an y time du ring the c harge cycle,

as well as to initiate a charge cycle or initiate a recharge

cycle.

Applyin g a logic -high in put signa l to t he EN pin, o r tying

it to the input source, enables the device. Applying a

logic-low input signal disables the device and termi-

nates a charge cycle. When disabled, the device’s

supply current is reduced to 0.17 µA, typically.

TABLE 5-1: STATUS OUTPUTS

CHARGE

CYCLE STAT1 STAT1 STAT2

Qualification Off Off

Preconditioning On Off

Constant-

Current Fast

Charge

On Off

Constant-

Voltage On Off

Charge

Complete Flashing (1 Hz,

50% duty cycle) Off

Fault Off On

THERM Invalid Off Flashing (1 Hz,

50% duty cycle)

Disabled –

Sleep mode Off Off

Input Voltage

Disconnected Off Off

Note: Off state: Open-drain is high-impedance;

On state: Open-drain can sink current,

typicall y 7 mA;

Flashin g: Toggles bet we en off state and

on state.

 2005 Microchip Technology Inc. DS21893B-page 17

MCP73861/2

6.0 APPLICATIONS

The MCP7386X is design ed to operate in conjunction

with a host microcontroller or in stand-alone applica-

tions. The MCP7386X provides the preferred charge

algorithm for Lithium-Ion and Lithium-Polymer cells,

constant current followed by constant voltage.

Figure 6-1 depicts a typical stand-alone application

circuit and Figures 6-2 and 6-3 depict the

accompanyi ng ch arge pr o fil e.

FIGURE 6-1: Typical App li ca tio n Circui t.

FIGURE 6-2: Typical Char ge Prof il e.

ENSTAT1

STAT2

VSET

VSS3

VDD1

VDD2

VSS2

TIMERPROG

THERM

THREF

VBAT3

VBAT2

VBAT1

CTIMER

Unregulated

Wall Cube

RPROG

RT1

RT2

-Single

Lithium-Ion

Cell

VSS1

MCP73861

141516

5678

Regulation

Voltage

(VREG)

Regulation

Current

(IREG)

Transition

Threshold

(VPTH)

Precondition

Current

(IPREG)

Precondition

Safety Timer Fast Charge

Safety Timer Elapsed Time

Termination Timer

Charge

Voltage

Preconditioning

Mode Constant-Current

Mode Constant-Voltage

Mode

Charge

Current

Termination

Current

(ITERM)

MCP73861/2

DS21893B-page 18  2005 Microchip Technology Inc.

FIGURE 6-3: Typical Charge Profile in Thermal Regulation.

6.1 Application Circuit Design

Due to the low efficiency of linear charging, the most

important factors are thermal design and cost, which

are a di rect functio n of the in put volt age , out put current

and thermal impedance between the battery charger

and the a mbient c ooling ai r . The w orst-case s ituation is

when the device has transitioned from the Precondi-

tioning mode to the Constant-current mode. In this

situation, the battery charger has to dissipate the

maximum power. A trade-off must be made between

the charge current, cost and thermal requirements of

the charger.

6.1.1 COMPONENT SELECTION

Selection of the external components in Figure 6-1 is

crucial to the integrity and reliability of the charging

system. The following discussion is intended as a guide

for the component selection process.

6.1.1.1 Current Prog ra mmi ng Resis tor

(RPROG)

The preferred fast charge current for Lithium-Ion cells

is at the 1C rate, with an absolute ma ximum current at

the 2C rate. For example, a 500 mAh battery pack has

a preferred fast charge current of 500 mA. Charging at

this rate provides the shortest charge cycle times with-

out degra dation to th e battery p ack perform ance or lif e.

1200 mA is the maximum charge current obtainable

from the MCP7386X. For this situation, the PROG input

should be connected directly to VSS.

6.1.1.2 Thermal Considerations

The worst-case power dissipation in the battery

charger occurs when the input voltage is at the

maximum and the device has transitioned from the

Precondi tioning mode to the Co nstant-curren t mode. In

this case, the power dissipation is:

Regulation

Voltage

(VREG)

Regulation

Current

(IREG)

Transition

Threshold

(VPTH)

Precondition

Safety Timer Fast Charge

Safety Timer Elapsed Time

Termination Timer

Charge

Voltage

Preconditioning

Mode Constant-Current

Mode Constant-Voltage

Mode

Charge

Current

Precondition

Current

(IPREG)

Termination

Current

(ITERM)

PowerDissipation VDDMAX VPTHMIN

–()IREGMAX

×=

Where:

VDDMAX is the maximum input voltage

IREGMAX is the maximum fast charge current

VPTHMIN is the minimum transition threshold

voltage.

 2005 Microchip Technology Inc. DS21893B-page 19

MCP73861/2

Power di ssipatio n with a 5V, ± 10% inp ut voltag e source

is:

With the battery charger mounted on a 1 in2 pad of

1 oz. copper, the junction temperature rise is 60°C,

approxi mately. This would a llow for a maximum oper at-

ing ambient temperature of 50°C before thermal

regulation is entered.

6.1.1.3 External Capacitors

The MCP7 386X is stable w ith or without a ba ttery load.

In order to maintain good AC stability in the Constant-

voltage mode, a minimum capacitance of 4.7 µF is

recommended to bypass the VBAT pin to VSS. This

capacitance provides compensation when there is no

battery load. In addition, the battery and interconnec-

tions appear inductive at high frequencies. These

elements are in the control feedback loop during

Const ant -v ol tage mode. There fore , the by p ass capaci-

tance may be necessary to compensate for the

inductiv e nature of the battery pack.

Virtually any good quality output filter capacitor can be

used, independent of the capacitor’s minimum Effec-

tive Series Resistance (ESR) value. The a ctual va lue of

the capacitor and its associated ESR depends on the

output load current. A 4.7 µF ceramic, tantalum or alu-

minum electrolytic capacitor at the output is usually

sufficient to ensure stability for up to a 1A output

current.

6.1.1.4 Reverse- Bl ocki ng Prote cti on

The MCP7386X provides protection from a faulted or

shorted in put, or from a revers ed-p ol arit y inp ut so urce.

Without t he p rotecti on, a fa ulted o r shorte d inpu t woul d

discharge the battery pack through the body diode of

the internal pass transistor.

6.1.1.5 Enable Interface

In the st and-alone conf igu rati on, t he enable pin is gen-

erally tied to the input voltage. The MCP7386X auto-

matically enters a low-power mode when voltage on

the VDD input falls below the undervoltage lockout

voltage (VSTOP), reducing the battery drain current to

0.23 µA, typically.

6.1.1.6 Charge Status Interface

Two status outputs provide information on the state of

charge. The cu rrent-lim ited, ope n-drain outp uts can be

used to illum inate extern al LEDs. Refer to Table 5-1 for

a summary of the state of the status outputs during a

charge cycle.

6.2 PCB Layout Issues

For optimum voltage regu lation, place the batte ry pack

as clos e as possi ble to the de vice’ s VBAT and VSS pins.

It is recom mend ed to minim ize vo lta ge drop s alo ng the

high current-carrying PCB traces.

If the PCB layout is used as a heatsink, adding many

vias in the hea tsink pad c an h elp conduct more h eat to

the backp lane of the PCB, thus reduc ing the ma ximum

junction temperature.

PowerDissipation 5.5V 2.7V–()575mA×1.61W==

MCP73861/2

DS21893B-page 20  2005 Microchip Technology Inc.

7.0 PACKAGING INFORMATION

7.1 Package Marking Information

Legend: XX...X Customer spec ific information*

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Note: In the eve nt the full Micro chip p art num ber can not be ma rked on on e line, it will

be carried ov er to the ne xt li ne thus lim iti ng th e nu mb er of av ai lab le c hara ct ers

for customer specific information.

*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.

141516

5678

16-Lead QFN Example:

XXXXXXXX

YYWW

NNN

141516

5678

G3861

I/ML

0412

256

16-Lead SOIC (150 mil) (MCP73861 only)Example:

XXXXXXXXXXXXX

YYWWNNN

XXXXXXXXXXXXX GMCP73861-I/SL

0412256

 2005 Microchip Technology Inc. DS21893B-page 21

MCP73861/2

16-Lead Plastic Quad Flat No Lead Package (ML) 4x4x0.9 mm Body (QFN) – Saw Singulated

EE1

EXPOSED

METAL

PAD

OPTIONAL

INDEX

AREA

Contact Width

*Controlling Parameter

Drawing No. C04-127

Notes:

JEDEC equivalent: MO-220

b .010 .012 .014 0.25 0.30 0.35

Pitch

Number of Pins

Overall Width

Standoff

Overall Length

Overall Height

MAX

Units

Dimension Limits

.000

INCHES

.026 BSC

MIN

NOM MAX

.002 0.00

4.00

MILLIMETERS*

.039

MIN

0.65 BSC

NOM

0.05

1.000.90.035

.001 0.02

Contact Length L .012 .016 .020 0.30 0.40 0.50

Exposed Pad Width

Exposed Pad Length

.100 .106 .110 2.55 2.70 2.80

.031 0.80

3.85 4.15.163.157.152

.152 .157 4.00.163 3.85 4.15

.100 .106 2.70.110 2.55 2.80

Revised 04-24-05

Contact Thickness A3 .008 REF 0.20 REF

TOP VIEW BOTTOM VIEW

MCP73861/2

DS21893B-page 22  2005 Microchip Technology Inc.

16-Lead Plastic Small Outline (SL) – Narrow 150 mil Body (SOIC)

Foot Angle φ048048

1512015120

Mold Draft Angle Bottom 1512015120

Mold Draft Angle Top 0.510.420.33.020.017.013BLead Width 0.250.230.20.010.009.008

Lead Thickness

1.270.840.41.050.033.016LFoot Length 0.510.380.25.020.015.010hChamfer Distance 10.019.919.80.394.390.386DOverall Length 3.993.903.81.157.154.150E1Molded Package Width 6.206.025.79.244.237.228EOverall Width 0.250.180.10.010.007.004A1Standoff § 1.551.441.32.061.057.052A2Molded Package Thickness 1.751.551.35.069.061.053AOverall Height 1.27.050

Pitch 1616

Number of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units

45°

* Controlling Parameter

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-012

Drawing No. C04-108

§ Significant Characteristic

 2005 Microchip Technology Inc. DS21893B-page 23

MCP73861/2

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Sales and Support

Device MCP73861: Single-cell charge controller with temperature

monitor

MCP73861T: Single-cell charge controller with temperature

monitor, Tape and Reel

MCP73862: Dual series cells charge controller with

temperature monitor

MCP73862T: Dual series cells charge controller with

temperature monitor, Tape and Reel

Temp er atu re R ang e I = -40°C to +85°C (Industrial)

Packages ML = Plastic Quad Flat No Lead, 4x4 mm Body (QFN),

16-lead

SL = Plastic Small Outline, 150 mm Body (SOIC),

16-lead

Lead Fini sh G = Ma tte Tin (Pure Sn)

PART NO. XXX

PackageTemperature

Range

Device

Examples:

a) MCP73861T-I/MLG:Tape and Reel,

Single Cell Controller

b) MCP73861-I/MLG: Single Cell Controller

a) MCP73862T-I/MLG:Tape and Reel,

Dual Series Controller

b) MCP73862-I/MLG: Dual Series Controller

Examples:

a) MCP73861T-I/MLG:Tape and Reel,

Single -Ce ll Controlle r

b) MCP738 61- I/M LG: S ingl e -Ce ll Controlle r

a) MCP73862T-I/MLG:Tape and Reel,

Dual Series Controller

b) MCP73862-I/MLG: Dual Series Controller

a) MCP73861T-I/SLG: Tape and Reel,

Single -Ce ll Controlle r

b) MCP738 61- I/S LG : Si ngle -C e ll Cont rol le r

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and

recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Worldwide Site (www.micr ochip.com)

Please specify which device, revision of silicon and Dat a Sheet (include Literature #) you are using.

Customer Notification System

MCP73861/2

DS21893B-page 24  2005 Microchip Technology Inc.

NOTES:

 2005 Microchip Technology Inc. DS21893B-page 25

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR WAR-

RANTIES OF ANY KIN D WHETHER EXPRESS OR IMPLIED ,

WRITTEN OR ORAL, STATUTORY OR OTHERWISE,

RELATED TO THE INFORMATION, INCLUDING BUT NOT

LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,

MERCHANTABILITY OR FITNESS FOR PURPOSE.

Microchip disclaims all liability arising from this information and

its use. U se of Microc hip’s products as critical com ponents in

life support systems is not authorized except with express

written approval by Microchip. No licenses are conveyed,

implicitly or otherwise, under any Microchip intellectual property

rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, micro ID, MPLAB, PIC, PICmicro,

PICSTA RT, PRO MAT E, PowerSmart, rfP IC , and

SmartShunt are registered trademark s of Microchip

Technology Incorporated in the U.S.A. and other countries.

AmpLab, FilterLab, MX DE V, MXLAB, PICMASTER, SEEV AL,

SmartSensor and The Embedded Control Solutions Company

are registered trademarks of Microchip Technology

Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, dsPICDEM,

dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,

FanSense, FlexROM, fuzzyLAB, In-Circuit Serial

Programming, ICSP, ICEPIC, Migratable Memory, MPASM,

MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,

PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,

PowerTool, rfLAB, rfPICDEM, Select Mode, Sm art Serial,

SmartTel and Total Endurance are trademark s of Micro chip

Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet .

• Microchip believes that i t s family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

• The re are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is c onstantly evolving. We a t Microchip are commit ted to continuously improving the code protect ion f eatures of our

products. Attempts to break Microchip’ s code protection f eature may be a violati on of t he Digit al Millennium Copyright Act. If such act s

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in

Chandler and Tempe, Arizona and Mountain View, California in

October 2003. The Company’s quality system processes and

procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping

devices, Serial EEPROMs, micro peripherals, nonvolat ile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS21893B-page 26  2005 Microchip Technology Inc.

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10/20/04